JP5319230B2 - 半導体集積回路 - Google Patents
半導体集積回路 Download PDFInfo
- Publication number
- JP5319230B2 JP5319230B2 JP2008263697A JP2008263697A JP5319230B2 JP 5319230 B2 JP5319230 B2 JP 5319230B2 JP 2008263697 A JP2008263697 A JP 2008263697A JP 2008263697 A JP2008263697 A JP 2008263697A JP 5319230 B2 JP5319230 B2 JP 5319230B2
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- Japan
- Prior art keywords
- random number
- output
- number data
- circuit
- control register
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Classifications
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K6/00—Manipulating pulses having a finite slope and not covered by one of the other main groups of this subclass
- H03K6/04—Modifying slopes of pulses, e.g. S-correction
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- Logic Circuits (AREA)
- Electronic Switches (AREA)
- Manipulation Of Pulses (AREA)
Description
11 乱数制御レジスタ
12 立上り/立下り時間可変データレジスタ
13 出力回路
14 内部回路
15 立上り/立下り時間可変幅制御レジスタ
16 Pチャネル型MOSトランジスタ
17 Nチャネル型MOSトランジスタ
Claims (3)
- 複数ビットの乱数データを発生する乱数発生回路と、
前記乱数発生回路から順次出力される乱数データが格納される第1の制御レジスタと、
前記第1の制御レジスタに格納された乱数データに応じて、出力信号の立上り時間及び立下り時間が可変制御される出力回路と、を備え、
前記出力回路は、出力トランジスタと、前記第1の制御レジスタに格納された乱数データに応じて前記出力トランジスタに印加される信号を遅延させる遅延回路と、を備え、
前記遅延回路は、同じ容量値を持った複数の容量素子と、前記第1の制御レジスタに格納された乱数データに応じてスイッチングし、前記出力トランジスタの入力端子に前記容量素子を選択的に接続させる複数のスイッチング素子と、を備えることを特徴とする半導体集積回路。 - 複数ビットの乱数データを発生する乱数発生回路と、
前記乱数発生回路から順次出力される乱数データが格納される第1の制御レジスタと、
前記第1の制御レジスタに格納された乱数データに応じて、出力信号の立上り時間及び立下り時間が可変制御される出力回路と、を備え、
前記出力回路は、出力トランジスタと、前記第1の制御レジスタに格納された乱数データに応じて前記出力信号を遅延させる遅延回路と、を備え、
前記遅延回路は、同じ容量値を持った複数の容量素子と、前記第1の制御レジスタに格納された乱数データに応じてスイッチングし、前記出力トランジスタの出力端子に前記容量素子を選択的に接続させる複数のスイッチング素子と、を備えることを特徴とする半導体集積回路。 - 前記第1の制御レジスタに格納された乱数データに応じて可変制御される、前記出力信号の立上り時間及び立下り時間の幅を制御するための制御データが格納される第2の制御レジスタと、を備えることを特徴とする請求項1又は2に記載の半導体集積回路。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2008263697A JP5319230B2 (ja) | 2007-10-12 | 2008-10-10 | 半導体集積回路 |
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2007266858 | 2007-10-12 | ||
JP2007266858 | 2007-10-12 | ||
JP2008263697A JP5319230B2 (ja) | 2007-10-12 | 2008-10-10 | 半導体集積回路 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2009111998A JP2009111998A (ja) | 2009-05-21 |
JP5319230B2 true JP5319230B2 (ja) | 2013-10-16 |
Family
ID=40535264
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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JP2008263697A Active JP5319230B2 (ja) | 2007-10-12 | 2008-10-10 | 半導体集積回路 |
Country Status (3)
Country | Link |
---|---|
US (1) | US8316069B2 (ja) |
JP (1) | JP5319230B2 (ja) |
CN (1) | CN101409548B (ja) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8332448B2 (en) * | 2007-10-12 | 2012-12-11 | Sanyo Semiconductor Co., Ltd. | Semiconductor integrated circuit having a random number and oscillator circuit for variably controlling stored data |
JP2013012917A (ja) * | 2011-06-29 | 2013-01-17 | Fujitsu Semiconductor Ltd | クロック生成回路、クロック生成方法および半導体集積回路 |
CN109521998A (zh) * | 2018-12-26 | 2019-03-26 | 珠海博雅科技有限公司 | 一种基于mos管的电流抖动的随机数生成电路及存储器 |
JP2023094969A (ja) * | 2021-12-24 | 2023-07-06 | オムロン株式会社 | 時間計測回路、距離計測センサ、及び時間計測方法 |
Family Cites Families (22)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01265609A (ja) * | 1988-04-18 | 1989-10-23 | Matsushita Electric Ind Co Ltd | 擬似乱数発生装置 |
JPH06168290A (ja) * | 1992-11-30 | 1994-06-14 | Hitachi Ltd | 半導体集積回路の設計方法 |
US5796673A (en) * | 1994-10-06 | 1998-08-18 | Mosaid Technologies Incorporated | Delay locked loop implementation in a synchronous dynamic random access memory |
JP3625540B2 (ja) * | 1995-09-11 | 2005-03-02 | 三洋電機株式会社 | スクランブル解除装置 |
JPH10209821A (ja) * | 1996-12-05 | 1998-08-07 | Texas Instr Inc <Ti> | ランダムノイズ発生器及び発生方法 |
CN100568689C (zh) * | 2000-11-21 | 2009-12-09 | 睦塞德技术公司 | 电荷泵电源 |
WO2003009130A1 (fr) * | 2001-07-18 | 2003-01-30 | Fdk Corporation | Generateur de probabilite |
US6832231B1 (en) * | 2001-09-28 | 2004-12-14 | Lattice Semiconductor Corp. | Multiple width random number generation |
JP2003196081A (ja) * | 2001-10-15 | 2003-07-11 | Takeshi Saito | 真性乱数発生チップの迅速検定方法 |
JP2003153526A (ja) | 2001-11-06 | 2003-05-23 | Haruo Kobayashi | スイッチングレギュレータ回路 |
US6886023B2 (en) * | 2002-01-14 | 2005-04-26 | Ip-First, Llc | Apparatus for generating random numbers |
JP4428504B2 (ja) * | 2003-04-23 | 2010-03-10 | 株式会社ルネサステクノロジ | 半導体集積回路装置 |
US7148755B2 (en) * | 2003-08-26 | 2006-12-12 | Hewlett-Packard Development Company, L.P. | System and method to adjust voltage |
JP4094570B2 (ja) * | 2004-03-02 | 2008-06-04 | 株式会社東芝 | 乱数検査回路、乱数生成回路、半導体集積装置、icカードおよび情報端末機器 |
CN2731834Y (zh) * | 2004-03-12 | 2005-10-05 | 张建兴 | 开关信号整形驱动电路 |
EP1758020A4 (en) * | 2004-06-18 | 2008-11-26 | Fujitsu Ltd | RANDOM PRODUCTION DEVICE, PRODUCTION METHOD, GENERATOR EVALUATION METHOD AND USE METHOD FOR RANDOM NUMBERS |
JP2006067497A (ja) * | 2004-08-30 | 2006-03-09 | Fujitsu Ltd | 信号制御回路及びそれを搭載した装置 |
JP2006140548A (ja) * | 2004-11-10 | 2006-06-01 | Renesas Technology Corp | 半導体集積回路装置 |
US7362084B2 (en) * | 2005-03-14 | 2008-04-22 | Silicon Storage Technology, Inc. | Fast voltage regulators for charge pumps |
JP4453034B2 (ja) * | 2006-01-13 | 2010-04-21 | ソニー株式会社 | 転送パルス発生回路及び撮像装置 |
JP2007215317A (ja) * | 2006-02-09 | 2007-08-23 | Seiko Instruments Inc | スイッチング電源装置 |
US8332448B2 (en) * | 2007-10-12 | 2012-12-11 | Sanyo Semiconductor Co., Ltd. | Semiconductor integrated circuit having a random number and oscillator circuit for variably controlling stored data |
-
2008
- 2008-10-09 US US12/248,551 patent/US8316069B2/en active Active
- 2008-10-10 JP JP2008263697A patent/JP5319230B2/ja active Active
- 2008-10-13 CN CN200810170161XA patent/CN101409548B/zh not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
CN101409548B (zh) | 2011-06-01 |
US8316069B2 (en) | 2012-11-20 |
JP2009111998A (ja) | 2009-05-21 |
US20090100119A1 (en) | 2009-04-16 |
CN101409548A (zh) | 2009-04-15 |
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