JP5298762B2 - 積層型半導体装置、積層型半導体装置の製造方法及び半導体基板 - Google Patents

積層型半導体装置、積層型半導体装置の製造方法及び半導体基板 Download PDF

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Publication number
JP5298762B2
JP5298762B2 JP2008271360A JP2008271360A JP5298762B2 JP 5298762 B2 JP5298762 B2 JP 5298762B2 JP 2008271360 A JP2008271360 A JP 2008271360A JP 2008271360 A JP2008271360 A JP 2008271360A JP 5298762 B2 JP5298762 B2 JP 5298762B2
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Prior art keywords
bump
metal pattern
bumps
semiconductor chip
semiconductor
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Japanese (ja)
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JP2010103195A5 (enrdf_load_stackoverflow
JP2010103195A (ja
Inventor
新吾 松岡
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Nikon Corp
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Nikon Corp
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L24/14—Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/14—Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
JP2008271360A 2008-10-21 2008-10-21 積層型半導体装置、積層型半導体装置の製造方法及び半導体基板 Active JP5298762B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2008271360A JP5298762B2 (ja) 2008-10-21 2008-10-21 積層型半導体装置、積層型半導体装置の製造方法及び半導体基板

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2008271360A JP5298762B2 (ja) 2008-10-21 2008-10-21 積層型半導体装置、積層型半導体装置の製造方法及び半導体基板

Related Child Applications (1)

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JP2013129644A Division JP2013179373A (ja) 2013-06-20 2013-06-20 積層型半導体装置

Publications (3)

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JP2010103195A JP2010103195A (ja) 2010-05-06
JP2010103195A5 JP2010103195A5 (enrdf_load_stackoverflow) 2012-06-28
JP5298762B2 true JP5298762B2 (ja) 2013-09-25

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JP (1) JP5298762B2 (enrdf_load_stackoverflow)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102299133B (zh) * 2010-06-22 2014-02-19 中国科学院微电子研究所 半导体结构及其制造方法
KR101690487B1 (ko) * 2010-11-08 2016-12-28 삼성전자주식회사 반도체 장치 및 제조 방법
JP5813495B2 (ja) 2011-04-15 2015-11-17 東京エレクトロン株式会社 液処理方法、液処理装置および記憶媒体
JP5600642B2 (ja) * 2011-06-16 2014-10-01 株式会社日立製作所 半導体装置の製造方法
US8552567B2 (en) 2011-07-27 2013-10-08 Micron Technology, Inc. Semiconductor die assemblies, semiconductor devices including same, and methods of fabrication
US8937309B2 (en) 2011-08-08 2015-01-20 Micron Technology, Inc. Semiconductor die assemblies, semiconductor devices including same, and methods of fabrication
JP5678840B2 (ja) * 2011-08-18 2015-03-04 富士通セミコンダクター株式会社 半導体装置
US9269646B2 (en) * 2011-11-14 2016-02-23 Micron Technology, Inc. Semiconductor die assemblies with enhanced thermal management and semiconductor devices including same
JP2013110151A (ja) * 2011-11-17 2013-06-06 Elpida Memory Inc 半導体チップ及び半導体装置
KR102032907B1 (ko) * 2013-04-22 2019-10-16 삼성전자주식회사 반도체 소자, 반도체 패키지 및 전자 시스템
JP6380946B2 (ja) * 2013-11-18 2018-08-29 ローム株式会社 半導体装置および半導体装置の製造方法
CN107615481B (zh) 2015-05-18 2020-07-21 索尼公司 半导体装置和成像装置
JP2023045675A (ja) 2021-09-22 2023-04-03 キオクシア株式会社 半導体装置及び半導体装置の製造方法
WO2024101204A1 (ja) * 2022-11-10 2024-05-16 ソニーセミコンダクタソリューションズ株式会社 光検出装置及び積層基板

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4011695B2 (ja) * 1996-12-02 2007-11-21 株式会社東芝 マルチチップ半導体装置用チップおよびその形成方法
JP4205613B2 (ja) * 2004-03-01 2009-01-07 エルピーダメモリ株式会社 半導体装置
JP4688526B2 (ja) * 2005-03-03 2011-05-25 Ｏｋｉセミコンダクタ株式会社 半導体装置及びその製造方法
KR101524173B1 (ko) * 2007-03-06 2015-05-29 가부시키가이샤 니콘 반도체 장치 및 이 반도체 장치의 제조 방법
JP4700642B2 (ja) * 2007-03-16 2011-06-15 Ｏｋｉセミコンダクタ株式会社 半導体装置及びその製造方法

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