JP5271426B2 - フッ化炭素膜の表面処理 - Google Patents

フッ化炭素膜の表面処理 Download PDF

Info

Publication number
JP5271426B2
JP5271426B2 JP2011554343A JP2011554343A JP5271426B2 JP 5271426 B2 JP5271426 B2 JP 5271426B2 JP 2011554343 A JP2011554343 A JP 2011554343A JP 2011554343 A JP2011554343 A JP 2011554343A JP 5271426 B2 JP5271426 B2 JP 5271426B2
Authority
JP
Japan
Prior art keywords
insulating layer
annealing
layer
cfx
barrier layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2011554343A
Other languages
English (en)
Japanese (ja)
Other versions
JP2012516065A (ja
JP2012516065A5 (enExample
Inventor
正弘 堀込
託也 黒鳥
保男 小林
孝明 松岡
俊久 野沢
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tokyo Electron Ltd
Original Assignee
Tokyo Electron Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Electron Ltd filed Critical Tokyo Electron Ltd
Publication of JP2012516065A publication Critical patent/JP2012516065A/ja
Publication of JP2012516065A5 publication Critical patent/JP2012516065A5/ja
Application granted granted Critical
Publication of JP5271426B2 publication Critical patent/JP5271426B2/ja
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/32051Deposition of metallic or metal-silicide layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841Barrier, adhesion or liner layers
    • H01L21/76853Barrier, adhesion or liner layers characterized by particular after-treatment steps
    • H01L21/76861Post-treatment or after-treatment not introducing additional chemical elements into the layer
    • H01L21/76864Thermal treatment
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02115Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material being carbon, e.g. alpha-C, diamond or hydrogen doped carbon
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H01L21/02274Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
    • H01L21/2855Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table by physical means, e.g. sputtering, evaporation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • H01L21/76814Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics post-treatment or after-treatment, e.g. cleaning or removal of oxides on underlying conductors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76822Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc.
    • H01L21/76826Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc. by contacting the layer with gases, liquids or plasmas
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841Barrier, adhesion or liner layers
    • H01L21/76843Barrier, adhesion or liner layers formed in openings in a dielectric
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02118Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer carbon based polymeric organic or inorganic material, e.g. polyimides, poly cyclobutene or PVC
    • H01L21/0212Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer carbon based polymeric organic or inorganic material, e.g. polyimides, poly cyclobutene or PVC the material being fluoro carbon compounds, e.g.(CFx) n, (CHxFy) n or polytetrafluoroethylene

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Power Engineering (AREA)
  • Plasma & Fusion (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Formation Of Insulating Films (AREA)
JP2011554343A 2009-01-22 2010-01-22 フッ化炭素膜の表面処理 Expired - Fee Related JP5271426B2 (ja)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US20575209P 2009-01-22 2009-01-22
US61/205,752 2009-01-22
US20797109P 2009-02-17 2009-02-17
US61/207,971 2009-02-17
PCT/JP2010/000347 WO2010084759A1 (en) 2009-01-22 2010-01-22 Surface treatment for a fluorocarbon film

Publications (3)

Publication Number Publication Date
JP2012516065A JP2012516065A (ja) 2012-07-12
JP2012516065A5 JP2012516065A5 (enExample) 2012-11-29
JP5271426B2 true JP5271426B2 (ja) 2013-08-21

Family

ID=42355815

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2011554343A Expired - Fee Related JP5271426B2 (ja) 2009-01-22 2010-01-22 フッ化炭素膜の表面処理

Country Status (6)

Country Link
US (1) US8765605B2 (enExample)
JP (1) JP5271426B2 (enExample)
KR (1) KR101269925B1 (enExample)
CN (1) CN102292798A (enExample)
TW (1) TW201044462A (enExample)
WO (1) WO2010084759A1 (enExample)

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5710606B2 (ja) * 2009-06-26 2015-04-30 東京エレクトロン株式会社 アモルファスカーボンのドーピングによるフルオロカーボン(CFx)の接合の改善
AU2012229325B2 (en) 2011-03-11 2015-07-09 Intercontinental Great Brands Llc System and method of forming multilayer confectionery
CN103857292A (zh) 2011-07-21 2014-06-11 洲际大品牌有限责任公司 用于形成和冷却咀嚼型胶基糖的系统和方法
US8691709B2 (en) * 2011-09-24 2014-04-08 Tokyo Electron Limited Method of forming metal carbide barrier layers for fluorocarbon films
JP5807511B2 (ja) * 2011-10-27 2015-11-10 東京エレクトロン株式会社 成膜装置及びその運用方法
KR101319929B1 (ko) * 2011-11-03 2013-10-18 주식회사 우신산업 차량용 사이드 리피터의 제조방법
US9111939B2 (en) * 2012-07-27 2015-08-18 Intel Corporation Metallization of fluorocarbon-based dielectric for interconnects
JP2014103165A (ja) * 2012-11-16 2014-06-05 Tokyo Electron Ltd 半導体素子の製造方法、および半導体素子の製造装置
US9865501B2 (en) * 2013-03-06 2018-01-09 Lam Research Corporation Method and apparatus for remote plasma treatment for reducing metal oxides on a metal seed layer
CN106061280A (zh) 2014-03-03 2016-10-26 洲际大品牌有限责任公司 制造食品的方法
CN104078344B (zh) * 2014-07-11 2017-04-05 上海华力微电子有限公司 减少自对准硅化镍尖峰缺陷和管道缺陷的方法
KR102378538B1 (ko) * 2015-08-11 2022-03-25 삼성디스플레이 주식회사 표시 장치의 제조 방법
KR102361083B1 (ko) * 2015-09-01 2022-02-11 한국화학연구원 탄화불소 박막의 제조방법 및 이의 제조장치
WO2017039339A1 (ko) * 2015-09-01 2017-03-09 한국화학연구원 탄화불소 박막의 제조방법
US10443146B2 (en) 2017-03-30 2019-10-15 Lam Research Corporation Monitoring surface oxide on seed layers during electroplating
US12230539B2 (en) * 2018-08-01 2025-02-18 Texas Instruments Incorporated Wafer chip scale packaging with ball attach before repassivation
US11527413B2 (en) * 2021-01-29 2022-12-13 Tokyo Electron Limited Cyclic plasma etch process
US12317554B2 (en) * 2021-04-09 2025-05-27 Taiwan Semiconductor Manufacturing Company, Ltd. Contact structures for semiconductor devices
TW202503924A (zh) * 2023-07-10 2025-01-16 美商應用材料股份有限公司 形成互連結構的方法

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100379308B1 (ko) * 1998-01-10 2003-04-10 동경 엘렉트론 주식회사 불소 첨가 탄소막으로 이루어지는 절연막을 구비하는반도체 디바이스 및 그 제조 방법
JP3189781B2 (ja) * 1998-04-08 2001-07-16 日本電気株式会社 半導体装置の製造方法
JP4005295B2 (ja) * 2000-03-31 2007-11-07 富士通株式会社 半導体装置の製造方法
US20050064701A1 (en) * 2003-09-19 2005-03-24 International Business Machines Corporation Formation of low resistance via contacts in interconnect structures
US7776736B2 (en) 2004-05-11 2010-08-17 Tokyo Electron Limited Substrate for electronic device capable of suppressing fluorine atoms exposed at the surface of insulating film from reacting with water and method for processing same
JP4555143B2 (ja) 2004-05-11 2010-09-29 東京エレクトロン株式会社 基板の処理方法
KR101256035B1 (ko) 2005-06-20 2013-04-18 고에키자이단호진 고쿠사이카가쿠 신고우자이단 층간 절연막 및 배선 구조와 그것들의 제조 방법
JP2007067336A (ja) * 2005-09-02 2007-03-15 Matsushita Electric Ind Co Ltd 半導体装置の製造方法及び半導体装置
US7902641B2 (en) * 2008-07-24 2011-03-08 Tokyo Electron Limited Semiconductor device and manufacturing method therefor

Also Published As

Publication number Publication date
KR20110105847A (ko) 2011-09-27
JP2012516065A (ja) 2012-07-12
US8765605B2 (en) 2014-07-01
CN102292798A (zh) 2011-12-21
KR101269925B1 (ko) 2013-05-31
WO2010084759A1 (en) 2010-07-29
US20110318919A1 (en) 2011-12-29
TW201044462A (en) 2010-12-16

Similar Documents

Publication Publication Date Title
JP5271426B2 (ja) フッ化炭素膜の表面処理
CN101569003B (zh) 半导体装置及其制造方法
US7425506B1 (en) Methods of providing an adhesion layer for adhesion of barrier and/or seed layers to dielectric films
JP5366235B2 (ja) 半導体装置の製造方法、半導体製造装置及び記憶媒体
US7728436B2 (en) Method for selective deposition of a thin self-assembled monolayer
TWI374482B (enExample)
TW200836294A (en) Method for fabricating semiconductor device
KR100332937B1 (ko) 반도체 장치 및 그 제조 방법
KR20080100153A (ko) 낮은 K 금속간 유전체 및 에칭 스톱과의 통합을 위한 무전해 Co 합금막 상에서의 산화를 감소시키고 접착력을 강화시키는 방법
JP2011014933A (ja) 層間絶縁膜および配線構造と、それらの製造方法
TW201118949A (en) Film deposition method, pretreatment device, and treating system
TW200524042A (en) Structures with improved interfacial strength of sicoh dielectrics and method for preparing the same
JPH10125782A (ja) 半導体装置の製造方法
JP2009111251A (ja) 半導体装置およびその製造方法
JP5930416B2 (ja) 配線構造体、配線構造体を備えた半導体装置及びその半導体装置の製造方法
JP2011124472A (ja) 半導体装置の製造方法
KR101247871B1 (ko) 반도체 장치 및 그 제조 방법
JP4567587B2 (ja) 半導体装置の製造方法
TWI300596B (en) Semiconductor device
US6878617B2 (en) Method of forming copper wire on semiconductor device
JP2006287022A (ja) 半導体装置とその製造方法
van der Straten et al. Atomic Layer Deposition of Tantalum Nitride on Organosilicate and Organic Polymer-based Low Dielectric Constant Materials
US20070269977A1 (en) Method of forming a multilayer wiring by the use of copper damascene technique
JP2004031497A (ja) 半導体装置およびその製造方法
JP2011151217A (ja) 半導体装置の製造方法

Legal Events

Date Code Title Description
RD03 Notification of appointment of power of attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7423

Effective date: 20120823

RD04 Notification of resignation of power of attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7424

Effective date: 20121001

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20121012

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20121012

A871 Explanation of circumstances concerning accelerated examination

Free format text: JAPANESE INTERMEDIATE CODE: A871

Effective date: 20121012

A975 Report on accelerated examination

Free format text: JAPANESE INTERMEDIATE CODE: A971005

Effective date: 20121212

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20121218

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20130116

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20130416

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20130510

R150 Certificate of patent or registration of utility model

Free format text: JAPANESE INTERMEDIATE CODE: R150

LAPS Cancellation because of no payment of annual fees