JP5266589B2 - 不揮発性半導体記憶装置 - Google Patents

不揮発性半導体記憶装置 Download PDF

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Publication number
JP5266589B2
JP5266589B2 JP2009117504A JP2009117504A JP5266589B2 JP 5266589 B2 JP5266589 B2 JP 5266589B2 JP 2009117504 A JP2009117504 A JP 2009117504A JP 2009117504 A JP2009117504 A JP 2009117504A JP 5266589 B2 JP5266589 B2 JP 5266589B2
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Japan
Prior art keywords
signal
level
memory
circuit
read
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JP2009117504A
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English (en)
Japanese (ja)
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JP2010267326A5 (enExample
JP2010267326A (ja
Inventor
隆司 河野
謙 松原
貴司 岩瀬
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Renesas Electronics Corp
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Renesas Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by Renesas Electronics Corp filed Critical Renesas Electronics Corp
Priority to JP2009117504A priority Critical patent/JP5266589B2/ja
Priority to US12/766,603 priority patent/US8335112B2/en
Publication of JP2010267326A publication Critical patent/JP2010267326A/ja
Publication of JP2010267326A5 publication Critical patent/JP2010267326A5/ja
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Publication of JP5266589B2 publication Critical patent/JP5266589B2/ja
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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/26—Sensing or reading circuits; Data output circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/06—Sense amplifiers; Associated circuits, e.g. timing or triggering circuits
    • G11C7/08—Control thereof
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/06—Address interface arrangements, e.g. address buffers
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/08—Word line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, for word lines
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/10—Decoders
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/18—Address timing or clocking circuits; Address control signal generation or management, e.g. for row address strobe [RAS] or column address strobe [CAS] signals

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Read Only Memory (AREA)
  • Static Random-Access Memory (AREA)
JP2009117504A 2009-05-14 2009-05-14 不揮発性半導体記憶装置 Active JP5266589B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2009117504A JP5266589B2 (ja) 2009-05-14 2009-05-14 不揮発性半導体記憶装置
US12/766,603 US8335112B2 (en) 2009-05-14 2010-04-23 Nonvolatile semiconductor memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2009117504A JP5266589B2 (ja) 2009-05-14 2009-05-14 不揮発性半導体記憶装置

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2013041754A Division JP5502218B2 (ja) 2013-03-04 2013-03-04 不揮発性半導体記憶装置

Publications (3)

Publication Number Publication Date
JP2010267326A JP2010267326A (ja) 2010-11-25
JP2010267326A5 JP2010267326A5 (enExample) 2012-04-12
JP5266589B2 true JP5266589B2 (ja) 2013-08-21

Family

ID=43068401

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2009117504A Active JP5266589B2 (ja) 2009-05-14 2009-05-14 不揮発性半導体記憶装置

Country Status (2)

Country Link
US (1) US8335112B2 (enExample)
JP (1) JP5266589B2 (enExample)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103000216B (zh) * 2011-09-15 2015-06-24 华邦电子股份有限公司 读出装置
US8472261B2 (en) * 2011-10-17 2013-06-25 Winbond Electronics Corp. Reading devices for memory arrays
US8861301B2 (en) * 2012-06-08 2014-10-14 Freescale Semiconductor, Inc. Clocked memory with latching predecoder circuitry
US8743651B2 (en) 2012-06-08 2014-06-03 Freescale Semiconductor, Inc. Clocked memory with word line activation during a first portion of the clock cycle
US8743618B1 (en) 2012-11-15 2014-06-03 Sandisk Technologies Inc. Bit line resistance compensation
US8908432B2 (en) * 2012-11-15 2014-12-09 SanDisk Technologies, Inc. Bit line resistance compensation
JP2015056198A (ja) * 2013-09-13 2015-03-23 株式会社東芝 メモリチップ、記憶装置および読み出し方法
KR20190099933A (ko) * 2018-02-20 2019-08-28 삼성전자주식회사 외부의 전압을 기반으로 동작 모드를 결정하는 메모리 장치 및 그 동작방법
US10978140B2 (en) 2019-09-06 2021-04-13 International Business Machines Corporation Random-access memory array memory cell selection

Family Cites Families (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4862348A (en) * 1986-01-20 1989-08-29 Nec Corporation Microcomputer having high-speed and low-speed operation modes for reading a memory
JPH04109498A (ja) * 1990-08-29 1992-04-10 Yokogawa Electric Corp メモリｉｃ制御回路
JP3835962B2 (ja) * 1999-12-03 2006-10-18 松下電器産業株式会社 半導体記憶装置
WO2001075896A2 (en) * 2000-03-30 2001-10-11 Micron Technology, Inc. Flash with consistent latency for read operations
JP4190140B2 (ja) * 2000-09-04 2008-12-03 富士通マイクロエレクトロニクス株式会社 同期式半導体記憶装置、及びその入力情報のラッチ制御方法
JP2002093175A (ja) * 2000-09-08 2002-03-29 Toshiba Microelectronics Corp 半導体メモリ装置
JP2002190198A (ja) * 2000-12-20 2002-07-05 Hitachi Ltd レベル変換回路及び半導体集積回路並びに半導体記憶装置
JP2002208289A (ja) * 2001-01-09 2002-07-26 Fuji Xerox Co Ltd 半導体記憶装置
JP2002216483A (ja) * 2001-01-18 2002-08-02 Toshiba Corp 半導体記憶装置
JP2002251886A (ja) * 2001-02-22 2002-09-06 Seiko Instruments Inc シリアル入出力メモリ
JP2003109390A (ja) * 2001-09-27 2003-04-11 Toshiba Corp 半導体記憶装置
JP2004127405A (ja) 2002-10-01 2004-04-22 Renesas Technology Corp 不揮発性半導体記憶装置
JP3751602B2 (ja) * 2003-04-15 2006-03-01 沖電気工業株式会社 メモリ回路及びデータ読み出し方法
JP2004319034A (ja) * 2003-04-18 2004-11-11 Renesas Technology Corp データプロセッサ
JP4314057B2 (ja) * 2003-04-18 2009-08-12 サンディスク コーポレイション 不揮発性半導体記憶装置および電子装置
JP2005092923A (ja) * 2003-09-12 2005-04-07 Renesas Technology Corp 半導体記憶装置
JP5226669B2 (ja) * 2006-04-24 2013-07-03 サンディスク テクノロジィース インコーポレイテッド 高効率フラッシュメモリデータ転送
JP2009020990A (ja) * 2007-06-11 2009-01-29 Renesas Technology Corp 半導体集積回路装置
JP4712769B2 (ja) * 2007-07-09 2011-06-29 ルネサスエレクトロニクス株式会社 不揮発性半導体記憶装置

Also Published As

Publication number Publication date
US20100290290A1 (en) 2010-11-18
US8335112B2 (en) 2012-12-18
JP2010267326A (ja) 2010-11-25

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