JP5185062B2 - 積層型半導体装置及び電子機器 - Google Patents
積層型半導体装置及び電子機器 Download PDFInfo
- Publication number
- JP5185062B2 JP5185062B2 JP2008270414A JP2008270414A JP5185062B2 JP 5185062 B2 JP5185062 B2 JP 5185062B2 JP 2008270414 A JP2008270414 A JP 2008270414A JP 2008270414 A JP2008270414 A JP 2008270414A JP 5185062 B2 JP5185062 B2 JP 5185062B2
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor device
- semiconductor chip
- stacked
- metal
- metal post
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
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- H10W90/701—
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- H10W90/00—
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- H10W70/60—
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- H10W74/15—
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- H10W90/722—
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- H10W90/724—
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- H10W90/734—
Landscapes
- Wire Bonding (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2008270414A JP5185062B2 (ja) | 2008-10-21 | 2008-10-21 | 積層型半導体装置及び電子機器 |
| PCT/JP2009/003134 WO2010047014A1 (ja) | 2008-10-21 | 2009-07-06 | 積層型半導体装置及び電子機器 |
| US13/008,579 US8269335B2 (en) | 2008-10-21 | 2011-01-18 | Multilayer semiconductor device and electronic equipment |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2008270414A JP5185062B2 (ja) | 2008-10-21 | 2008-10-21 | 積層型半導体装置及び電子機器 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2010103129A JP2010103129A (ja) | 2010-05-06 |
| JP2010103129A5 JP2010103129A5 (enExample) | 2010-12-24 |
| JP5185062B2 true JP5185062B2 (ja) | 2013-04-17 |
Family
ID=42119072
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2008270414A Active JP5185062B2 (ja) | 2008-10-21 | 2008-10-21 | 積層型半導体装置及び電子機器 |
Country Status (3)
| Country | Link |
|---|---|
| US (1) | US8269335B2 (enExample) |
| JP (1) | JP5185062B2 (enExample) |
| WO (1) | WO2010047014A1 (enExample) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20220148950A1 (en) * | 2019-07-30 | 2022-05-12 | Huawei Technologies Co., Ltd. | Packaging device and manufacturing method therefor, and electronic device |
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| CN101053079A (zh) | 2004-11-03 | 2007-10-10 | 德塞拉股份有限公司 | 堆叠式封装的改进 |
| US8058101B2 (en) | 2005-12-23 | 2011-11-15 | Tessera, Inc. | Microelectronic packages and methods therefor |
| US8148813B2 (en) * | 2009-07-31 | 2012-04-03 | Altera Corporation | Integrated circuit package architecture |
| US9941195B2 (en) | 2009-11-10 | 2018-04-10 | Taiwan Semiconductor Manufacturing Co., Ltd. | Vertical metal insulator metal capacitor |
| JP2012009713A (ja) * | 2010-06-25 | 2012-01-12 | Shinko Electric Ind Co Ltd | 半導体パッケージおよび半導体パッケージの製造方法 |
| KR20120007839A (ko) * | 2010-07-15 | 2012-01-25 | 삼성전자주식회사 | 적층형 반도체 패키지의 제조방법 |
| US8482111B2 (en) | 2010-07-19 | 2013-07-09 | Tessera, Inc. | Stackable molded microelectronic packages |
| US9159708B2 (en) | 2010-07-19 | 2015-10-13 | Tessera, Inc. | Stackable molded microelectronic packages with area array unit connectors |
| KR101075241B1 (ko) | 2010-11-15 | 2011-11-01 | 테세라, 인코포레이티드 | 유전체 부재에 단자를 구비하는 마이크로전자 패키지 |
| JP2012114173A (ja) * | 2010-11-23 | 2012-06-14 | Shinko Electric Ind Co Ltd | 半導体装置の製造方法及び半導体装置 |
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| KR101817159B1 (ko) | 2011-02-17 | 2018-02-22 | 삼성전자 주식회사 | Tsv를 가지는 인터포저를 포함하는 반도체 패키지 및 그 제조 방법 |
| KR101740483B1 (ko) * | 2011-05-02 | 2017-06-08 | 삼성전자 주식회사 | 고정 부재 및 할로겐-프리 패키지간 연결부를 포함하는 적층 패키지 |
| US8618659B2 (en) | 2011-05-03 | 2013-12-31 | Tessera, Inc. | Package-on-package assembly with wire bonds to encapsulation surface |
| US11830845B2 (en) | 2011-05-03 | 2023-11-28 | Tessera Llc | Package-on-package assembly with wire bonds to encapsulation surface |
| KR101128063B1 (ko) | 2011-05-03 | 2012-04-23 | 테세라, 인코포레이티드 | 캡슐화 층의 표면에 와이어 본드를 구비하는 패키지 적층형 어셈블리 |
| KR101478601B1 (ko) * | 2011-06-28 | 2015-01-05 | 하나 마이크론(주) | 반도체 패키지 및 이의 제조 방법 |
| KR20130007049A (ko) * | 2011-06-28 | 2013-01-18 | 삼성전자주식회사 | 쓰루 실리콘 비아를 이용한 패키지 온 패키지 |
| US8404520B1 (en) | 2011-10-17 | 2013-03-26 | Invensas Corporation | Package-on-package assembly with wire bond vias |
| KR101818507B1 (ko) | 2012-01-11 | 2018-01-15 | 삼성전자 주식회사 | 반도체 패키지 |
| US8946757B2 (en) | 2012-02-17 | 2015-02-03 | Invensas Corporation | Heat spreading substrate with embedded interconnects |
| US9349706B2 (en) | 2012-02-24 | 2016-05-24 | Invensas Corporation | Method for package-on-package assembly with wire bonds to encapsulation surface |
| US8372741B1 (en) | 2012-02-24 | 2013-02-12 | Invensas Corporation | Method for package-on-package assembly with wire bonds to encapsulation surface |
| JP5923725B2 (ja) * | 2012-05-15 | 2016-05-25 | パナソニックIpマネジメント株式会社 | 電子部品の実装構造体 |
| US8835228B2 (en) | 2012-05-22 | 2014-09-16 | Invensas Corporation | Substrate-less stackable package with wire-bond interconnect |
| US9391008B2 (en) | 2012-07-31 | 2016-07-12 | Invensas Corporation | Reconstituted wafer-level package DRAM |
| US9502390B2 (en) | 2012-08-03 | 2016-11-22 | Invensas Corporation | BVA interposer |
| US8872326B2 (en) | 2012-08-29 | 2014-10-28 | Taiwan Semiconductor Manufacturing Company, Ltd. | Three dimensional (3D) fan-out packaging mechanisms |
| US8975738B2 (en) | 2012-11-12 | 2015-03-10 | Invensas Corporation | Structure for microelectronic packaging with terminals on dielectric mass |
| US8878353B2 (en) | 2012-12-20 | 2014-11-04 | Invensas Corporation | Structure for microelectronic packaging with bond elements to encapsulation surface |
| US9136254B2 (en) | 2013-02-01 | 2015-09-15 | Invensas Corporation | Microelectronic package having wire bond vias and stiffening layer |
| US8883563B1 (en) * | 2013-07-15 | 2014-11-11 | Invensas Corporation | Fabrication of microelectronic assemblies having stack terminals coupled by connectors extending through encapsulation |
| US9034696B2 (en) | 2013-07-15 | 2015-05-19 | Invensas Corporation | Microelectronic assemblies having reinforcing collars on connectors extending through encapsulation |
| US9023691B2 (en) | 2013-07-15 | 2015-05-05 | Invensas Corporation | Microelectronic assemblies with stack terminals coupled by connectors extending through encapsulation |
| US9167710B2 (en) | 2013-08-07 | 2015-10-20 | Invensas Corporation | Embedded packaging with preformed vias |
| US9685365B2 (en) | 2013-08-08 | 2017-06-20 | Invensas Corporation | Method of forming a wire bond having a free end |
| US20150076714A1 (en) | 2013-09-16 | 2015-03-19 | Invensas Corporation | Microelectronic element with bond elements to encapsulation surface |
| US9082753B2 (en) | 2013-11-12 | 2015-07-14 | Invensas Corporation | Severing bond wire by kinking and twisting |
| US9087815B2 (en) | 2013-11-12 | 2015-07-21 | Invensas Corporation | Off substrate kinking of bond wire |
| US9379074B2 (en) | 2013-11-22 | 2016-06-28 | Invensas Corporation | Die stacks with one or more bond via arrays of wire bond wires and with one or more arrays of bump interconnects |
| US9583456B2 (en) | 2013-11-22 | 2017-02-28 | Invensas Corporation | Multiple bond via arrays of different wire heights on a same substrate |
| US9263394B2 (en) | 2013-11-22 | 2016-02-16 | Invensas Corporation | Multiple bond via arrays of different wire heights on a same substrate |
| US9583411B2 (en) | 2014-01-17 | 2017-02-28 | Invensas Corporation | Fine pitch BVA using reconstituted wafer with area array accessible for testing |
| KR101538573B1 (ko) | 2014-02-05 | 2015-07-21 | 앰코 테크놀로지 코리아 주식회사 | 반도체 디바이스의 제조 방법 및 이에 따른 반도체 디바이스 |
| US9214454B2 (en) | 2014-03-31 | 2015-12-15 | Invensas Corporation | Batch process fabrication of package-on-package microelectronic assemblies |
| US9437577B2 (en) * | 2014-05-09 | 2016-09-06 | Mediatek Inc. | Package on package structure with pillar bump pins and related method thereof |
| US9257396B2 (en) * | 2014-05-22 | 2016-02-09 | Invensas Corporation | Compact semiconductor package and related methods |
| US10381326B2 (en) | 2014-05-28 | 2019-08-13 | Invensas Corporation | Structure and method for integrated circuits packaging with increased density |
| US9646917B2 (en) | 2014-05-29 | 2017-05-09 | Invensas Corporation | Low CTE component with wire bond interconnects |
| US9412714B2 (en) | 2014-05-30 | 2016-08-09 | Invensas Corporation | Wire bond support structure and microelectronic package including wire bonds therefrom |
| DE102014219794B4 (de) * | 2014-09-30 | 2020-06-18 | Osram Opto Semiconductors Gmbh | Elektrisches Bauelement und Verfahren zum Erzeugen eines elektrischen Bauelements |
| US9735084B2 (en) | 2014-12-11 | 2017-08-15 | Invensas Corporation | Bond via array for thermal conductivity |
| US9768108B2 (en) * | 2015-02-20 | 2017-09-19 | Qualcomm Incorporated | Conductive post protection for integrated circuit packages |
| US9888579B2 (en) | 2015-03-05 | 2018-02-06 | Invensas Corporation | Pressing of wire bond wire tips to provide bent-over tips |
| US9502372B1 (en) | 2015-04-30 | 2016-11-22 | Invensas Corporation | Wafer-level packaging using wire bond wires in place of a redistribution layer |
| US9761554B2 (en) | 2015-05-07 | 2017-09-12 | Invensas Corporation | Ball bonding metal wire bond wires to metal pads |
| JP6620989B2 (ja) * | 2015-05-25 | 2019-12-18 | パナソニックIpマネジメント株式会社 | 電子部品パッケージ |
| US10490528B2 (en) | 2015-10-12 | 2019-11-26 | Invensas Corporation | Embedded wire bond wires |
| US9490222B1 (en) | 2015-10-12 | 2016-11-08 | Invensas Corporation | Wire bond wires for interference shielding |
| US10332854B2 (en) | 2015-10-23 | 2019-06-25 | Invensas Corporation | Anchoring structure of fine pitch bva |
| US10181457B2 (en) | 2015-10-26 | 2019-01-15 | Invensas Corporation | Microelectronic package for wafer-level chip scale packaging with fan-out |
| US9911718B2 (en) | 2015-11-17 | 2018-03-06 | Invensas Corporation | ‘RDL-First’ packaged microelectronic device for a package-on-package device |
| US9659848B1 (en) | 2015-11-18 | 2017-05-23 | Invensas Corporation | Stiffened wires for offset BVA |
| US9984992B2 (en) | 2015-12-30 | 2018-05-29 | Invensas Corporation | Embedded wire bond wires for vertical integration with separate surface mount and wire bond mounting surfaces |
| US9935075B2 (en) | 2016-07-29 | 2018-04-03 | Invensas Corporation | Wire bonding method and apparatus for electromagnetic interference shielding |
| US10299368B2 (en) | 2016-12-21 | 2019-05-21 | Invensas Corporation | Surface integrated waveguides and circuit structures therefor |
| US10256114B2 (en) | 2017-03-23 | 2019-04-09 | Amkor Technology, Inc. | Semiconductor device with tiered pillar and manufacturing method thereof |
| US10636775B2 (en) * | 2017-10-27 | 2020-04-28 | Taiwan Semiconductor Manufacturing Co., Ltd. | Package structure and manufacturing method thereof |
| US10834839B1 (en) * | 2019-08-27 | 2020-11-10 | International Business Machines Corporation | Barrier for hybrid socket movement reduction |
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|---|---|---|---|---|
| US6451624B1 (en) * | 1998-06-05 | 2002-09-17 | Micron Technology, Inc. | Stackable semiconductor package having conductive layer and insulating layers and method of fabrication |
| US6404043B1 (en) * | 2000-06-21 | 2002-06-11 | Dense-Pac Microsystems, Inc. | Panel stacking of BGA devices to form three-dimensional modules |
| US7034386B2 (en) * | 2001-03-26 | 2006-04-25 | Nec Corporation | Thin planar semiconductor device having electrodes on both surfaces and method of fabricating same |
| JP2004253518A (ja) * | 2003-02-19 | 2004-09-09 | Renesas Technology Corp | 半導体装置及び半導体装置の製造方法 |
| JP4204989B2 (ja) * | 2004-01-30 | 2009-01-07 | 新光電気工業株式会社 | 半導体装置及びその製造方法 |
| JP4551321B2 (ja) * | 2005-07-21 | 2010-09-29 | 新光電気工業株式会社 | 電子部品実装構造及びその製造方法 |
| JP4512545B2 (ja) * | 2005-10-27 | 2010-07-28 | パナソニック株式会社 | 積層型半導体モジュール |
| JPWO2007069606A1 (ja) * | 2005-12-14 | 2009-05-21 | 新光電気工業株式会社 | チップ内蔵基板の製造方法 |
| US20070141751A1 (en) * | 2005-12-16 | 2007-06-21 | Mistry Addi B | Stackable molded packages and methods of making the same |
| JP2007281129A (ja) * | 2006-04-05 | 2007-10-25 | Toshiba Corp | 積層型半導体装置 |
| JP2007287762A (ja) * | 2006-04-13 | 2007-11-01 | Matsushita Electric Ind Co Ltd | 半導体集積回路素子とその製造方法および半導体装置 |
| JP2007287906A (ja) * | 2006-04-17 | 2007-11-01 | Elpida Memory Inc | 電極と電極の製造方法、及びこの電極を備えた半導体装置 |
| US7504283B2 (en) * | 2006-12-18 | 2009-03-17 | Texas Instruments Incorporated | Stacked-flip-assembled semiconductor chips embedded in thin hybrid substrate |
| DE102006062473A1 (de) * | 2006-12-28 | 2008-07-03 | Qimonda Ag | Halbleiterbauelement mit auf einem Substrat montiertem Chip |
| US7863735B1 (en) * | 2009-08-07 | 2011-01-04 | Stats Chippac Ltd. | Integrated circuit packaging system with a tiered substrate package and method of manufacture thereof |
| US7928552B1 (en) * | 2010-03-12 | 2011-04-19 | Stats Chippac Ltd. | Integrated circuit packaging system with multi-tier conductive interconnects and method of manufacture thereof |
-
2008
- 2008-10-21 JP JP2008270414A patent/JP5185062B2/ja active Active
-
2009
- 2009-07-06 WO PCT/JP2009/003134 patent/WO2010047014A1/ja not_active Ceased
-
2011
- 2011-01-18 US US13/008,579 patent/US8269335B2/en active Active
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20220148950A1 (en) * | 2019-07-30 | 2022-05-12 | Huawei Technologies Co., Ltd. | Packaging device and manufacturing method therefor, and electronic device |
Also Published As
| Publication number | Publication date |
|---|---|
| US8269335B2 (en) | 2012-09-18 |
| JP2010103129A (ja) | 2010-05-06 |
| WO2010047014A1 (ja) | 2010-04-29 |
| US20110115081A1 (en) | 2011-05-19 |
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