JP5181466B2 - 半導体装置の製造方法および半導体装置 - Google Patents
半導体装置の製造方法および半導体装置 Download PDFInfo
- Publication number
- JP5181466B2 JP5181466B2 JP2006309828A JP2006309828A JP5181466B2 JP 5181466 B2 JP5181466 B2 JP 5181466B2 JP 2006309828 A JP2006309828 A JP 2006309828A JP 2006309828 A JP2006309828 A JP 2006309828A JP 5181466 B2 JP5181466 B2 JP 5181466B2
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- Japan
- Prior art keywords
- layer
- gate electrode
- silicon substrate
- sidewall
- semiconductor device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
- H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
- H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
- H01L21/28518—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table the conductive layers comprising silicides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/0212—Manufacture or treatment of FETs having insulated gates [IGFET] using self-aligned silicidation
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/0223—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate
- H10D30/0227—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate having both lightly-doped source and drain extensions and source and drain regions self-aligned to the sides of the gate, e.g. lightly-doped drain [LDD] MOSFET or double-diffused drain [DDD] MOSFET
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/027—Manufacture or treatment of FETs having insulated gates [IGFET] of lateral single-gate IGFETs
- H10D30/0275—Manufacture or treatment of FETs having insulated gates [IGFET] of lateral single-gate IGFETs forming single crystalline semiconductor source or drain regions resulting in recessed gates, e.g. forming raised source or drain regions
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/01—Manufacture or treatment
- H10D62/021—Forming source or drain recesses by etching e.g. recessing by etching and then refilling
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/01—Manufacture or treatment
- H10D64/015—Manufacture or treatment removing at least parts of gate spacers, e.g. disposable spacers
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Electrodes Of Semiconductors (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Priority Applications (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2006309828A JP5181466B2 (ja) | 2006-11-16 | 2006-11-16 | 半導体装置の製造方法および半導体装置 |
| TW096136927A TW200832564A (en) | 2006-11-16 | 2007-10-02 | Method of manufacturing semiconductor device, and semiconductor device |
| US11/939,251 US7858517B2 (en) | 2006-11-16 | 2007-11-13 | Method of manufacturing semiconductor device, and semiconductor device |
| KR1020070116476A KR101382676B1 (ko) | 2006-11-16 | 2007-11-15 | 반도체 장치의 제조 방법, 및 반도체 장치 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2006309828A JP5181466B2 (ja) | 2006-11-16 | 2006-11-16 | 半導体装置の製造方法および半導体装置 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2008124407A JP2008124407A (ja) | 2008-05-29 |
| JP5181466B2 true JP5181466B2 (ja) | 2013-04-10 |
Family
ID=39416094
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2006309828A Active JP5181466B2 (ja) | 2006-11-16 | 2006-11-16 | 半導体装置の製造方法および半導体装置 |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US7858517B2 (enExample) |
| JP (1) | JP5181466B2 (enExample) |
| KR (1) | KR101382676B1 (enExample) |
| TW (1) | TW200832564A (enExample) |
Families Citing this family (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR101369907B1 (ko) * | 2007-10-31 | 2014-03-04 | 주성엔지니어링(주) | 트랜지스터 및 그 제조 방법 |
| DE102008049725B4 (de) * | 2008-09-30 | 2012-11-22 | Globalfoundries Dresden Module One Limited Liability Company & Co. Kg | CMOS-Bauelement mit NMOS-Transistoren und PMOS-Transistoren mit stärkeren verformungsinduzierenden Quellen und Metallsilizidgebieten mit geringem Abstand und Verfahren zur Herstellung des Bauelements |
| US8450194B2 (en) * | 2011-07-01 | 2013-05-28 | Varian Semiconductor Equipment Associates, Inc. | Method to modify the shape of a cavity using angled implantation |
| JP5520974B2 (ja) | 2012-01-25 | 2014-06-11 | 東京エレクトロン株式会社 | 被処理基体の処理方法 |
| CN103515317B (zh) * | 2012-06-20 | 2016-02-03 | 中芯国际集成电路制造(上海)有限公司 | 一种cmos器件及其形成方法 |
| DE112016001675B4 (de) * | 2015-04-10 | 2024-03-28 | Applied Materials, Inc. | Verfahren zur Erhöhung der Wachstumsrate für ein selektives Expitaxialwachstum |
| TWI688042B (zh) * | 2016-07-05 | 2020-03-11 | 聯華電子股份有限公司 | 半導體元件的製作方法 |
| KR102452925B1 (ko) | 2018-02-23 | 2022-10-07 | 삼성전자주식회사 | 반도체 장치 및 그 제조 방법 |
| US12356705B2 (en) | 2023-11-07 | 2025-07-08 | Applied Materials, Inc. | Electrical contact cavity structure and methods of forming the same |
Family Cites Families (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1147552A1 (en) | 1998-11-12 | 2001-10-24 | Intel Corporation | Field effect transistor structure with abrupt source/drain junctions |
| US6777298B2 (en) * | 2002-06-14 | 2004-08-17 | International Business Machines Corporation | Elevated source drain disposable spacer CMOS |
| US6921913B2 (en) * | 2003-03-04 | 2005-07-26 | Taiwan Semiconductor Manufacturing Co., Ltd. | Strained-channel transistor structure with lattice-mismatched zone |
| US7132338B2 (en) * | 2003-10-10 | 2006-11-07 | Applied Materials, Inc. | Methods to fabricate MOSFET devices using selective deposition process |
| JP2005353831A (ja) * | 2004-06-10 | 2005-12-22 | Toshiba Corp | 半導体装置 |
| US7279406B2 (en) * | 2004-12-22 | 2007-10-09 | Texas Instruments Incorporated | Tailoring channel strain profile by recessed material composition control |
| US20070221959A1 (en) * | 2006-03-22 | 2007-09-27 | International Business Machines Corporation | Structure and method for fabricating recessed channel mosfet with fanned out tapered surface raised source/drain |
-
2006
- 2006-11-16 JP JP2006309828A patent/JP5181466B2/ja active Active
-
2007
- 2007-10-02 TW TW096136927A patent/TW200832564A/zh unknown
- 2007-11-13 US US11/939,251 patent/US7858517B2/en active Active
- 2007-11-15 KR KR1020070116476A patent/KR101382676B1/ko active Active
Also Published As
| Publication number | Publication date |
|---|---|
| US20080116532A1 (en) | 2008-05-22 |
| KR20080044779A (ko) | 2008-05-21 |
| US7858517B2 (en) | 2010-12-28 |
| TWI379360B (enExample) | 2012-12-11 |
| KR101382676B1 (ko) | 2014-04-07 |
| JP2008124407A (ja) | 2008-05-29 |
| TW200832564A (en) | 2008-08-01 |
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