TW200832564A - Method of manufacturing semiconductor device, and semiconductor device - Google Patents

Method of manufacturing semiconductor device, and semiconductor device Download PDF

Info

Publication number
TW200832564A
TW200832564A TW096136927A TW96136927A TW200832564A TW 200832564 A TW200832564 A TW 200832564A TW 096136927 A TW096136927 A TW 096136927A TW 96136927 A TW96136927 A TW 96136927A TW 200832564 A TW200832564 A TW 200832564A
Authority
TW
Taiwan
Prior art keywords
layer
substrate
film
semiconductor device
gate electrode
Prior art date
Application number
TW096136927A
Other languages
English (en)
Chinese (zh)
Other versions
TWI379360B (enExample
Inventor
Naoyuki Sato
Kohjiro Nagaoka
Takashi Shinyama
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Publication of TW200832564A publication Critical patent/TW200832564A/zh
Application granted granted Critical
Publication of TWI379360B publication Critical patent/TWI379360B/zh

Links

Classifications

    • H10D64/0112—
    • H10P10/00—
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
    • H01L21/28518—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table the conductive layers comprising silicides
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0212—Manufacture or treatment of FETs having insulated gates [IGFET] using self-aligned silicidation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0223—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate
    • H10D30/0227—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate having both lightly-doped source and drain extensions and source and drain regions self-aligned to the sides of the gate, e.g. lightly-doped drain [LDD] MOSFET or double-diffused drain [DDD] MOSFET
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/027—Manufacture or treatment of FETs having insulated gates [IGFET] of lateral single-gate IGFETs
    • H10D30/0275—Manufacture or treatment of FETs having insulated gates [IGFET] of lateral single-gate IGFETs forming single crystalline semiconductor source or drain regions resulting in recessed gates, e.g. forming raised source or drain regions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/01—Manufacture or treatment
    • H10D62/021—Forming source or drain recesses by etching e.g. recessing by etching and then refilling
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/015—Manufacture or treatment removing at least parts of gate spacers, e.g. disposable spacers

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
TW096136927A 2006-11-16 2007-10-02 Method of manufacturing semiconductor device, and semiconductor device TW200832564A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2006309828A JP5181466B2 (ja) 2006-11-16 2006-11-16 半導体装置の製造方法および半導体装置

Publications (2)

Publication Number Publication Date
TW200832564A true TW200832564A (en) 2008-08-01
TWI379360B TWI379360B (enExample) 2012-12-11

Family

ID=39416094

Family Applications (1)

Application Number Title Priority Date Filing Date
TW096136927A TW200832564A (en) 2006-11-16 2007-10-02 Method of manufacturing semiconductor device, and semiconductor device

Country Status (4)

Country Link
US (1) US7858517B2 (enExample)
JP (1) JP5181466B2 (enExample)
KR (1) KR101382676B1 (enExample)
TW (1) TW200832564A (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI725019B (zh) * 2015-04-10 2021-04-21 美商應用材料股份有限公司 提高選擇性磊晶生長之生長速率的方法

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101369907B1 (ko) * 2007-10-31 2014-03-04 주성엔지니어링(주) 트랜지스터 및 그 제조 방법
DE102008049725B4 (de) * 2008-09-30 2012-11-22 Globalfoundries Dresden Module One Limited Liability Company & Co. Kg CMOS-Bauelement mit NMOS-Transistoren und PMOS-Transistoren mit stärkeren verformungsinduzierenden Quellen und Metallsilizidgebieten mit geringem Abstand und Verfahren zur Herstellung des Bauelements
US8450194B2 (en) * 2011-07-01 2013-05-28 Varian Semiconductor Equipment Associates, Inc. Method to modify the shape of a cavity using angled implantation
JP5520974B2 (ja) 2012-01-25 2014-06-11 東京エレクトロン株式会社 被処理基体の処理方法
CN103515317B (zh) * 2012-06-20 2016-02-03 中芯国际集成电路制造(上海)有限公司 一种cmos器件及其形成方法
TWI688042B (zh) * 2016-07-05 2020-03-11 聯華電子股份有限公司 半導體元件的製作方法
KR102452925B1 (ko) 2018-02-23 2022-10-07 삼성전자주식회사 반도체 장치 및 그 제조 방법
US12356705B2 (en) 2023-11-07 2025-07-08 Applied Materials, Inc. Electrical contact cavity structure and methods of forming the same

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002530864A (ja) 1998-11-12 2002-09-17 インテル・コーポレーション 階段ソース／ドレイン接合部を有する電界効果トランジスタ構造
US6777298B2 (en) * 2002-06-14 2004-08-17 International Business Machines Corporation Elevated source drain disposable spacer CMOS
US6921913B2 (en) * 2003-03-04 2005-07-26 Taiwan Semiconductor Manufacturing Co., Ltd. Strained-channel transistor structure with lattice-mismatched zone
US7132338B2 (en) * 2003-10-10 2006-11-07 Applied Materials, Inc. Methods to fabricate MOSFET devices using selective deposition process
JP2005353831A (ja) * 2004-06-10 2005-12-22 Toshiba Corp 半導体装置
US7279406B2 (en) * 2004-12-22 2007-10-09 Texas Instruments Incorporated Tailoring channel strain profile by recessed material composition control
US20070221959A1 (en) * 2006-03-22 2007-09-27 International Business Machines Corporation Structure and method for fabricating recessed channel mosfet with fanned out tapered surface raised source/drain

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI725019B (zh) * 2015-04-10 2021-04-21 美商應用材料股份有限公司 提高選擇性磊晶生長之生長速率的方法

Also Published As

Publication number Publication date
JP5181466B2 (ja) 2013-04-10
KR101382676B1 (ko) 2014-04-07
TWI379360B (enExample) 2012-12-11
JP2008124407A (ja) 2008-05-29
US20080116532A1 (en) 2008-05-22
KR20080044779A (ko) 2008-05-21
US7858517B2 (en) 2010-12-28

Similar Documents

Publication Publication Date Title
TWI331781B (en) Semiconductor fabrication method, method of forming a strained semiconductor structure
US7786518B2 (en) Growth of unfaceted SiGe in MOS transistor fabrication
TWI338350B (en) Methods of forming a semiconductor structure
US7888747B2 (en) Semiconductor device and method of fabricating the same
CN100429788C (zh) 用于提高mos性能的引入栅极的应变
TWI362753B (enExample)
TW200832564A (en) Method of manufacturing semiconductor device, and semiconductor device
TW200929541A (en) Transistor and method of fabricating the same
JP3594140B2 (ja) 半導体装置の製造方法
TW200849595A (en) Semiconductor device and semiconductor device manufacturing method
TW200842988A (en) Semiconductor device and method for manufacturing semiconductor device
TW200841468A (en) Silicon layer for stopping dislocation propagation
TW200924167A (en) Semiconductor device and method of manufacturing the same
CN104051276A (zh) 受应力的场效晶体管的制造方法
TW201013787A (en) Ultra-shallow junctions using atomic-layer doping
TWI387010B (zh) 用於製造電晶體之方法
TW201227930A (en) Semiconductor device and a method for manufacturing a semiconductor device
WO2007034553A1 (ja) 半導体装置およびその製造方法
JP2008177319A (ja) 半導体装置の製造方法および半導体装置
TWI296851B (en) Process for fabricating a strained channel mosfet device
TWI284373B (en) Semiconductor device and method of manufacturing semiconductor device
JP2008263114A (ja) 半導体装置の製造方法および半導体装置
JP2010080674A (ja) 半導体装置、およびその製造方法
JP2004200335A (ja) 絶縁ゲート型電界効果トランジスタを含む半導体装置及びその製造方法
TW201128714A (en) Methods for fabricating MOS devices having epitaxially grown stress-inducing source and drain regions