JP5160137B2 - 埋め込みカーボン・ドーパントを用いた半導体デバイス - Google Patents
埋め込みカーボン・ドーパントを用いた半導体デバイス Download PDFInfo
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- JP5160137B2 JP5160137B2 JP2007113990A JP2007113990A JP5160137B2 JP 5160137 B2 JP5160137 B2 JP 5160137B2 JP 2007113990 A JP2007113990 A JP 2007113990A JP 2007113990 A JP2007113990 A JP 2007113990A JP 5160137 B2 JP5160137 B2 JP 5160137B2
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- 229910052799 carbon Inorganic materials 0.000 title claims description 47
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 title claims description 46
- 239000004065 semiconductor Substances 0.000 title claims description 15
- 239000002019 doping agent Substances 0.000 title description 3
- 229910000577 Silicon-germanium Inorganic materials 0.000 claims description 57
- 239000000463 material Substances 0.000 claims description 50
- 238000000034 method Methods 0.000 claims description 33
- 230000001939 inductive effect Effects 0.000 claims description 28
- 229910052732 germanium Inorganic materials 0.000 claims description 9
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 claims description 9
- 238000004519 manufacturing process Methods 0.000 claims description 9
- 238000005137 deposition process Methods 0.000 claims description 3
- 150000001721 carbon Chemical group 0.000 claims 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 28
- 229910052710 silicon Inorganic materials 0.000 description 26
- 239000010703 silicon Substances 0.000 description 26
- 230000008569 process Effects 0.000 description 18
- 238000002955 isolation Methods 0.000 description 11
- 230000015572 biosynthetic process Effects 0.000 description 10
- 239000000758 substrate Substances 0.000 description 8
- 238000012545 processing Methods 0.000 description 6
- 238000005530 etching Methods 0.000 description 5
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 5
- 229920005591 polysilicon Polymers 0.000 description 5
- 125000006850 spacer group Chemical group 0.000 description 5
- 238000001459 lithography Methods 0.000 description 4
- 238000001020 plasma etching Methods 0.000 description 4
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- 150000004767 nitrides Chemical class 0.000 description 2
- 229920002120 photoresistant polymer Polymers 0.000 description 2
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- 238000012546 transfer Methods 0.000 description 2
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 1
- LEVVHYCKPQWKOP-UHFFFAOYSA-N [Si].[Ge] Chemical compound [Si].[Ge] LEVVHYCKPQWKOP-UHFFFAOYSA-N 0.000 description 1
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- 230000005540 biological transmission Effects 0.000 description 1
- 238000004364 calculation method Methods 0.000 description 1
- 125000004432 carbon atom Chemical group C* 0.000 description 1
- 239000007833 carbon precursor Substances 0.000 description 1
- 230000002596 correlated effect Effects 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
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- 238000010884 ion-beam technique Methods 0.000 description 1
- 238000000608 laser ablation Methods 0.000 description 1
- 238000004518 low pressure chemical vapour deposition Methods 0.000 description 1
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- 229910000077 silane Inorganic materials 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 238000010561 standard procedure Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/8238—Complementary field-effect transistors, e.g. CMOS
- H01L21/823807—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the channel structures, e.g. channel implants, halo or pocket implants, or channel materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/1025—Channel region of field-effect devices
- H01L29/1029—Channel region of field-effect devices of field-effect transistors
- H01L29/1033—Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure
- H01L29/1054—Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure with a variation of the composition, e.g. channel with strained layer for increasing the mobility
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66568—Lateral single gate silicon transistors
- H01L29/66636—Lateral single gate silicon transistors with source or drain recessed by etching or first recessed by etching and then refilled
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78684—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising semiconductor materials of Group IV not being silicon, or alloys including an element of the group IV, e.g. Ge, SiN alloys, SiC alloys
- H01L29/78687—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising semiconductor materials of Group IV not being silicon, or alloys including an element of the group IV, e.g. Ge, SiN alloys, SiC alloys with a multilayer structure or superlattice structure
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Recrystallisation Techniques (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Junction Field-Effect Transistors (AREA)
- Thin Film Transistor (AREA)
Description
12:埋め込み酸化層(BOX)
14:シリコン層(Si層)
16:シリコン・ゲルマニウム層(SiGe層)
18:カーボン領域
20:シリコン層(Si層)
22:浅いトレンチ分離領域(STI)
24:ポリシリコン・ゲート
26:SiNキャップ
28:側壁スペーサ
30:エピタキシャル成長シリコン(eSi)
Claims (7)
- 半導体構造体を製造する方法であって、
堆積プロセスにより層間の界面を有するように応力誘発層と該応力誘発層の上に応力受容層とを形成するステップと、
前記堆積プロセス中、前記界面におけるミスフィット転位を減少させるために、前記応力受容層と前記応力誘発層との間の前記界面にカーボン・ドーピングを行うステップと、
を含み、前記応力誘発層は、緩和SiGe層及び非緩和SiGe層の少なくとも一方を含み、前記応力受容層は、上部のSi層であり、前記応力誘発層のゲルマニウム含有量は、15%から35%の範囲であり、前記カーボン・ドーピングの割合は、原子百分率にして0.01%から1%までの間であり、前記応力誘発層、前記応力受容層および前記界面にカーボン・ドーピングされた材料は、前記応力受容層上のゲート・スタックに隣接する部分に開口部がエッチングされ、該開口部がエピタキシャル材料で充填されていることを特徴とする、方法。 - 前記カーボン・ドーピングは、前記界面において50Åから500Åまでの厚さで行われる、請求項1に記載の方法。
- ドープされたカーボンが、1立方センチメートル当たり1020カーボン原子より高い濃度である、請求項1または2に記載の方法。
- 前記応力受容層の上に第1のゲートを形成するステップと、
前記第1のゲート、前記応力受容層、前記応力誘発層、及び前記界面にカーボン・ドーピングされた材料を、前記ゲート・スタックに隣接する部分を除き保護するステップと、
前記応力受容層、前記応力誘発層、及び前記界面にカーボン・ドーピングされた材料の保護されていない前記ゲート・スタックに隣接する部分に前記開口部を形成し、前記開口部を前記エピタキシャル材料で充填するステップと、
をさらに含む、請求項1〜3のいずれか1項に記載の方法。 - 前記カーボン・ドーピングは、
前記応力受容層と前記応力誘発層との間の界面において行われるか、
前記応力受容層と前記応力誘発層との間の界面において行われ、かつカーボン・ドープ応力誘発層を形成するか、又は、
カーボン・ドープ応力誘発層を形成するように行われる、
請求項1に記載の方法。 - 第1の材料の層と第2の材料の層とカーボン・ドープ材料とを有する応力含有構造体の上に配置された少なくとも1つのゲート・スタックを含み、前記カーボン・ドープ材料が前記応力含有構造体におけるミスフィット転位を減少させるように構成された、半導体構造体であって、前記カーボン・ドープ材料は、
前記第1の材料の層と前記第2の材料の層との界面にある、
第1のカーボン・ドープ材料を形成する前記第1の材料の層内に存在する、及び、
第2のカーボン・ドープ材料を形成する前記第2の材料の層内に存在する、
のうちの少なくとも1つであり、
前記第1の材料の層は応力誘発層であり、前記第2の材料の層は応力受容層であり、前記応力誘発層は、緩和SiGe層及び非緩和SiGe層の少なくとも一方を含み、前記応力受容層は、上部のSi層であり、前記応力誘発層のゲルマニウム含有量は、15%から35%の範囲であり、前記カーボン・ドープ材料は、原子百分率にして0.01%から1%までの範囲で存在し、前記応力含有構造体は、前記少なくとも1つのゲート・スタックに隣接する部分に開口部がエッチングされ、該開口部がエピタキシャル材料で充填されていることを特徴とする、半導体構造体。 - 応力誘発層と応力受容層と層状構造体におけるミスフィット転位を減少させるカーボン・ドープ材料とを含む前記層状構造体の上に配置されたN型FETデバイスを含む半導体デバイスであって、
前記カーボン・ドープ材料は、前記応力受容層と前記応力誘発層との間の界面に存在し、前記応力誘発層は、緩和SiGe層及び非緩和SiGe層の少なくとも一方を含み、前記応力受容層は、上部のSi層であり、前記応力誘発層のゲルマニウム含有量は、15%から35%の範囲であり、前記カーボン・ドープ材料は、原子百分率にして0.01%から1%までの範囲で存在し、前記層状構造体は、前記N型FETデバイスのゲート・スタックに隣接する部分に開口部がエッチングされ、該開口部がエピタキシャル材料で充填されていることを特徴とする、デバイス。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US11/381,810 US7560326B2 (en) | 2006-05-05 | 2006-05-05 | Silicon/silcion germaninum/silicon body device with embedded carbon dopant |
US11/381810 | 2006-05-05 |
Publications (2)
Publication Number | Publication Date |
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JP2007300103A JP2007300103A (ja) | 2007-11-15 |
JP5160137B2 true JP5160137B2 (ja) | 2013-03-13 |
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JP2007113990A Expired - Fee Related JP5160137B2 (ja) | 2006-05-05 | 2007-04-24 | 埋め込みカーボン・ドーパントを用いた半導体デバイス |
Country Status (4)
Country | Link |
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US (1) | US7560326B2 (ja) |
JP (1) | JP5160137B2 (ja) |
CN (1) | CN101068004A (ja) |
TW (1) | TW200807572A (ja) |
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JP5668277B2 (ja) | 2009-06-12 | 2015-02-12 | ソニー株式会社 | 半導体装置 |
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2006
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- 2007-04-24 JP JP2007113990A patent/JP5160137B2/ja not_active Expired - Fee Related
- 2007-05-02 TW TW096115657A patent/TW200807572A/zh unknown
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US7560326B2 (en) | 2009-07-14 |
CN101068004A (zh) | 2007-11-07 |
US20070257249A1 (en) | 2007-11-08 |
JP2007300103A (ja) | 2007-11-15 |
TW200807572A (en) | 2008-02-01 |
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