JP5147723B2 - 電極構造体 - Google Patents
電極構造体 Download PDFInfo
- Publication number
- JP5147723B2 JP5147723B2 JP2008550076A JP2008550076A JP5147723B2 JP 5147723 B2 JP5147723 B2 JP 5147723B2 JP 2008550076 A JP2008550076 A JP 2008550076A JP 2008550076 A JP2008550076 A JP 2008550076A JP 5147723 B2 JP5147723 B2 JP 5147723B2
- Authority
- JP
- Japan
- Prior art keywords
- layer
- solder
- electrode
- fluid
- bump
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
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- H05K2201/03—Conductive materials
- H05K2201/0332—Structure of the conductor
- H05K2201/0335—Layered conductors or foils
- H05K2201/0338—Layered conductor, e.g. layered metal substrate, layered finish layer or layered thin film adhesion layer
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/04—Soldering or other types of metallurgic bonding
- H05K2203/0425—Solder powder or solder coated metal powder
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/04—Soldering or other types of metallurgic bonding
- H05K2203/043—Reflowing of solder coated conductors, not during connection of components, e.g. reflowing solder paste
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/08—Treatments involving gases
- H05K2203/083—Evaporation or sublimation of a compound, e.g. gas bubble generating agent
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/08—Treatments involving gases
- H05K2203/087—Using a reactive gas
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/3489—Composition of fluxes; Methods of application thereof; Other methods of activating the contact surfaces
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49128—Assembling formed circuit to base
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
- Y10T29/49144—Assembling to base an electrical component, e.g., capacitor, etc. by metal fusion
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49147—Assembling terminal to base
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49155—Manufacturing circuit on or in base
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Wire Bonding (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
Description
プ形成方法を提供することにある。
自己集合したバンプを再溶融することにより、再形成時のバンプの高さを平均化(レべリング)することも可能となる。
まず、図1(a)に示すように、複数の電極32を有する基板31の上に、導電性粒子16と気泡発生剤(図示せず)を含有した流動体14を供給する。ここで導電性粒子は半田粉である。流動体14は樹脂である。
この状態で、流動体14を加熱すると、図1(c)に示すように、流動体14の中に含有する気泡発生剤から気泡30が発生する。そして、図1(d)に示すように、流動体14は、発生した気泡30が成長することで、この一部の気泡30は基板31の外周部から外に押し出される。
図3(a)は、流動体14が、成長した気泡(図示せず)によって、基板31の電極32の上に押し出された状態を示した図である。電極32に接した流動体14は、その界面における界面張力(いわゆる樹脂の濡れ広がりに起因する力)Fsが、流動体14の粘度ηから発生する応力Fηよりも大きいので、電極32の全面に亙って広がり、最終的に、電極32の端部を境とした柱状の流動体14が、電極32と板状部材40の間に形成される。
上記の説明のように、この方法は、流動体14の界面張力による自己集合を利用して、電極32の上に流動体14を自己整合的に形成するものであるが、かかる界面張力による自己集合は、基板31の表面に形成された電極32が凸状に形成されているが故に、基板31と板状部材40間に形成されたギャップの中で狭くなっている電極32の上にて起きる現象を利用したものと言える。
以下の図面においては、説明の簡略化のため、実質的に同一の機能を有する構成要素を同一の参照符号で示す。本発明は以下の実施形態に限定されない。
図4は、本実施形態の電極構造体100の断面構成を模式的に示した断面模式図である。
図6(a)〜(e)は、本実施形態の電極構造体100を用いて、自己集合法により半田バンプ20を形成する基本的な工程を示した図である。
つまり、基板331の上に形成された電極パターン350の上に、Ni層352が配置され、Ni層352の上には、Pd層を介さずにAu層356が直接に形成されている。このようにPd層を含まない電極構造体300を用いて半田バンプを形成したとしても、図7(b)に示すように、薄膜のAu層356が半田に選択的に吸収されるが、半田バンプ320の高さをより高くする効果を得ることが難しい。
まず、図8(a)から図9(b)を参照しながら、本実施形態の電極構造体100の製造方法について説明する。
なお、図8(b)〜(d)に示した電極パターン50の上にNi層52を形成する工程は、エッチング処理を用いずに、図10(a)及び図10(b)のようにして実行することもできる。つまり、図10(a)に示すように、電極パターン50の上に、所定パターンのフォトレジスト66を形成し、このフォトレジスト66をマスクとして、基板31の全面に無電解メッキ法を用いてNiを積層すると、図10(b)に示すようにNi層52を形成できる。
このようにNi層252の上にPd層254を配置した場合であっても、Ni層252上のPd層254は、溶融した半田に吸収・合金化されるので、電極パターン250の上にバンプ高さの高い半田バンプ220を形成することができる。加えて、この例では、Ni層252は電極パターン250の上の全領域に形成されているので、Ni層252を介して電極パターン250の全領域にバンプを高く形成できる。
まず、図14(a)に示すように、流動体14を介して基板31の上に板状部材40を配置し、次いで、この状態で流動体14を加熱すると、図14(b)に示すように、流動体14は板状部材40と電極構造体100との間に集合する。このとき、流動体14が含有する導電性粒子16は加熱により溶融するが、この溶融した導電性粒子16は、Au層56だけでなく、Au層56よりも下層に位置するPd層54も溶解する(図中の矢印91及び矢印93参照)。これにより、自己集合した導電性粒子16に、金属(Au及びPd)を吸収・合金化させることができ、その結果、図14(c)に示すように、形成される半田バンプ20の高さを高くすることができる。上記構成では、自己集合したバンプを再溶融しなくてもよく、一回の加熱工程を実行するだけでよいので、バンプ高さの高いバンプを簡便に形成することが可能となる。
基板31の上に供給される流動体14の体積(VB)中に含有される導電性粒子16の全てが、基板31の電極パターン50の上の半田バンプ20の形成に寄与したとすると、半田バンプ20の総体積(VA)と、流動体14の体積(VB)とは以下のような関係式(1)が成り立つ。
ここで、SAは基板31の電極パターン50の総面積(Ni層52を介して半田バンプ20が形成される場合には、Ni層52の総面積)、SBは基板31の所定領域(具体的には、流動体14が供給される領域)の面積をそれぞれ表す。これにより、流動体14の中に含まれる導電性粒子16の含有量は、以下のような式(2)で表される。
よって、流動体14の中に含まれる導電性粒子16の最適な含有量は、概ね、以下のような式(3)に基づいて設定することができる。
なお、上記パラメータ(±α)は、導電性粒子16が基板31の電極パターン50上に自己集合する際の過不足分を調整するためのもので、種々の条件により決めることができる。
図16に示した配置(エリアアレイ配置)・・・15〜30体積%
このことから、電極パターン50上に必要とする半田バンプ20を形成するには、流動体14の中に分散する導電性粒子16は、0.5〜30体積%の割合で流動体14の中に含有していれば足りることになる。
図17は、本実施形態のバンプ形成方法を実行するための好適なバンプ形成装置70を表している。
流動体14としては、室温から導電性粒子16の溶融温度の範囲内において、流動可能な程度の粘度を有するものであればよく、また、加熱することによって流動可能な粘度に低下するものも含む。代表的な例としては、前記のエポキシ樹脂の他に、フェノール樹脂、シリコーン樹脂、ジアリルフタレート樹脂、フラン樹脂、メラミン樹脂等の熱硬化性樹脂、ポリエステルエストラマ、フッ素樹脂、ポリイミド樹脂、ポリアミド樹脂、アラミド樹脂等の熱可塑性樹脂、又は光(紫外線)硬化樹脂等、あるいはそれらを組み合わせた材料を使用することができる。樹脂以外にも、高沸点溶剤、オイル等も使用することができる。
Claims (3)
- 半田バンプが載置される電極構造体であって、
Cu、Al、Cr及びTiからなる群から選択された電極構成材料からなる電極パターンと、
前記電極パターン上の一部に形成されたNi層と、
前記電極パターン上の前記一部以外の領域の少なくとも一部に形成されたPd層と、
前記Ni層および前記Pd層の上に形成されたAu層と
を備えた電極構造体。 - 前記Ni層は、前記電極パターン上の中央部に形成され、一方、前記Pd層は、前記Ni層の周囲を覆うように前記電極パターン上に形成されている
請求項1に記載の電極構造体。 - 前記電極パターンがガラス基板または樹脂基板の上に配列されている
請求項1または請求項2記載の電極構造体。
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JP2008550076A JP5147723B2 (ja) | 2006-12-18 | 2007-11-27 | 電極構造体 |
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JP2006339654 | 2006-12-18 | ||
JP2006339654 | 2006-12-18 | ||
PCT/JP2007/072795 WO2008075537A1 (ja) | 2006-12-18 | 2007-11-27 | 電極構造体およびバンプ形成方法 |
JP2008550076A JP5147723B2 (ja) | 2006-12-18 | 2007-11-27 | 電極構造体 |
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JP (1) | JP5147723B2 (ja) |
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JP5560713B2 (ja) * | 2007-10-05 | 2014-07-30 | 日本電気株式会社 | 電子部品の実装方法等 |
DE102008054415A1 (de) * | 2008-12-09 | 2010-06-10 | Robert Bosch Gmbh | Anordnung zweier Substrate mit einer SLID-Bondverbindung und Verfahren zur Herstellung einer solchen Anordnung |
US20140106179A1 (en) * | 2012-10-17 | 2014-04-17 | Raytheon Company | Plating design and process for improved hermeticity and thermal conductivity of gold-germanium solder joints |
DE112014006846T5 (de) * | 2014-07-28 | 2017-04-13 | GM Global Technology Operations LLC | Systeme und Verfahren zum verstärkten Kleben |
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JPH09199505A (ja) * | 1996-01-18 | 1997-07-31 | Toshiba Microelectron Corp | 半導体装置およびその製造方法 |
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EP0854768A1 (en) * | 1995-10-06 | 1998-07-29 | Brown University Research Foundation | Soldering methods and compositions |
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2007
- 2007-11-27 JP JP2008550076A patent/JP5147723B2/ja not_active Expired - Fee Related
- 2007-11-27 US US12/518,358 patent/US8887383B2/en not_active Expired - Fee Related
- 2007-11-27 CN CN2007800462189A patent/CN101573784B/zh not_active Expired - Fee Related
- 2007-11-27 WO PCT/JP2007/072795 patent/WO2008075537A1/ja active Application Filing
Patent Citations (8)
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JPH09199505A (ja) * | 1996-01-18 | 1997-07-31 | Toshiba Microelectron Corp | 半導体装置およびその製造方法 |
JP2001102733A (ja) * | 1999-09-28 | 2001-04-13 | Kyocera Corp | 電子部品の実装方法 |
JP2005277106A (ja) * | 2004-03-25 | 2005-10-06 | Tdk Corp | 回路装置及びその製造方法 |
WO2006095677A1 (ja) * | 2005-03-09 | 2006-09-14 | Matsushita Electric Industrial Co., Ltd. | 金属粒子分散組成物ならびにそれを用いたフリップチップ実装方法およびバンプ形成方法 |
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WO2006103948A1 (ja) * | 2005-03-29 | 2006-10-05 | Matsushita Electric Industrial Co., Ltd. | フリップチップ実装方法およびバンプ形成方法 |
WO2006109407A1 (ja) * | 2005-04-06 | 2006-10-19 | Matsushita Electric Industrial Co., Ltd. | フリップチップ実装方法及びバンプ形成方法 |
WO2006126361A1 (ja) * | 2005-05-24 | 2006-11-30 | Matsushita Electric Industrial Co., Ltd. | ハンダバンプ形成方法および半導体素子の実装方法 |
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WO2008075537A1 (ja) | 2008-06-26 |
US20100044091A1 (en) | 2010-02-25 |
CN101573784B (zh) | 2013-01-09 |
CN101573784A (zh) | 2009-11-04 |
US8887383B2 (en) | 2014-11-18 |
JPWO2008075537A1 (ja) | 2010-04-08 |
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