JP5052501B2 - 製造モニタを集積回路チップに付加する方法 - Google Patents

製造モニタを集積回路チップに付加する方法 Download PDF

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Publication number
JP5052501B2
JP5052501B2 JP2008504019A JP2008504019A JP5052501B2 JP 5052501 B2 JP5052501 B2 JP 5052501B2 JP 2008504019 A JP2008504019 A JP 2008504019A JP 2008504019 A JP2008504019 A JP 2008504019A JP 5052501 B2 JP5052501 B2 JP 5052501B2
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Japan
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integrated circuit
monitor
damascene
filling
mold
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JP2008504019A
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Japanese (ja)
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JP2008535239A (ja
JP2008535239A5 (enExample
Inventor
アドキッソン、ジェームズ、ダブリュー
バサン、グレッグ
コーン、ジョン、エム
グラディ、マシュー、エス
ソフチャク、トーマス、ジー
バレット、デービッド、ピー
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International Business Machines Corp
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International Business Machines Corp
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/20—Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
JP2008504019A 2005-04-04 2005-12-22 製造モニタを集積回路チップに付加する方法 Expired - Fee Related JP5052501B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US10/907,494 US7240322B2 (en) 2005-04-04 2005-04-04 Method of adding fabrication monitors to integrated circuit chips
US10/907,494 2005-04-04
PCT/US2005/047083 WO2006107356A2 (en) 2005-04-04 2005-12-22 Method of adding fabrication monitors to integrated circuit chips

Publications (3)

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JP2008535239A JP2008535239A (ja) 2008-08-28
JP2008535239A5 JP2008535239A5 (enExample) 2008-10-16
JP5052501B2 true JP5052501B2 (ja) 2012-10-17

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JP2008504019A Expired - Fee Related JP5052501B2 (ja) 2005-04-04 2005-12-22 製造モニタを集積回路チップに付加する方法

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US (3) US7240322B2 (enExample)
EP (1) EP1869595B1 (enExample)
JP (1) JP5052501B2 (enExample)
CN (1) CN101147148B (enExample)
TW (1) TWI362598B (enExample)
WO (1) WO2006107356A2 (enExample)

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Also Published As

Publication number Publication date
US20080017857A1 (en) 2008-01-24
TW200705229A (en) 2007-02-01
EP1869595A2 (en) 2007-12-26
US7240322B2 (en) 2007-07-03
CN101147148A (zh) 2008-03-19
JP2008535239A (ja) 2008-08-28
US20060225023A1 (en) 2006-10-05
US7323278B2 (en) 2008-01-29
CN101147148B (zh) 2010-07-07
WO2006107356A2 (en) 2006-10-12
US7620931B2 (en) 2009-11-17
WO2006107356A3 (en) 2007-11-22
TWI362598B (en) 2012-04-21
EP1869595B1 (en) 2013-08-07
EP1869595A4 (en) 2009-12-16
US20070160920A1 (en) 2007-07-12

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