JP4959929B2 - ボンド・パッドを補強する方法およびシステム - Google Patents

ボンド・パッドを補強する方法およびシステム Download PDF

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Publication number
JP4959929B2
JP4959929B2 JP2004281010A JP2004281010A JP4959929B2 JP 4959929 B2 JP4959929 B2 JP 4959929B2 JP 2004281010 A JP2004281010 A JP 2004281010A JP 2004281010 A JP2004281010 A JP 2004281010A JP 4959929 B2 JP4959929 B2 JP 4959929B2
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JP
Japan
Prior art keywords
metal
wire bonding
integrated circuit
semiconductor integrated
bonding pad
Prior art date
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Expired - Fee Related
Application number
JP2004281010A
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English (en)
Japanese (ja)
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JP2005109491A (ja
JP2005109491A5 (enExample
Inventor
アダム バッチマン マーク
パトリック チェサイアー ダニエル
マンシン マーチャント サイレッシュ
ウィリアム オーゼンバッハ ジョン
ジョージ スティナー カート
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Agere Systems LLC
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Agere Systems LLC
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Publication date
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Publication of JP2005109491A publication Critical patent/JP2005109491A/ja
Publication of JP2005109491A5 publication Critical patent/JP2005109491A5/ja
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W42/00—Arrangements for protection of devices
    • H10W42/121—Arrangements for protection of devices protecting against mechanical damage
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/019—Manufacture or treatment of bond pads
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/29—Bond pads specially adapted therefor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/59—Bond pads specially adapted therefor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/921—Structures or relative sizes of bond pads
    • H10W72/923—Bond pads having multiple stacked layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/921—Structures or relative sizes of bond pads
    • H10W72/923—Bond pads having multiple stacked layers
    • H10W72/9232—Bond pads having multiple stacked layers with additional elements interposed between layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/931—Shapes of bond pads
    • H10W72/934—Cross-sectional shape, i.e. in side view
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/941—Dispositions of bond pads
    • H10W72/9415—Dispositions of bond pads relative to the surface, e.g. recessed, protruding
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/951—Materials of bond pads
    • H10W72/952—Materials of bond pads comprising metals or metalloids, e.g. PbSn, Ag or Cu
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/981—Auxiliary members, e.g. spacers
    • H10W72/983—Reinforcing structures, e.g. collars

Landscapes

  • Wire Bonding (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
JP2004281010A 2003-09-30 2004-09-28 ボンド・パッドを補強する方法およびシステム Expired - Fee Related JP4959929B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/675,260 US6960836B2 (en) 2003-09-30 2003-09-30 Reinforced bond pad
US10/675260 2003-09-30

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2011197816A Division JP5562308B2 (ja) 2003-09-30 2011-09-12 ボンド・パッドを補強する方法およびシステム

Publications (3)

Publication Number Publication Date
JP2005109491A JP2005109491A (ja) 2005-04-21
JP2005109491A5 JP2005109491A5 (enExample) 2007-10-18
JP4959929B2 true JP4959929B2 (ja) 2012-06-27

Family

ID=33311157

Family Applications (2)

Application Number Title Priority Date Filing Date
JP2004281010A Expired - Fee Related JP4959929B2 (ja) 2003-09-30 2004-09-28 ボンド・パッドを補強する方法およびシステム
JP2011197816A Expired - Lifetime JP5562308B2 (ja) 2003-09-30 2011-09-12 ボンド・パッドを補強する方法およびシステム

Family Applications After (1)

Application Number Title Priority Date Filing Date
JP2011197816A Expired - Lifetime JP5562308B2 (ja) 2003-09-30 2011-09-12 ボンド・パッドを補強する方法およびシステム

Country Status (5)

Country Link
US (1) US6960836B2 (enExample)
JP (2) JP4959929B2 (enExample)
KR (1) KR101150312B1 (enExample)
GB (1) GB2406707B (enExample)
TW (1) TWI364833B (enExample)

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7372153B2 (en) * 2003-10-07 2008-05-13 Taiwan Semiconductor Manufacturing Co., Ltd Integrated circuit package bond pad having plurality of conductive members
JP4517843B2 (ja) * 2004-12-10 2010-08-04 エルピーダメモリ株式会社 半導体装置
US7404513B2 (en) * 2004-12-30 2008-07-29 Texas Instruments Incorporated Wire bonds having pressure-absorbing balls
US20080014732A1 (en) * 2006-07-07 2008-01-17 Yanping Li Application of PVD W/WN bilayer barrier to aluminum bondpad in wire bonding
DE102006043133B4 (de) * 2006-09-14 2009-09-24 Infineon Technologies Ag Anschlusspad zu einem Kontaktieren eines Bauelements und Verfahren zu dessen Herstellung
US7652378B2 (en) * 2006-10-17 2010-01-26 Taiwan Semiconductor Manufacturing Company, Ltd. Aluminum-based interconnection in bond pad layer
DE102006052202B3 (de) * 2006-11-06 2008-02-21 Infineon Technologies Ag Halbleiterbauelement sowie Verfahren zur Herstellung eines Halbleiterbauelements
JP4694519B2 (ja) * 2007-02-28 2011-06-08 富士通株式会社 マイクロ構造体およびマイクロ構造体製造方法
DE102007011126B4 (de) 2007-03-07 2009-08-27 Austriamicrosystems Ag Halbleiterbauelement mit Anschlusskontaktfläche
US7750852B2 (en) * 2007-04-13 2010-07-06 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
JP5034740B2 (ja) 2007-07-23 2012-09-26 ルネサスエレクトロニクス株式会社 半導体装置及びその製造方法
US7919839B2 (en) * 2007-07-24 2011-04-05 Northrop Grumman Systems Corporation Support structures for on-wafer testing of wafer-level packages and multiple wafer stacked structures
JP5205066B2 (ja) * 2008-01-18 2013-06-05 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法
US7727781B2 (en) * 2008-07-22 2010-06-01 Agere Systems Inc. Manufacture of devices including solder bumps
JP5677115B2 (ja) * 2011-02-07 2015-02-25 セイコーインスツル株式会社 半導体装置
JP5772926B2 (ja) 2013-01-07 2015-09-02 株式会社デンソー 半導体装置
IN2013CH05121A (enExample) * 2013-11-12 2015-05-29 Sandisk Technologies Inc
JP6929254B2 (ja) * 2018-08-23 2021-09-01 三菱電機株式会社 電力用半導体装置
TWI909793B (zh) * 2024-11-05 2025-12-21 聯華電子股份有限公司 半導體元件及其製作方法

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6439035A (en) * 1987-08-04 1989-02-09 Nec Corp Semiconductor device
US5248903A (en) * 1992-09-18 1993-09-28 Lsi Logic Corporation Composite bond pads for semiconductor devices
US6143396A (en) * 1997-05-01 2000-11-07 Texas Instruments Incorporated System and method for reinforcing a bond pad
US6448650B1 (en) 1998-05-18 2002-09-10 Texas Instruments Incorporated Fine pitch system and method for reinforcing bond pads in semiconductor devices
KR100319896B1 (ko) * 1998-12-28 2002-01-10 윤종용 반도체 소자의 본딩 패드 구조 및 그 제조 방법
US6187680B1 (en) * 1998-10-07 2001-02-13 International Business Machines Corporation Method/structure for creating aluminum wirebound pad on copper BEOL
JP2000183104A (ja) 1998-12-15 2000-06-30 Texas Instr Inc <Ti> 集積回路上でボンディングするためのシステム及び方法
JP2000195896A (ja) * 1998-12-25 2000-07-14 Nec Corp 半導体装置
US6803302B2 (en) * 1999-11-22 2004-10-12 Freescale Semiconductor, Inc. Method for forming a semiconductor device having a mechanically robust pad interface
JP3468188B2 (ja) * 2000-01-24 2003-11-17 ヤマハ株式会社 半導体装置とその製法
KR100421043B1 (ko) * 2000-12-21 2004-03-04 삼성전자주식회사 비정렬되고 소정 거리 이격된 섬형 절연체들의 배열을 갖는 도전막을 포함하는 집적 회로 본딩 패드
JP2002324797A (ja) * 2001-04-24 2002-11-08 Mitsubishi Electric Corp 半導体装置及びその製造方法
JP2003068740A (ja) 2001-08-30 2003-03-07 Hitachi Ltd 半導体集積回路装置およびその製造方法
KR100416614B1 (ko) 2002-03-20 2004-02-05 삼성전자주식회사 본딩패드 하부구조를 보강하기 위한 반도체 소자 및 그제조방법

Also Published As

Publication number Publication date
KR101150312B1 (ko) 2012-06-08
JP5562308B2 (ja) 2014-07-30
JP2005109491A (ja) 2005-04-21
GB2406707A (en) 2005-04-06
GB0420953D0 (en) 2004-10-20
TWI364833B (en) 2012-05-21
KR20050032013A (ko) 2005-04-06
GB2406707B (en) 2006-10-11
TW200515577A (en) 2005-05-01
JP2012028795A (ja) 2012-02-09
US6960836B2 (en) 2005-11-01
US20050067709A1 (en) 2005-03-31

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