GB2406707B - Methods and system for reinforcing a bond pad - Google Patents

Methods and system for reinforcing a bond pad

Info

Publication number
GB2406707B
GB2406707B GB0420953A GB0420953A GB2406707B GB 2406707 B GB2406707 B GB 2406707B GB 0420953 A GB0420953 A GB 0420953A GB 0420953 A GB0420953 A GB 0420953A GB 2406707 B GB2406707 B GB 2406707B
Authority
GB
United Kingdom
Prior art keywords
reinforcing
methods
bond pad
bond
pad
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
GB0420953A
Other languages
English (en)
Other versions
GB2406707A (en
GB0420953D0 (en
Inventor
Mark Adam Bachman
Daniel P Chesire
Sailesh Mansinh Merchant
John William Osenbach
Kurt George Steiner
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Agere Systems LLC
Original Assignee
Agere Systems LLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=33311157&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=GB2406707(B) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by Agere Systems LLC filed Critical Agere Systems LLC
Publication of GB0420953D0 publication Critical patent/GB0420953D0/en
Publication of GB2406707A publication Critical patent/GB2406707A/en
Application granted granted Critical
Publication of GB2406707B publication Critical patent/GB2406707B/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W42/00—Arrangements for protection of devices
    • H10W42/121—Arrangements for protection of devices protecting against mechanical damage
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/019—Manufacture or treatment of bond pads
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/29—Bond pads specially adapted therefor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/59—Bond pads specially adapted therefor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/921—Structures or relative sizes of bond pads
    • H10W72/923—Bond pads having multiple stacked layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/921—Structures or relative sizes of bond pads
    • H10W72/923—Bond pads having multiple stacked layers
    • H10W72/9232—Bond pads having multiple stacked layers with additional elements interposed between layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/931—Shapes of bond pads
    • H10W72/934—Cross-sectional shape, i.e. in side view
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/941—Dispositions of bond pads
    • H10W72/9415—Dispositions of bond pads relative to the surface, e.g. recessed, protruding
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/951—Materials of bond pads
    • H10W72/952—Materials of bond pads comprising metals or metalloids, e.g. PbSn, Ag or Cu
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/981—Auxiliary members, e.g. spacers
    • H10W72/983—Reinforcing structures, e.g. collars
GB0420953A 2003-09-30 2004-09-21 Methods and system for reinforcing a bond pad Expired - Fee Related GB2406707B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US10/675,260 US6960836B2 (en) 2003-09-30 2003-09-30 Reinforced bond pad

Publications (3)

Publication Number Publication Date
GB0420953D0 GB0420953D0 (en) 2004-10-20
GB2406707A GB2406707A (en) 2005-04-06
GB2406707B true GB2406707B (en) 2006-10-11

Family

ID=33311157

Family Applications (1)

Application Number Title Priority Date Filing Date
GB0420953A Expired - Fee Related GB2406707B (en) 2003-09-30 2004-09-21 Methods and system for reinforcing a bond pad

Country Status (5)

Country Link
US (1) US6960836B2 (enExample)
JP (2) JP4959929B2 (enExample)
KR (1) KR101150312B1 (enExample)
GB (1) GB2406707B (enExample)
TW (1) TWI364833B (enExample)

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7372153B2 (en) * 2003-10-07 2008-05-13 Taiwan Semiconductor Manufacturing Co., Ltd Integrated circuit package bond pad having plurality of conductive members
JP4517843B2 (ja) * 2004-12-10 2010-08-04 エルピーダメモリ株式会社 半導体装置
US7404513B2 (en) * 2004-12-30 2008-07-29 Texas Instruments Incorporated Wire bonds having pressure-absorbing balls
US20080014732A1 (en) * 2006-07-07 2008-01-17 Yanping Li Application of PVD W/WN bilayer barrier to aluminum bondpad in wire bonding
DE102006043133B4 (de) * 2006-09-14 2009-09-24 Infineon Technologies Ag Anschlusspad zu einem Kontaktieren eines Bauelements und Verfahren zu dessen Herstellung
US7652378B2 (en) * 2006-10-17 2010-01-26 Taiwan Semiconductor Manufacturing Company, Ltd. Aluminum-based interconnection in bond pad layer
DE102006052202B3 (de) * 2006-11-06 2008-02-21 Infineon Technologies Ag Halbleiterbauelement sowie Verfahren zur Herstellung eines Halbleiterbauelements
JP4694519B2 (ja) * 2007-02-28 2011-06-08 富士通株式会社 マイクロ構造体およびマイクロ構造体製造方法
DE102007011126B4 (de) 2007-03-07 2009-08-27 Austriamicrosystems Ag Halbleiterbauelement mit Anschlusskontaktfläche
US7750852B2 (en) * 2007-04-13 2010-07-06 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
JP5034740B2 (ja) 2007-07-23 2012-09-26 ルネサスエレクトロニクス株式会社 半導体装置及びその製造方法
US7919839B2 (en) * 2007-07-24 2011-04-05 Northrop Grumman Systems Corporation Support structures for on-wafer testing of wafer-level packages and multiple wafer stacked structures
JP5205066B2 (ja) * 2008-01-18 2013-06-05 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法
US7727781B2 (en) * 2008-07-22 2010-06-01 Agere Systems Inc. Manufacture of devices including solder bumps
JP5677115B2 (ja) * 2011-02-07 2015-02-25 セイコーインスツル株式会社 半導体装置
JP5772926B2 (ja) 2013-01-07 2015-09-02 株式会社デンソー 半導体装置
IN2013CH05121A (enExample) * 2013-11-12 2015-05-29 Sandisk Technologies Inc
JP6929254B2 (ja) * 2018-08-23 2021-09-01 三菱電機株式会社 電力用半導体装置
TWI909793B (zh) * 2024-11-05 2025-12-21 聯華電子股份有限公司 半導體元件及其製作方法

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20020000671A1 (en) * 1998-12-15 2002-01-03 Edgar R. Zuniga Bonding over integrated circuits
US20020187634A1 (en) * 1998-05-18 2002-12-12 Mukul Saran Fine pitch system and method for reinforcing bond pads in semiconductor devices
US20030045088A1 (en) * 2001-08-30 2003-03-06 Hitachi, Ltd. Method for manufacturing semiconductor integrated circuit device
US20030178644A1 (en) * 2002-03-20 2003-09-25 Samsung Electronics Co., Ltd. Reinforced bond-pad substructure and method for fabricating the same

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6439035A (en) * 1987-08-04 1989-02-09 Nec Corp Semiconductor device
US5248903A (en) * 1992-09-18 1993-09-28 Lsi Logic Corporation Composite bond pads for semiconductor devices
US6143396A (en) * 1997-05-01 2000-11-07 Texas Instruments Incorporated System and method for reinforcing a bond pad
KR100319896B1 (ko) * 1998-12-28 2002-01-10 윤종용 반도체 소자의 본딩 패드 구조 및 그 제조 방법
US6187680B1 (en) * 1998-10-07 2001-02-13 International Business Machines Corporation Method/structure for creating aluminum wirebound pad on copper BEOL
JP2000195896A (ja) * 1998-12-25 2000-07-14 Nec Corp 半導体装置
US6803302B2 (en) * 1999-11-22 2004-10-12 Freescale Semiconductor, Inc. Method for forming a semiconductor device having a mechanically robust pad interface
JP3468188B2 (ja) * 2000-01-24 2003-11-17 ヤマハ株式会社 半導体装置とその製法
KR100421043B1 (ko) * 2000-12-21 2004-03-04 삼성전자주식회사 비정렬되고 소정 거리 이격된 섬형 절연체들의 배열을 갖는 도전막을 포함하는 집적 회로 본딩 패드
JP2002324797A (ja) * 2001-04-24 2002-11-08 Mitsubishi Electric Corp 半導体装置及びその製造方法

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20020187634A1 (en) * 1998-05-18 2002-12-12 Mukul Saran Fine pitch system and method for reinforcing bond pads in semiconductor devices
US20020000671A1 (en) * 1998-12-15 2002-01-03 Edgar R. Zuniga Bonding over integrated circuits
US20030045088A1 (en) * 2001-08-30 2003-03-06 Hitachi, Ltd. Method for manufacturing semiconductor integrated circuit device
US20030178644A1 (en) * 2002-03-20 2003-09-25 Samsung Electronics Co., Ltd. Reinforced bond-pad substructure and method for fabricating the same

Also Published As

Publication number Publication date
KR101150312B1 (ko) 2012-06-08
JP5562308B2 (ja) 2014-07-30
JP2005109491A (ja) 2005-04-21
GB2406707A (en) 2005-04-06
GB0420953D0 (en) 2004-10-20
TWI364833B (en) 2012-05-21
KR20050032013A (ko) 2005-04-06
TW200515577A (en) 2005-05-01
JP2012028795A (ja) 2012-02-09
US6960836B2 (en) 2005-11-01
US20050067709A1 (en) 2005-03-31
JP4959929B2 (ja) 2012-06-27

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Legal Events

Date Code Title Description
PCNP Patent ceased through non-payment of renewal fee

Effective date: 20160921