JP4819304B2 - 半導体パッケージ - Google Patents

半導体パッケージ Download PDF

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Publication number
JP4819304B2
JP4819304B2 JP2003207767A JP2003207767A JP4819304B2 JP 4819304 B2 JP4819304 B2 JP 4819304B2 JP 2003207767 A JP2003207767 A JP 2003207767A JP 2003207767 A JP2003207767 A JP 2003207767A JP 4819304 B2 JP4819304 B2 JP 4819304B2
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JP
Japan
Prior art keywords
insulating layer
electrode
layer
semiconductor package
wiring
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP2003207767A
Other languages
English (en)
Japanese (ja)
Other versions
JP2004064082A5 (enrdf_load_stackoverflow
JP2004064082A (ja
Inventor
直典 下戸
克 菊池
孝二 松井
和宏 馬場
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP2003207767A priority Critical patent/JP4819304B2/ja
Publication of JP2004064082A publication Critical patent/JP2004064082A/ja
Publication of JP2004064082A5 publication Critical patent/JP2004064082A5/ja
Application granted granted Critical
Publication of JP4819304B2 publication Critical patent/JP4819304B2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector

Landscapes

  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
JP2003207767A 2000-10-18 2003-08-18 半導体パッケージ Expired - Lifetime JP4819304B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2003207767A JP4819304B2 (ja) 2000-10-18 2003-08-18 半導体パッケージ

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2000318449 2000-10-18
JP2000318449 2000-10-18
JP2003207767A JP4819304B2 (ja) 2000-10-18 2003-08-18 半導体パッケージ

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
JP2001265802A Division JP3546961B2 (ja) 2000-10-18 2001-09-03 半導体装置搭載用配線基板およびその製造方法、並びに半導体パッケージ

Related Child Applications (3)

Application Number Title Priority Date Filing Date
JP2005010033A Division JP4345679B2 (ja) 2000-10-18 2005-01-18 半導体装置搭載用配線基板の製造方法
JP2007257730A Division JP2008047936A (ja) 2000-10-18 2007-10-01 半導体パッケージおよびその製造方法
JP2008295444A Division JP5029581B2 (ja) 2000-10-18 2008-11-19 半導体パッケージの製造方法

Publications (3)

Publication Number Publication Date
JP2004064082A JP2004064082A (ja) 2004-02-26
JP2004064082A5 JP2004064082A5 (enrdf_load_stackoverflow) 2005-08-25
JP4819304B2 true JP4819304B2 (ja) 2011-11-24

Family

ID=31948897

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2003207767A Expired - Lifetime JP4819304B2 (ja) 2000-10-18 2003-08-18 半導体パッケージ

Country Status (1)

Country Link
JP (1) JP4819304B2 (enrdf_load_stackoverflow)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4434845B2 (ja) 2004-06-08 2010-03-17 三洋電機株式会社 半導体モジュールとその製造方法および半導体装置
JP3961537B2 (ja) * 2004-07-07 2007-08-22 日本電気株式会社 半導体搭載用配線基板の製造方法、及び半導体パッケージの製造方法
JP2006186321A (ja) 2004-12-01 2006-07-13 Shinko Electric Ind Co Ltd 回路基板の製造方法及び電子部品実装構造体の製造方法
JP5653144B2 (ja) * 2004-12-16 2015-01-14 新光電気工業株式会社 半導体パッケージの製造方法
JP4619223B2 (ja) 2004-12-16 2011-01-26 新光電気工業株式会社 半導体パッケージ及びその製造方法
JP2008084959A (ja) 2006-09-26 2008-04-10 Shinko Electric Ind Co Ltd 半導体装置及びその製造方法
KR101360600B1 (ko) * 2007-02-05 2014-02-10 엘지이노텍 주식회사 수동소자의 솔더링 실장을 위한 구조를 가지는인쇄회로기판과 인쇄회로기판을 이용한 피씨비 카드 및그의 제조방법
JP4800253B2 (ja) 2007-04-04 2011-10-26 新光電気工業株式会社 配線基板の製造方法
JP5101451B2 (ja) 2008-10-03 2012-12-19 新光電気工業株式会社 配線基板及びその製造方法
JP7335036B2 (ja) * 2019-03-29 2023-08-29 ラピスセミコンダクタ株式会社 半導体パッケージの製造方法
JP7427966B2 (ja) * 2020-01-16 2024-02-06 Tdk株式会社 電子部品
CN112831776A (zh) * 2021-02-08 2021-05-25 福州大学 一种3-3型陶瓷-聚合物介电复合材料金属化的方法

Also Published As

Publication number Publication date
JP2004064082A (ja) 2004-02-26

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