JP4738996B2 - 半導体装置 - Google Patents

半導体装置 Download PDF

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Publication number
JP4738996B2
JP4738996B2 JP2005347938A JP2005347938A JP4738996B2 JP 4738996 B2 JP4738996 B2 JP 4738996B2 JP 2005347938 A JP2005347938 A JP 2005347938A JP 2005347938 A JP2005347938 A JP 2005347938A JP 4738996 B2 JP4738996 B2 JP 4738996B2
Authority
JP
Japan
Prior art keywords
wiring board
printed wiring
semiconductor package
semiconductor
ball electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2005347938A
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English (en)
Japanese (ja)
Other versions
JP2006196874A (ja
JP2006196874A5 (https=
Inventor
康宏 澤田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Canon Inc
Original Assignee
Canon Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Canon Inc filed Critical Canon Inc
Priority to JP2005347938A priority Critical patent/JP4738996B2/ja
Priority to US11/300,230 priority patent/US7247945B2/en
Publication of JP2006196874A publication Critical patent/JP2006196874A/ja
Publication of JP2006196874A5 publication Critical patent/JP2006196874A5/ja
Application granted granted Critical
Publication of JP4738996B2 publication Critical patent/JP4738996B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/181—Printed circuits structurally associated with non-printed electric components associated with surface mounted components
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10431—Details of mounted components
    • H05K2201/10507—Involving several components
    • H05K2201/10545—Related components mounted on both sides of the PCB
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621—Components characterised by their electrical contacts
    • H05K2201/10734—Ball grid array [BGA]; Bump grid array
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H10W72/07251—Connecting or disconnecting of bump connectors characterised by changes in properties of the bump connectors during connecting
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Wire Bonding (AREA)
JP2005347938A 2004-12-13 2005-12-01 半導体装置 Expired - Fee Related JP4738996B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2005347938A JP4738996B2 (ja) 2004-12-13 2005-12-01 半導体装置
US11/300,230 US7247945B2 (en) 2004-12-13 2005-12-13 Semiconductor apparatus

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2004360498 2004-12-13
JP2004360498 2004-12-13
JP2005347938A JP4738996B2 (ja) 2004-12-13 2005-12-01 半導体装置

Publications (3)

Publication Number Publication Date
JP2006196874A JP2006196874A (ja) 2006-07-27
JP2006196874A5 JP2006196874A5 (https=) 2009-01-22
JP4738996B2 true JP4738996B2 (ja) 2011-08-03

Family

ID=36582862

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2005347938A Expired - Fee Related JP4738996B2 (ja) 2004-12-13 2005-12-01 半導体装置

Country Status (2)

Country Link
US (1) US7247945B2 (https=)
JP (1) JP4738996B2 (https=)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20060202317A1 (en) * 2005-03-14 2006-09-14 Farid Barakat Method for MCP packaging for balanced performance
JP2006303003A (ja) * 2005-04-18 2006-11-02 Toshiba Corp プリント基板、および情報処理装置
JP5313887B2 (ja) * 2007-05-31 2013-10-09 三洋電機株式会社 半導体モジュールおよび携帯機器
JP2009016398A (ja) * 2007-06-29 2009-01-22 Toshiba Corp プリント配線板構造、電子部品の実装方法および電子機器
US8399983B1 (en) * 2008-12-11 2013-03-19 Xilinx, Inc. Semiconductor assembly with integrated circuit and companion device
JP5893351B2 (ja) * 2011-11-10 2016-03-23 キヤノン株式会社 プリント回路板
JP2017037906A (ja) * 2015-08-07 2017-02-16 株式会社デンソー Ｂｇａ型部品の実装構造
JP2018056228A (ja) 2016-09-27 2018-04-05 ルネサスエレクトロニクス株式会社 半導体装置、システムインパッケージ、及び車載用システムインパッケージ
JP7192573B2 (ja) * 2019-02-28 2022-12-20 株式会社アイシン 半導体装置

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2634351B2 (ja) 1991-04-23 1997-07-23 三菱電機株式会社 半導体装置
JP3310499B2 (ja) * 1995-08-01 2002-08-05 富士通株式会社 半導体装置
JP3498461B2 (ja) 1995-12-05 2004-02-16 ソニー株式会社 電子部品
MY123146A (en) * 1996-03-28 2006-05-31 Intel Corp Perimeter matrix ball grid array circuit package with a populated center
JPH11317568A (ja) * 1998-05-06 1999-11-16 Sony Corp 配線基板の補強方法
JP2001177049A (ja) * 1999-12-20 2001-06-29 Toshiba Corp 半導体装置及びｉｃカード
US6678167B1 (en) * 2000-02-04 2004-01-13 Agere Systems Inc High performance multi-chip IC package
JP3300698B2 (ja) 2000-05-17 2002-07-08 松下電器産業株式会社 半導体実装対象中間構造体及び半導体装置の製造方法
US7247932B1 (en) * 2000-05-19 2007-07-24 Megica Corporation Chip package with capacitor
JP4577980B2 (ja) * 2000-12-13 2010-11-10 京セラ株式会社 実装基板
US6734539B2 (en) * 2000-12-27 2004-05-11 Lucent Technologies Inc. Stacked module package
CN1711636A (zh) * 2002-10-11 2005-12-21 德塞拉股份有限公司 用于多芯片封装的元件、方法和组件

Also Published As

Publication number Publication date
JP2006196874A (ja) 2006-07-27
US7247945B2 (en) 2007-07-24
US20060125097A1 (en) 2006-06-15

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