JP4619209B2 - 半導体素子実装方法および半導体素子実装装置 - Google Patents

半導体素子実装方法および半導体素子実装装置 Download PDF

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Publication number
JP4619209B2
JP4619209B2 JP2005187498A JP2005187498A JP4619209B2 JP 4619209 B2 JP4619209 B2 JP 4619209B2 JP 2005187498 A JP2005187498 A JP 2005187498A JP 2005187498 A JP2005187498 A JP 2005187498A JP 4619209 B2 JP4619209 B2 JP 4619209B2
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JP
Japan
Prior art keywords
semiconductor element
pressing
temporarily fixed
substrate
mounting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2005187498A
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English (en)
Japanese (ja)
Other versions
JP2007012641A (ja
JP2007012641A5 (enExample
Inventor
一博 登
勝彦 渡邉
一路 清水
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Corp
Panasonic Holdings Corp
Original Assignee
Panasonic Corp
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Panasonic Corp, Matsushita Electric Industrial Co Ltd filed Critical Panasonic Corp
Priority to JP2005187498A priority Critical patent/JP4619209B2/ja
Publication of JP2007012641A publication Critical patent/JP2007012641A/ja
Publication of JP2007012641A5 publication Critical patent/JP2007012641A5/ja
Application granted granted Critical
Publication of JP4619209B2 publication Critical patent/JP4619209B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/75—Apparatus for connecting with bump connectors or layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/7525—Means for applying energy, e.g. heating means
    • H01L2224/753—Means for applying energy, e.g. heating means by means of pressure
    • H01L2224/75301—Bonding head
    • H01L2224/75314—Auxiliary members on the pressing surface
    • H01L2224/75315—Elastomer inlay
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3025—Electromagnetic shielding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/35—Mechanical effects
    • H01L2924/351—Thermal stress
    • H01L2924/3511—Warping

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)
JP2005187498A 2005-06-28 2005-06-28 半導体素子実装方法および半導体素子実装装置 Expired - Fee Related JP4619209B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2005187498A JP4619209B2 (ja) 2005-06-28 2005-06-28 半導体素子実装方法および半導体素子実装装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2005187498A JP4619209B2 (ja) 2005-06-28 2005-06-28 半導体素子実装方法および半導体素子実装装置

Publications (3)

Publication Number Publication Date
JP2007012641A JP2007012641A (ja) 2007-01-18
JP2007012641A5 JP2007012641A5 (enExample) 2008-04-17
JP4619209B2 true JP4619209B2 (ja) 2011-01-26

Family

ID=37750798

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2005187498A Expired - Fee Related JP4619209B2 (ja) 2005-06-28 2005-06-28 半導体素子実装方法および半導体素子実装装置

Country Status (1)

Country Link
JP (1) JP4619209B2 (enExample)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5122192B2 (ja) * 2007-07-04 2013-01-16 パナソニック株式会社 半導体素子実装装置
JP5024117B2 (ja) * 2007-10-09 2012-09-12 日立化成工業株式会社 回路部材の実装方法
US9362196B2 (en) * 2010-07-15 2016-06-07 Kabushiki Kaisha Toshiba Semiconductor package and mobile device using the same
KR102191179B1 (ko) * 2019-02-07 2020-12-15 (주)에이피텍 정렬판이 포함되는 펄스 히트 파워 디스펜싱 용액 경화 히터
JP7117805B2 (ja) * 2020-07-16 2022-08-15 株式会社新川 実装装置

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0671032B2 (ja) * 1988-11-01 1994-09-07 松下電器産業株式会社 電子部品の実装装置
JPH05144881A (ja) * 1991-11-18 1993-06-11 Matsushita Electric Ind Co Ltd 実装装置及び半導体装置の製造方法
JPH09107008A (ja) * 1995-10-12 1997-04-22 Oki Electric Ind Co Ltd 半導体素子の実装方法及びその装置
JP4119031B2 (ja) * 1999-03-25 2008-07-16 株式会社東芝 レベリング装置、レベリング方法、ボンディング装置及びボンディング方法
JP4418054B2 (ja) * 1999-08-25 2010-02-17 富士通マイクロエレクトロニクス株式会社 電子部品の実装方法
JP4562309B2 (ja) * 2001-04-05 2010-10-13 東レエンジニアリング株式会社 チップボンディング方法およびその装置
JP3723761B2 (ja) * 2001-11-12 2005-12-07 松下電器産業株式会社 電子部品の実装装置

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Publication number Publication date
JP2007012641A (ja) 2007-01-18

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