JP4619209B2 - Semiconductor element mounting method and semiconductor element mounting apparatus - Google Patents

Semiconductor element mounting method and semiconductor element mounting apparatus Download PDF

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JP4619209B2
JP4619209B2 JP2005187498A JP2005187498A JP4619209B2 JP 4619209 B2 JP4619209 B2 JP 4619209B2 JP 2005187498 A JP2005187498 A JP 2005187498A JP 2005187498 A JP2005187498 A JP 2005187498A JP 4619209 B2 JP4619209 B2 JP 4619209B2
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semiconductor element
pressing
temporarily fixed
substrate
mounting
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JP2007012641A (en
JP2007012641A5 (en
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一博 登
勝彦 渡邉
一路 清水
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Panasonic Corp
Panasonic Holdings Corp
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Panasonic Corp
Matsushita Electric Industrial Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/75—Apparatus for connecting with bump connectors or layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/7525—Means for applying energy, e.g. heating means
    • H01L2224/753—Means for applying energy, e.g. heating means by means of pressure
    • H01L2224/75301—Bonding head
    • H01L2224/75314—Auxiliary members on the pressing surface
    • H01L2224/75315—Elastomer inlay
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3025—Electromagnetic shielding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/35—Mechanical effects
    • H01L2924/351—Thermal stress
    • H01L2924/3511—Warping

Description

基板に半導体素子を実装する半導体素子実装方法に関するものである。   The present invention relates to a semiconductor element mounting method for mounting a semiconductor element on a substrate.

近年、携帯電話やデジタルカメラなどの小型軽量化を求められている製品において、電気回路基板の薄型化や、実装構造における小型化へのニーズが高まっている。
このような状況のなか、基板技術においては、多層で貫通ビアを持つ樹脂基板から、多層でインナービアを持つ薄型の樹脂基板に変化し、さらにポリイミドフィルムを用いたフレキシブル基板に進化している。 In recent years, in products that are required to be smaller and lighter, such as mobile phones and digital cameras, there is an increasing need for thinner electric circuit boards and smaller mounting structures.
Under such circumstances, the substrate technology has changed from a multilayer resin substrate having through vias to a thin resin substrate having multilayer inner vias, and has further evolved into a flexible substrate using a polyimide film.

また半導体技術も、基板の上にパッケージされた半導体素子を半田付けする表面実装技術から、パッケージしない半導体素子を回路基板に直接に実装するベアチップ実装技術分野の中で、半導体素子のアクティブ面をフェイスダウンで回路基板面に実装するフリップチップ実装技術へと進化している。   Semiconductor technology also includes the active surface of a semiconductor element in a face-chip mounting technology field in which a semiconductor element that is not packaged is directly mounted on a circuit board, from a surface mounting technique that solders a semiconductor element packaged on a substrate. It has evolved into a flip chip mounting technology that mounts on the circuit board surface down.

従来のフリップチップ技術において、位置ズレを防止する方法として仮止め用接着剤を用いた実装方法がある（例えば、特許文献１を参照）。
図５において、半導体素子１をフレキシブル基板２の上に実装する工程を説明する。３は仮止め用接着剤、４は搬送台、５は高温になる加熱加圧ツールである。 In the conventional flip chip technology, there is a mounting method using a temporary fixing adhesive as a method for preventing misalignment (see, for example, Patent Document 1).
In FIG. 5, a process of mounting the semiconductor element 1 on the flexible substrate 2 will be described. 3 is an adhesive for temporary fixing, 4 is a transport table, and 5 is a heating and pressing tool that becomes high temperature.

最初に、半導体素子１のアクティブ面にあるアルミ電極６に突起電極７を形成し、突起電極７の上に導電性接着剤８を転写する。
次に、仮止め用接着剤３をディスペンス工法によりフレキシブル基板２上の半導体素子１を実装する部分に塗布する。 First, the protruding electrode 7 is formed on the aluminum electrode 6 on the active surface of the semiconductor element 1, and the conductive adhesive 8 is transferred onto the protruding electrode 7.
Next, the temporary fixing adhesive 3 is applied to the portion on the flexible substrate 2 where the semiconductor element 1 is mounted by a dispensing method.

次に、導電性接着剤８が転写された突起電極７がフレキシブル基板２の上の基板電極９に接触するように位置合わせしながら実装する。その時点で、仮止め用接着剤３と半導体素子１が接触する。   Next, mounting is performed while positioning so that the protruding electrode 7 to which the conductive adhesive 8 has been transferred contacts the substrate electrode 9 on the flexible substrate 2. At that time, the temporary fixing adhesive 3 and the semiconductor element 1 come into contact with each other.

次に、仮止め用接着剤３を加熱により硬化させる。このときに加熱する手段としては、フレキシブル基板２および半導体素子１を含め全体を加熱する場合や、搬送台４に設けた穴４ａを利用して微細なヒーターやレーザーを用いてスポット加熱する場合がある。仮止め用接着剤３が硬化すると、フレキシブル基板２と半導体素子１の実装位置が固定され、位置ズレが発生しにくい。その後、必要に応じて接合信頼性を向上させるために半導体素子１とフレキシブル基板２との隙間に封止樹脂を流し込み、加熱により硬化させる。
特開平９−３３１１４８号公報 Next, the temporary fixing adhesive 3 is cured by heating. As a means for heating at this time, there are a case where the entire substrate including the flexible substrate 2 and the semiconductor element 1 is heated, or a case where spot heating is performed using a fine heater or laser using the hole 4a provided in the transport table 4. is there. When the temporary fixing adhesive 3 is cured, the mounting positions of the flexible substrate 2 and the semiconductor element 1 are fixed, and misalignment hardly occurs. Thereafter, a sealing resin is poured into the gap between the semiconductor element 1 and the flexible substrate 2 in order to improve the bonding reliability as required, and is cured by heating.
JP 9-331148 A

しかしこの従来の方法では、仮止め用接着剤３を用いて半導体素子１とフレキシブル基板２とを仮止め固定する工程と、半導体素子１とフレキシブル基板２との隙間に封止樹脂を流し込み加熱により硬化させて接合信頼性を確保するために固定する工程とが、別工程であって工程数が増大している。   However, in this conventional method, the step of temporarily fixing and fixing the semiconductor element 1 and the flexible substrate 2 using the temporary fixing adhesive 3, and the sealing resin is poured into the gap between the semiconductor element 1 and the flexible substrate 2 and heated. The process of hardening and securing the bonding reliability is a separate process and the number of processes is increasing.

また、半導体素子１の面積に対し、仮止め用接着剤３を塗布する面積が小さく、半導体素子１に水平方向の力を与えると、仮止め用接着剤３の弾性により仮止め位置がマイクロメーターのオーダーで移動する問題がある。   Further, when the area for applying the temporary fixing adhesive 3 is smaller than the area of the semiconductor element 1 and a horizontal force is applied to the semiconductor element 1, the temporary fixing position is set to a micrometer due to the elasticity of the temporary fixing adhesive 3. There is a problem of moving in the order of.

また、１枚の回路基板に複数の半導体素子１を実装する場合において、高温になった加熱加圧ツール５からの輻射熱１０のために隣接した半導体素子１ｂ，１ｃの温度が高くなり、接合に用いる接着材の反応が進むため、接合不良になることがある。このため、隣接間距離を狭くすることができず、高密度実装ができない問題がある。   Further, when a plurality of semiconductor elements 1 are mounted on a single circuit board, the temperature of the adjacent semiconductor elements 1b and 1c increases due to the radiant heat 10 from the heating and pressing tool 5 that has become high temperature. Since the reaction of the adhesive to be used proceeds, bonding failure may occur. For this reason, there is a problem that the distance between adjacent portions cannot be reduced and high-density mounting cannot be performed.

本発明は、半導体素子の仮止めの位置ズレがなく、しかも実装工程を少なくでき、かつ高密度実装ができる半導体素子の実装方法を提供することを目的とする。   SUMMARY OF THE INVENTION An object of the present invention is to provide a method for mounting a semiconductor element that does not cause misalignment of the temporary fixing of the semiconductor element, can reduce the mounting process, and can perform high-density mounting.

本発明の請求項１記載の半導体素子実装方法は、基板に仮止めされた半導体素子を高温の加熱加圧ツールで押圧して実装するに際し、仮止め中の前記半導体素子に接触して基板との平行度を矯正し、その後に前記加熱加圧ツールが仮止め中の前記半導体素子に近接して押圧して実装するとともに、仮止め中の半導体素子に接触して基板との平行度を矯正する工程は、半導体素子をテープにて押圧することを特徴とする。
本発明の請求項２記載の半導体素子実装方法は、基板に仮止めされた半導体素子を高温の加熱加圧ツールで押圧して実装するに際し、仮止め中の前記半導体素子に接触して基板との平行度を矯正し、その後に前記加熱加圧ツールが仮止め中の前記半導体素子に近接して押圧する工程では、前記半導体素子に隣接する実装部品との間に熱遮蔽部を介装して前記加熱加圧ツールから前記実装部品への熱伝導を遮蔽して実装するとともに、仮止め中の半導体素子に接触して基板との平行度を矯正する工程は、半導体素子をテープにて押圧することを特徴とする。 In the semiconductor element mounting method according to claim 1 of the present invention, when the semiconductor element temporarily fixed on the substrate is mounted by pressing with a high-temperature heating and pressing tool, the semiconductor element is in contact with the temporarily fixed semiconductor element and the substrate. After that, the heating and pressurizing tool is pressed close to the semiconductor element being temporarily fixed and mounted , and the parallelism with the substrate is corrected by contacting the semiconductor element being temporarily fixed. The step of performing is characterized by pressing the semiconductor element with a tape .
In the semiconductor element mounting method according to claim 2 of the present invention, when the semiconductor element temporarily fixed to the substrate is mounted by pressing with a high-temperature heating and pressing tool, the semiconductor element is in contact with the temporarily fixed semiconductor element and the substrate. In the process of correcting the parallelism of the semiconductor element and then pressing the heating and pressing tool close to the semiconductor element being temporarily fixed, a heat shielding part is interposed between the mounting parts adjacent to the semiconductor element. The process of shielding the heat conduction from the heating / pressurizing tool to the mounting component and mounting , and correcting the parallelism with the substrate by contacting the semiconductor element being temporarily fixed is performed by pressing the semiconductor element with a tape. characterized in that it.

本発明の請求項３記載の半導体素子実装装置は、基板に仮止めされた半導体素子を高温の加熱加圧ツールで押圧して実装する半導体素子実装装置であって、仮止め中の前記半導体素子を押圧して基板との平行度を矯正する部品姿勢矯正手段と、前記加熱加圧ツールが仮止め中の前記半導体素子に近接して押圧する押圧手段とを設け、前記部品姿勢矯正手段は、架張されたテープにて前記半導体素子を押圧するよう構成したことを特徴とする。
本発明の請求項４記載の半導体素子実装装置は、基板に仮止めされた半導体素子を高温の加熱加圧ツールで押圧して実装する半導体素子実装装置であって、仮止め中の前記半導体素子を押圧して基板との平行度を矯正する部品姿勢矯正手段と、前記加熱加圧ツールが仮止め中の前記半導体素子に近接して押圧する状態で前記半導体素子に隣接する実装部品との間に熱遮蔽部を介装して熱伝導を遮蔽する熱遮蔽手段とを設け、前記部品姿勢矯正手段は、架張されたテープにて前記半導体素子を押圧するよう構成したことを特徴とする。 A semiconductor element mounting apparatus according to claim 3 of the present invention is a semiconductor element mounting apparatus for mounting by pressing a semiconductor element temporarily fixed to a substrate with a high-temperature heating and pressing tool, wherein the semiconductor element is temporarily fixed The component posture correcting means for correcting the parallelism with the substrate by pressing and the pressing means for pressing the heating and pressing tool close to the semiconductor element being temporarily fixed, the component posture correcting means, The semiconductor element is configured to be pressed with a stretched tape .
A semiconductor element mounting apparatus according to claim 4 of the present invention is a semiconductor element mounting apparatus for mounting by pressing a semiconductor element temporarily fixed to a substrate with a high-temperature heating and pressing tool, wherein the semiconductor element being temporarily fixed Between the component posture correcting means for correcting the parallelism with the substrate by pressing and the mounting component adjacent to the semiconductor element in a state where the heating and pressing tool presses close to the semiconductor element being temporarily fixed Heat shielding means for shielding heat conduction through a heat shielding portion, and the component posture correcting means is configured to press the semiconductor element with a stretched tape. .

本発明の請求項５記載の半導体素子実装装置は、基板に仮止めされた半導体素子を高温の加熱加圧ツールで押圧して実装する半導体素子実装装置であって、仮止め中の前記半導体素子を押圧して基板との平行度を矯正する部品姿勢矯正手段と、前記加熱加圧ツールが仮止め中の前記半導体素子に近接して押圧する押圧手段と、前記加熱加圧ツールが仮止め中の前記半導体素子に近接して押圧する状態で前記半導体素子に隣接する実装部品との間に熱遮蔽部を介装して熱伝導を遮蔽する熱遮蔽手段とを設け、前記部品姿勢矯正手段と熱遮蔽手段が一体構造であり、仮止め中の半導体素子をテープにて押圧して基板との平行度を矯正するよう構成し、かつ前記テープを支持するテープ支持部を隣接する実装部品との間に介装して熱伝導を遮蔽する熱遮蔽部として構成したことを特徴とする。
本発明の請求項６記載の半導体素子実装装置は、請求項４において、前記部品姿勢矯正手段と熱遮蔽手段が一体構造であり、仮止め中の半導体素子をテープにて押圧して基板との平行度を矯正するよう構成し、かつ前記テープを押圧するテープ支持部を隣接する実装部品との間に介装して熱伝導を遮蔽する熱遮蔽部となるよう構成したことを特徴とする。 A semiconductor element mounting apparatus according to claim 5 of the present invention is a semiconductor element mounting apparatus for mounting by pressing a semiconductor element temporarily fixed to a substrate with a high-temperature heating and pressing tool, and the semiconductor element being temporarily fixed The component posture correcting means for correcting the parallelism with the substrate by pressing the pressing means, the pressing means for pressing the heating and pressing tool close to the semiconductor element being temporarily fixed, and the heating and pressing tool being temporarily fixed A heat shielding means for shielding heat conduction through a heat shielding portion between the mounting component adjacent to the semiconductor element in a state of pressing in the vicinity of the semiconductor element, and the component posture correcting means; The heat shielding means has an integral structure, and is configured to correct the parallelism with the substrate by pressing the semiconductor element being temporarily fixed with a tape, and the tape support portion for supporting the tape with an adjacent mounting component. Shield the heat conduction with a gap Characterized by being configured as a shield unit.
According to a sixth aspect of the present invention, there is provided the semiconductor element mounting apparatus according to the fourth aspect , wherein the component posture correcting means and the heat shielding means are integrated, and the temporarily fixed semiconductor element is pressed with a tape to It is configured to correct parallelism, and is configured to be a heat shielding part that shields heat conduction by interposing a tape support part that presses the tape between adjacent mounting parts.

この構成によると、半導体素子と回路基板の電気的かつ機械的に接合する工程において位置ズレすることなく、高密度実装できる。 According to this arrangement, without misalignment in the step of electrically and mechanically bonding the semiconductor element and the circuit board, it high density mounting.

以下、本発明の半導体素子実装方法を具体的な実施の形態に基づいて説明する。
図１（ａ）（ｂ）は本発明の半導体素子実装方法の実施に使用する半導体素子実装装置を示す。 Hereinafter, a semiconductor device mounting method of the present invention will be described based on specific embodiments.
FIGS. 1A and 1B show a semiconductor element mounting apparatus used for carrying out the semiconductor element mounting method of the present invention.

フレキシブル基板２が載置された搬送台４に対して、昇降が自在のホルダー１１は、中央に加熱加圧ツール５が通過する連通孔１２が形成されている。また、このホルダー１１には、下降した状態でフレキシブル基板２を押さえる基板当接部１３ａ，１３ｂが設けられている。このホルダー１１には、基板当接部１３ａ，１３ｂの先端に切り欠き１４が形成されている。さらに、基板当接部１３ａ，１３ｂの間隔は、半導体素子１に応じてそれよりも幅広の間隔の所定間隔に配置されており、基板当接部１３ａの切り欠き１４と基板当接部１３ｂの切り欠き１４を通過してテープ１５が架張されている。詳しくは、テープ１５の巻装体は軸１６にセットされており、この巻装体から引き出されたテープ１５が巻き取り軸１７に巻き取られている。軸１６と巻き取り軸１７もホルダー１１に取り付けられている。   A holder 11 that can freely move up and down with respect to the carrier 4 on which the flexible substrate 2 is placed has a communication hole 12 through which the heating and pressing tool 5 passes. The holder 11 is provided with substrate contact portions 13a and 13b for holding the flexible substrate 2 in a lowered state. The holder 11 has a notch 14 formed at the tips of the substrate contact portions 13a and 13b. Further, the interval between the substrate contact portions 13a and 13b is arranged at a predetermined interval wider than that according to the semiconductor element 1, and the notch 14 of the substrate contact portion 13a and the substrate contact portion 13b are spaced apart from each other. The tape 15 is stretched through the notch 14. Specifically, the wound body of the tape 15 is set on the shaft 16, and the tape 15 drawn out from the wound body is wound on the winding shaft 17. A shaft 16 and a winding shaft 17 are also attached to the holder 11.

なお、テープ１５は１２．５μｍ厚のポリイミドフィルムと５．０μｍ厚のフッ化樹脂フィルムの２層構造で、そのポリイミドフィルムの弾性率は５５０ＭＰａ、フッ化樹脂フィルムの弾性率は３９２ＭＰａのものを使用している。   The tape 15 has a two-layer structure of a polyimide film with a thickness of 12.5 μm and a fluororesin film with a thickness of 5.0 μm. The elastic modulus of the polyimide film is 550 MPa, and the elastic modulus of the fluororesin film is 392 MPa. is doing.

図２（ａ）（ｂ）（ｃ）は図１に示した実装装置にセットする前のフレキシブル基板２の作成工程を示しており、次のようにして半導体素子１が仮止めされている。
図２（ａ）では、フレキシブル基板２の上に、カットした樹脂シート１８を貼り付ける。具体的には、樹脂シート供給用テープ１９に貼られた樹脂シートにカット部２０を入れた後に、加熱加圧ツール２１を用いて半導体素子の実装領域のみに樹脂シート供給用テープ１９の上から押圧する。この時の加熱加圧ツール２１の温度は樹脂シート１８が硬化反応を起こさず、かつ、樹脂シート１８の軟化を起こさせフレキシブル基板２への貼り付けを容易にする温度が必要であり、通常６０〜１００℃、０．１〜１秒の押圧で貼り付けを行う。 FIGS. 2A, 2B, and 2C show a process of creating the flexible substrate 2 before being set in the mounting apparatus shown in FIG. 1, and the semiconductor element 1 is temporarily fixed as follows.
In FIG. 2A, the cut resin sheet 18 is pasted on the flexible substrate 2. Specifically, after the cut portion 20 is put in the resin sheet affixed to the resin sheet supply tape 19, the heating and pressurizing tool 21 is used only on the semiconductor element mounting area from above the resin sheet supply tape 19. Press. The temperature of the heating and pressing tool 21 at this time needs to be a temperature at which the resin sheet 18 does not cause a curing reaction, and the resin sheet 18 is softened to be easily attached to the flexible substrate 2. Pasting is performed at a pressure of ˜100 ° C. for 0.1 to 1 second.

次に図２（ｂ）に示すように、フレキシブル基板２を作業台２２に吸着させてフラットにした状態で、半導体素子１を実装ヘッド２３で真空吸着してホールドし、基板電極９と半導体素子１に形成した突起電極７が接するように荷重１〜３ｋｇｆ程度で±５μｍ以下の精度で半導体素子１を仮止めする。   Next, as shown in FIG. 2B, in a state where the flexible substrate 2 is attracted to the work table 22 and flattened, the semiconductor element 1 is vacuum-sucked and held by the mounting head 23, and the substrate electrode 9 and the semiconductor element The semiconductor element 1 is temporarily fixed with an accuracy of ± 5 μm or less with a load of about 1 to 3 kgf so that the protruding electrode 7 formed in 1 is in contact.

次に図２（ｃ）では、作業台２２の吸着をオフし、フレキシブル基板２を作業台２２から取り外し、図１の搬送台４に乗せ換える。その時点でフレキシブル基板２は変形し、中央の半導体素子１のようにマウント状態が変化する場合がある。また、フレキシブル基板２のそれ自身の反りが原因でマウント状態が変化する場合がある。   Next, in FIG.2 (c), adsorption | suction of the worktable 22 is turned off, the flexible substrate 2 is removed from the worktable 22, and it changes to the conveyance stand 4 of FIG. At that time, the flexible substrate 2 may be deformed, and the mounting state may change as in the semiconductor device 1 in the center. Further, the mount state may change due to the warpage of the flexible substrate 2 itself.

このようにマウント状態が変化した半導体素子１を有したフレキシブル基板２を図１の搬送台４に乗せ換えた直後の状態を図３（ａ）に示す。この際には、前記ホルダー１１と加熱加圧ツール５は共に上昇位置にある。   FIG. 3A shows a state immediately after the flexible substrate 2 having the semiconductor element 1 whose mounting state has been changed as described above is transferred to the transport table 4 in FIG. At this time, both the holder 11 and the heating and pressing tool 5 are in the raised position.

図３（ｂ）では、ホルダー１１と加熱加圧ツール５が一体に降下を始める。降下中のホルダー１１の前記基板当接部１３ａ，１３ｂの間に所定のテンションで架張された前記テープ１５が半導体素子１の背面に当接し、さらにホルダー１１が降下することによって、前記マウント状態が変化した半導体素子１にテープ１５から半導体素子１へ下向きの力が働き、半導体素子１の傾きが矯正される。なお、ここではテープ１５の弾性が有効に作用して、ホルダー１１の降下量が一定であっても、半導体素子１の各種の傾きを矯正できる。   In FIG. 3B, the holder 11 and the heating and pressing tool 5 begin to descend integrally. The tape 15 stretched between the substrate contact portions 13a and 13b of the lowering holder 11 with a predetermined tension comes into contact with the back surface of the semiconductor element 1, and the holder 11 is further lowered so that the mounted state is achieved. A downward force is applied from the tape 15 to the semiconductor element 1 on the semiconductor element 1 having changed, and the inclination of the semiconductor element 1 is corrected. Here, even if the elasticity of the tape 15 acts effectively and the amount of lowering of the holder 11 is constant, various inclinations of the semiconductor element 1 can be corrected.

さらにホルダー１１を降下させると、基板当接部１３ａ，１３ｂの先端が図４（ａ）のようにフレキシブル基板２に接触し、フレキシブル基板２に下方の力を加える。この力でフレキシブル基板２の反りを直し、搬送台４にフレキシブル基板２を密着させ、同時にフレキシブル基板２と半導体素子１を平行にする。   When the holder 11 is further lowered, the tips of the substrate contact portions 13a and 13b come into contact with the flexible substrate 2 as shown in FIG. 4A, and a downward force is applied to the flexible substrate 2. With this force, the warp of the flexible substrate 2 is corrected, the flexible substrate 2 is brought into close contact with the carrier 4, and at the same time, the flexible substrate 2 and the semiconductor element 1 are made parallel.

次に、図４（ｂ）に示すように、ホルダー１１でフレキシブル基板２に下方の力を加えたまま、ホルダー１１に対して加熱加圧ツール５を降下させて、テープ１５を介して半導体素子１を押圧して加熱する。接合条件は３０〜７０ｋｇｆの加圧、１８０〜２００℃の加熱を、１０〜２０秒間行う。なお、加熱加圧ツール５のテープ１５との当接面にはダイヤモンドチップ５ａが取り付けられている。   Next, as shown in FIG. 4B, the heating and pressing tool 5 is lowered with respect to the holder 11 while applying a downward force to the flexible substrate 2 with the holder 11, and the semiconductor element is interposed via the tape 15. 1 is pressed and heated. The joining conditions are 30-70 kgf pressurization and 180-200 ° C. heating for 10-20 seconds. A diamond tip 5 a is attached to the contact surface of the heating and pressing tool 5 with the tape 15.

この圧着工程において、突起電極７は基板電極９上で変形しながら接触面積を増加させて電気的接続を得る。同時に樹脂シート１８に加えた熱により、樹脂硬化反応を起こし、突起電極７と基板電極９が電気的に接続した状態を維持する。   In this crimping step, the protruding electrode 7 is deformed on the substrate electrode 9 to increase the contact area to obtain electrical connection. At the same time, the resin curing reaction is caused by the heat applied to the resin sheet 18, and the protruding electrode 7 and the substrate electrode 9 are maintained in an electrically connected state.

さらにこの図４（ｂ）から明らかなように、加熱加圧ツール５が半導体素子１を押圧している１０〜２０秒間の状態に注目すると、隣接する実装部品としての半導体素子１ｂと加熱加圧ツール５との間には、基板当接部１３ａの前記切り欠き部１４よりも上部の熱遮蔽部としてのテープ支持部２４ａが介在して熱輻射を遮蔽している。また隣接する実装部品としての半導体素子１ｃと加熱加圧ツール５との間には、基板当接部１３ｂの前記切り欠き部１４よりも上部の熱遮蔽部としてのテープ支持部２４ｂが介在して熱輻射を遮蔽している。このように加熱加圧ツール５から半導体素子１ｂ，１ｃへの熱輻射を遮ることによって、高密度実装の場合であっても正常な実装状態が得られる。また搬送台４からの熱伝導を抑えるために、本実施例では、搬送台４を１つの半導体素子サイズよりも僅かに大きな小型化したものを使用し、２つの効果により、半導体素子１ｂ，１ｃの樹脂シート１８の熱硬化反応が発生せず、良好な接合を得ている。具体的には、熱遮蔽部２４ａ，２４ｂを設けなかった場合には、図４（ｂ）の工程を実施した場合には、半導体素子１ｂ，１ｃの温度が８０〜１００℃に上昇したが、テープ支持部２４ａ，２４ｂを設けることによって４０〜６０℃に抑制された。   Further, as apparent from FIG. 4B, when attention is paid to the state of 10 to 20 seconds in which the heating and pressing tool 5 presses the semiconductor element 1, the semiconductor element 1b as the adjacent mounting component and the heating and pressing state are observed. Between the tool 5 and the notch part 14 of the board | substrate contact part 13a, the tape support part 24a as a heat shielding part is interposed, and heat radiation is shielded. Further, a tape support portion 24b as a heat shielding portion above the notch portion 14 of the substrate contact portion 13b is interposed between the semiconductor element 1c as the adjacent mounting component and the heating and pressing tool 5. Shields heat radiation. Thus, by blocking the heat radiation from the heating and pressing tool 5 to the semiconductor elements 1b and 1c, a normal mounting state can be obtained even in the case of high-density mounting. In order to suppress the heat conduction from the transfer table 4, in this embodiment, the transfer table 4 having a size slightly larger than one semiconductor element is used, and the semiconductor elements 1b and 1c are obtained by two effects. The resin sheet 18 does not undergo a thermosetting reaction, and good bonding is obtained. Specifically, when the heat shielding portions 24a and 24b are not provided, the temperature of the semiconductor elements 1b and 1c is increased to 80 to 100 ° C. when the process of FIG. By providing the tape support portions 24a and 24b, the temperature was suppressed to 40 to 60 ° C.

樹脂シート１８の硬化により半導体素子１とフレキシブル基板３とが電気的に接続され、かつ機械的に固定された状態になると、図４（ｃ）に示すように加熱加圧ツール５を上昇させ、加熱と加圧を終了させる。その後にホルダー１１を上昇させて１つの半導体素子の実装を終了する。   When the semiconductor element 1 and the flexible substrate 3 are electrically connected and mechanically fixed by curing the resin sheet 18, the heating and pressing tool 5 is raised as shown in FIG. Finish heating and pressurization. Thereafter, the holder 11 is raised to complete the mounting of one semiconductor element.

なお、単数または複数の半導体素子の実装が完了するたびに、巻き取り軸１７に巻き取られて更新されている。
なお、上記の実施の形態において、仮止め中の前記半導体素子１を押圧してフレキシブル基板２との平行度を矯正する部品姿勢矯正手段は、ホルダー１１に架張されたテープ１５によって構成されている。また、加熱加圧ツール５が仮止め中の前記半導体素子１に近接して押圧する状態で前記半導体素子１に隣接する実装部品との間に熱遮蔽部を介装して熱伝導を遮蔽する熱遮蔽手段は、ホルダー１１に設けられてテープ１５を支持しているテープ支持部２４ａ，２４ｂによって構成されている。
なお、上記の実施の形態では基板の具体例がフレキシブル基板２の場合を例に挙げて説明したが、弾性を有する多層基板の場合にも同様に実施できる。 Each time the mounting of one or a plurality of semiconductor elements is completed, it is wound around the winding shaft 17 and updated.
In the above embodiment, the component posture correcting means for correcting the parallelism with the flexible substrate 2 by pressing the semiconductor element 1 being temporarily fixed is constituted by the tape 15 stretched on the holder 11. Yes. In addition, a heat shielding part is interposed between the mounting component adjacent to the semiconductor element 1 in a state where the heating and pressing tool 5 is pressed close to the semiconductor element 1 being temporarily fixed, thereby shielding heat conduction. The heat shielding means is configured by tape support portions 24 a and 24 b provided on the holder 11 and supporting the tape 15.
In the above embodiment, the case where the specific example of the substrate is the flexible substrate 2 has been described as an example. However, the present invention can be similarly applied to a multilayer substrate having elasticity.

本発明は、例えば、薄く反り易い樹脂で出来たフレキシブル基板に、複数の半導体素子をフリップチップ実装工法を実施する際に、基板の反りと半導体素子の傾きを矯正し、かつ隣接半導体素子の輻射熱による温度上昇を抑え、位置ズレが無く、良好な接合品質を得ることができ、小型軽量化が要求される携帯電話装置やデジタルカメラなどの製品に使用される半導体パッケージの良好な実装を期待できる。   The present invention, for example, corrects the warpage of the semiconductor element and the inclination of the semiconductor element when performing the flip chip mounting method on a flexible substrate made of a thin and easily warped resin, and radiant heat of the adjacent semiconductor element. The temperature rise due to the above can be suppressed, there is no positional deviation, good bonding quality can be obtained, and good mounting of semiconductor packages used in products such as mobile phone devices and digital cameras that require miniaturization and weight reduction can be expected .

本発明の半導体素子実装方法の実施に使用する実装装置の正面図と側面図Front view and side view of mounting apparatus used for carrying out semiconductor device mounting method of present invention 同実施の形態の実装装置にセットするフレキシブル基板の加工工程図Process diagram of flexible substrate set in mounting device of same embodiment 同実施の形態の実装装置における運転前半の工程図Process diagram of the first half of operation in the mounting apparatus of the same embodiment 同実施の形態の実装装置における運転後半の工程図Process diagram in the latter half of operation in the mounting apparatus of the same embodiment 従来の実装方法の説明図Explanatory drawing of conventional mounting method 従来の仮止めした半導体素子の位置ずれ状態の説明図Explanatory drawing of misaligned state of conventional temporarily fixed semiconductor element

符号の説明Explanation of symbols

１ 半導体素子
２ フレキシブル基板
４ 搬送台
５ 加熱加圧ツール
５ａ ダイヤモンドチップ
７ 突起電極
９ 基板電極
１１ ホルダー
１２ 連通孔
１３ａ，１３ｂ 基板当接部
１４ 切り欠き
１５ テープ
１６ 軸
１７ 巻き取り軸
１８ 樹脂シート
１９ 樹脂シート供給用テープ
２０ カット部
２１ 加熱加圧ツール
２２ 作業台
２３ 実装ヘッド
２４ａ，２４ｂ テープ支持部（熱遮蔽部） DESCRIPTION OF SYMBOLS 1 Semiconductor element 2 Flexible substrate 4 Carriage 5 Heating and pressing tool 5a Diamond chip 7 Protruding electrode 9 Substrate electrode 11 Holder 12 Communication hole 13a, 13b Substrate contact part 14 Notch 15 Tape 16 Shaft 17 Winding shaft 18 Resin sheet 19 Resin sheet supply tape 20 Cut section 21 Heating and pressing tool 22 Work table 23 Mounting heads 24a and 24b Tape support section (heat shielding section)

Claims (6)

基板に仮止めされた半導体素子を高温の加熱加圧ツールで押圧して実装するに際し、
仮止め中の前記半導体素子に接触して基板との平行度を矯正し、
その後に前記加熱加圧ツールが仮止め中の前記半導体素子に近接して押圧して実装するとともに、仮止め中の半導体素子に接触して基板との平行度を矯正する工程は、半導体素子をテープにて押圧する
半導体素子実装方法。 When mounting the semiconductor element temporarily fixed to the substrate with a high-temperature heating and pressing tool,
Correct the parallelism with the substrate in contact with the semiconductor element being temporarily fixed,
Thereafter, the heating and pressing tool presses and mounts close to the semiconductor element being temporarily fixed, and the step of contacting the semiconductor element being temporarily fixed and correcting the parallelism with the substrate includes the steps of: Method of mounting semiconductor device by pressing with tape . 基板に仮止めされた半導体素子を高温の加熱加圧ツールで押圧して実装するに際し、
仮止め中の前記半導体素子に接触して基板との平行度を矯正し、
その後に前記加熱加圧ツールが仮止め中の前記半導体素子に近接して押圧する工程では、前記半導体素子に隣接する実装部品との間に熱遮蔽部を介装して前記加熱加圧ツールから前記実装部品への熱伝導を遮蔽して実装する
とともに、仮止め中の半導体素子に接触して基板との平行度を矯正する工程は、半導体素子をテープにて押圧する
半導体素子実装方法。 When mounting the semiconductor element temporarily fixed to the substrate with a high-temperature heating and pressing tool,
Correct the parallelism with the substrate in contact with the semiconductor element being temporarily fixed,
Thereafter, in the step of pressing the heating and pressing tool close to the semiconductor element being temporarily fixed, a heat shielding part is interposed between the mounting component adjacent to the semiconductor element and the heating and pressing tool from the heating and pressing tool. Mounted by shielding heat conduction to the mounting parts
At the same time, the step of correcting the parallelism with the substrate by contacting the temporarily fixed semiconductor element presses the semiconductor element with a tape . 基板に仮止めされた半導体素子を高温の加熱加圧ツールで押圧して実装する半導体素子実装装置であって、
仮止め中の前記半導体素子を押圧して基板との平行度を矯正する部品姿勢矯正手段と、
前記加熱加圧ツールが仮止め中の前記半導体素子に近接して押圧する押圧手段と
を設け、
前記部品姿勢矯正手段は、架張されたテープにて前記半導体素子を押圧するよう構成し
た半導体素子実装装置。 A semiconductor element mounting apparatus for mounting a semiconductor element temporarily fixed to a substrate by pressing with a high temperature heating and pressing tool,
Component posture correcting means for correcting the parallelism with the substrate by pressing the semiconductor element being temporarily fixed;
A pressing means for pressing the heating and pressing tool in proximity to the semiconductor element being temporarily fixed ;
The semiconductor element mounting apparatus, wherein the component posture correcting means is configured to press the semiconductor element with a stretched tape . 基板に仮止めされた半導体素子を高温の加熱加圧ツールで押圧して実装する半導体素子実装装置であって、
仮止め中の前記半導体素子を押圧して基板との平行度を矯正する部品姿勢矯正手段と、
前記加熱加圧ツールが仮止め中の前記半導体素子に近接して押圧する押圧手段と、
前記加熱加圧ツールが仮止め中の前記半導体素子に近接して押圧する状態で前記半導体素子に隣接する実装部品との間に熱遮蔽部を介装して熱伝導を遮蔽する熱遮蔽手段と
を設け、
前記部品姿勢矯正手段は、架張されたテープにて前記半導体素子を押圧するよう構成した半導体素子実装装置。 A semiconductor element mounting apparatus for mounting a semiconductor element temporarily fixed to a substrate by pressing with a high temperature heating and pressing tool,
Component posture correcting means for correcting the parallelism with the substrate by pressing the semiconductor element being temporarily fixed;
A pressing means for pressing the heating and pressing tool close to the semiconductor element being temporarily fixed;
A heat shielding means for shielding heat conduction by interposing a heat shielding part between the heating and pressing tool and a mounting component adjacent to the semiconductor element in a state of pressing in proximity to the semiconductor element being temporarily fixed; Provided ,
The component orientation correcting means is a semiconductor element mounting apparatus configured to press the semiconductor element with a stretched tape . 基板に仮止めされた半導体素子を高温の加熱加圧ツールで押圧して実装する半導体素子実装装置であって、
仮止め中の前記半導体素子を押圧して基板との平行度を矯正する部品姿勢矯正手段と、
前記加熱加圧ツールが仮止め中の前記半導体素子に近接して押圧する押圧手段と、
前記加熱加圧ツールが仮止め中の前記半導体素子に近接して押圧する状態で前記半導体素子に隣接する実装部品との間に熱遮蔽部を介装して熱伝導を遮蔽する熱遮蔽手段と
を設け、
前記部品姿勢矯正手段と熱遮蔽手段が一体構造であり、仮止め中の半導体素子をテープにて押圧して基板との平行度を矯正するよう構成し、かつ前記テープを支持するテープ支持部を隣接する実装部品との間に介装して熱伝導を遮蔽する熱遮蔽部として構成した
半導体素子実装装置。 A semiconductor element mounting apparatus for mounting a semiconductor element temporarily fixed to a substrate by pressing with a high temperature heating and pressing tool,
Component posture correcting means for correcting the parallelism with the substrate by pressing the semiconductor element being temporarily fixed;
A pressing means for pressing the heating and pressing tool close to the semiconductor element being temporarily fixed;
A heat shielding means for shielding heat conduction by interposing a heat shielding part between the heating and pressing tool and a mounting component adjacent to the semiconductor element in a state of pressing in proximity to the semiconductor element being temporarily fixed; Provided ,
The component posture correcting means and the heat shielding means are integrally structured, and are configured to correct the parallelism with the substrate by pressing the semiconductor element being temporarily fixed with a tape, and a tape support portion for supporting the tape. A semiconductor element mounting apparatus configured as a heat shielding portion that is interposed between adjacent mounting components and shields heat conduction . 前記部品姿勢矯正手段と熱遮蔽手段が一体構造であり、
仮止め中の半導体素子をテープにて押圧して基板との平行度を矯正するよう構成し、かつ前記テープを支持するテープ支持部を隣接する実装部品との間に介装して熱伝導を遮蔽する熱遮蔽部として構成した
請求項４に記載の半導体素子実装装置。 The component posture correcting means and the heat shielding means have an integral structure,
The semiconductor element being temporarily fixed is pressed with a tape so as to correct the parallelism with the substrate, and a tape support part for supporting the tape is interposed between adjacent mounting parts for heat conduction. Configured as a heat shield to shield
The semiconductor element mounting apparatus according to claim 4 .
JP2005187498A 2005-06-28 2005-06-28 Semiconductor element mounting method and semiconductor element mounting apparatus Expired - Fee Related JP4619209B2 (en)

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JP5024117B2 (en) * 2007-10-09 2012-09-12 日立化成工業株式会社 Circuit member mounting method
US9362196B2 (en) * 2010-07-15 2016-06-07 Kabushiki Kaisha Toshiba Semiconductor package and mobile device using the same
KR102191179B1 (en) * 2019-02-07 2020-12-15 (주)에이피텍 Pulse heater power dispensing solution with alignment plate curing heater
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