JP4618842B2 - 半導体装置の作製方法 - Google Patents

半導体装置の作製方法 Download PDF

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Publication number
JP4618842B2
JP4618842B2 JP2000087612A JP2000087612A JP4618842B2 JP 4618842 B2 JP4618842 B2 JP 4618842B2 JP 2000087612 A JP2000087612 A JP 2000087612A JP 2000087612 A JP2000087612 A JP 2000087612A JP 4618842 B2 JP4618842 B2 JP 4618842B2
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region
impurity
channel formation
semiconductor layer
concentration
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Japanese (ja)
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JP2001274405A5 (https=
JP2001274405A (ja
Inventor
理 中村
悦子 藤本
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Semiconductor Energy Laboratory Co Ltd
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Semiconductor Energy Laboratory Co Ltd
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JP2000087612A 2000-03-27 2000-03-27 半導体装置の作製方法 Expired - Fee Related JP4618842B2 (ja)

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JP2000087612A JP4618842B2 (ja) 2000-03-27 2000-03-27 半導体装置の作製方法

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Application Number Priority Date Filing Date Title
JP2000087612A JP4618842B2 (ja) 2000-03-27 2000-03-27 半導体装置の作製方法

Publications (3)

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JP2001274405A JP2001274405A (ja) 2001-10-05
JP2001274405A5 JP2001274405A5 (https=) 2007-05-24
JP4618842B2 true JP4618842B2 (ja) 2011-01-26

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JP2000087612A Expired - Fee Related JP4618842B2 (ja) 2000-03-27 2000-03-27 半導体装置の作製方法

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Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6579086B2 (ja) * 2016-11-15 2019-09-25 信越半導体株式会社 デバイス形成方法
US10622221B2 (en) * 2017-12-14 2020-04-14 Applied Materials, Inc. Methods of etching metal oxides with less etch residue

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06244203A (ja) * 1993-02-17 1994-09-02 Sanyo Electric Co Ltd 薄膜トランジスタの製造方法
JP3376247B2 (ja) * 1997-05-30 2003-02-10 株式会社半導体エネルギー研究所 薄膜トランジスタ及び薄膜トランジスタを用いた半導体装置
JP3998888B2 (ja) * 2000-03-08 2007-10-31 株式会社半導体エネルギー研究所 薄膜トランジスタの作製方法

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