JP4594777B2 - 積層型電子部品の製造方法 - Google Patents

積層型電子部品の製造方法 Download PDF

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Publication number
JP4594777B2
JP4594777B2 JP2005092596A JP2005092596A JP4594777B2 JP 4594777 B2 JP4594777 B2 JP 4594777B2 JP 2005092596 A JP2005092596 A JP 2005092596A JP 2005092596 A JP2005092596 A JP 2005092596A JP 4594777 B2 JP4594777 B2 JP 4594777B2
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JP
Japan
Prior art keywords
electronic component
semiconductor element
adhesive layer
bonding wire
bonding
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2005092596A
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English (en)
Japanese (ja)
Other versions
JP2006278520A (ja
JP2006278520A5 (https=
Inventor
淳 芳村
忠宣 大久保
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP2005092596A priority Critical patent/JP4594777B2/ja
Priority to TW095107613A priority patent/TW200727446A/zh
Priority to KR1020060027518A priority patent/KR100796884B1/ko
Priority to US11/390,285 priority patent/US7615413B2/en
Publication of JP2006278520A publication Critical patent/JP2006278520A/ja
Publication of JP2006278520A5 publication Critical patent/JP2006278520A5/ja
Priority to US12/585,547 priority patent/US7785926B2/en
Application granted granted Critical
Publication of JP4594777B2 publication Critical patent/JP4594777B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/073—Connecting or disconnecting of die-attach connectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/075—Connecting or disconnecting of bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/853—On the same surface
    • H10W72/865—Die-attach connectors and bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/874—On different surfaces
    • H10W72/884—Die-attach connectors and bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/732—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between stacked chips
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/734—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Die Bonding (AREA)
  • Wire Bonding (AREA)
JP2005092596A 2005-03-28 2005-03-28 積層型電子部品の製造方法 Expired - Fee Related JP4594777B2 (ja)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP2005092596A JP4594777B2 (ja) 2005-03-28 2005-03-28 積層型電子部品の製造方法
TW095107613A TW200727446A (en) 2005-03-28 2006-03-07 Stack type semiconductor device manufacturing method and stack type electronic component manufacturing method
KR1020060027518A KR100796884B1 (ko) 2005-03-28 2006-03-27 적층형 반도체 장치의 제조 방법 및 적층형 전자 부품의제조 방법
US11/390,285 US7615413B2 (en) 2005-03-28 2006-03-28 Method of manufacturing stack-type semiconductor device and method of manufacturing stack-type electronic component
US12/585,547 US7785926B2 (en) 2005-03-28 2009-09-17 Method of manufacturing stack-type semiconductor device and method of manufacturing stack-type electronic component

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2005092596A JP4594777B2 (ja) 2005-03-28 2005-03-28 積層型電子部品の製造方法

Publications (3)

Publication Number Publication Date
JP2006278520A JP2006278520A (ja) 2006-10-12
JP2006278520A5 JP2006278520A5 (https=) 2007-06-14
JP4594777B2 true JP4594777B2 (ja) 2010-12-08

Family

ID=37212996

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2005092596A Expired - Fee Related JP4594777B2 (ja) 2005-03-28 2005-03-28 積層型電子部品の製造方法

Country Status (1)

Country Link
JP (1) JP4594777B2 (https=)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2650917A2 (en) 2012-04-09 2013-10-16 Canon Kabushiki Kaisha Multilayered semiconductor device, printed circuit board, and method of manufacturing multilayered semiconductor device

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4879073B2 (ja) 2007-04-16 2012-02-15 新日鐵化学株式会社 半導体装置の製造方法
JP5044299B2 (ja) * 2007-06-19 2012-10-10 積水化学工業株式会社 半導体チップ積層体の製造方法、接着テープ及びダイシングダイボンディングテープ
JP5532575B2 (ja) * 2007-10-22 2014-06-25 日立化成株式会社 接着シート
JP4970388B2 (ja) * 2008-09-03 2012-07-04 株式会社東芝 半導体装置及び半導体装置の製造方法
JP5089560B2 (ja) * 2008-11-28 2012-12-05 リンテック株式会社 半導体チップ積層体および半導体チップ積層用接着剤組成物

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3913481B2 (ja) * 2001-01-24 2007-05-09 シャープ株式会社 半導体装置および半導体装置の製造方法
JP4800524B2 (ja) * 2001-09-10 2011-10-26 ルネサスエレクトロニクス株式会社 半導体装置の製造方法、及び、製造装置
JP3912223B2 (ja) * 2002-08-09 2007-05-09 富士通株式会社 半導体装置及びその製造方法
JP4076841B2 (ja) * 2002-11-07 2008-04-16 シャープ株式会社 半導体装置の製造方法
JP4620366B2 (ja) * 2003-02-27 2011-01-26 住友ベークライト株式会社 半導体装置、半導体素子の製造方法、および半導体装置の製造方法
JP2005327789A (ja) * 2004-05-12 2005-11-24 Sharp Corp ダイシング・ダイボンド兼用粘接着シートおよびこれを用いた半導体装置の製造方法
JP2006128169A (ja) * 2004-10-26 2006-05-18 Fujitsu Ltd 半導体装置及び半導体装置の製造方法

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2650917A2 (en) 2012-04-09 2013-10-16 Canon Kabushiki Kaisha Multilayered semiconductor device, printed circuit board, and method of manufacturing multilayered semiconductor device
US8836102B2 (en) 2012-04-09 2014-09-16 Canon Kabushiki Kaisha Multilayered semiconductor device, printed circuit board, and method of manufacturing multilayered semiconductor device

Also Published As

Publication number Publication date
JP2006278520A (ja) 2006-10-12

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