CN100423259C - 叠层式电子部件 - Google Patents

叠层式电子部件 Download PDF

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Publication number
CN100423259C
CN100423259C CNB2005100554751A CN200510055475A CN100423259C CN 100423259 C CN100423259 C CN 100423259C CN B2005100554751 A CNB2005100554751 A CN B2005100554751A CN 200510055475 A CN200510055475 A CN 200510055475A CN 100423259 C CN100423259 C CN 100423259C
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China
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mentioned
electronic unit
bonding wire
semiconductor element
insulative resin
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Expired - Fee Related
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CNB2005100554751A
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CN1674280A (zh
Inventor
芳村淳
大久保忠宣
杉崎吉昭
原田享
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Toshiba Corp
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Toshiba Corp
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Abstract

本发明提供一种叠层式电子部件，具备通过第1粘接层连接到电路基板上的第1电子部件，和通过第2粘接层连接到上述第1电子部件上的第2电子部件。在已连接到第1电子部件上的第1键合引线的下部空间内，填充有填充时黏度大于等于1Pa·s且小于1000Pa·s的绝缘性树脂或光硬化型绝缘性树脂。借助于此，就可以抑制起因于引线下部的树脂未填充部分的气泡的发生。此外，第1电子部件和第2电子部件，通过粘接时黏度大于等于1kPa·s且小于等于100kPa·s的绝缘性树脂层粘接起来。因此，可以防止起因于下边部分一侧的电子部件的键合引线与上边部分一侧的电子部件之间的接触的绝缘不良或短路等的发生。

Description

叠层式电子部件
技术领域
本发明涉及把多个电子部件叠层起来构成的叠层式电子部件。
背景技术
近些年来，为了实现半导体器件的小型化及高密度装配化，把多个半导体元件(半导体芯片)叠层起来封固到1个封装内的堆叠(stack)式多芯片封装正在实用化。在堆叠式多芯片封装中，通过小片粘接(die attach)等的粘接剂地依次把多个半导体元件叠层到电路基板上边。各个半导体元件的电极焊盘通过键合引线与电路基板的电极部分电连接起来。然后，采用使用密封树脂把这样的叠层结构体封装起来的办法，就可以构成堆叠式多芯片封装。
在上述那样的堆叠式多芯片封装中，在上边部分一侧的半导体元件比下边部分一侧的半导体元件小的情况下，上边部分一侧的半导体元件不会对下边部分一侧的半导体元件的键合引线造成影响。但是，由于可在这样的构成中使用的半导体元件受到很大的限制，故人们正在进行把应用范围扩大到同形状的半导体元件彼此间或上边部分一侧比下边部分一侧大的半导体元件的工作。在这里，在把同形状的半导体元件彼此间叠层起来或把比下边部分一侧大的大形状的半导体元件叠层到上边部分一侧上的情况下，就存在着下边部分一侧的半导体元件的键合引线与上边部分一侧的半导体元件进行接触的可能性。为此，防止由键合引线的接触而产生的绝缘不良或短路等的发生是重要的。
于是，人们进行了这样的配置：把将厚度设定为使得上边部分一侧的半导体元件的下表面比已连接到下边部分一侧的半导体元件上的键合引线的高度高的衬垫配置在上下的半导体元件间(例如，参看特开2003-179200号公报、特开2003-218316号公报)。在把衬垫配置在半导体元件间的结构中，必须把键合引线配置在用衬垫形成的空间内，同时，要用粘接剂树脂等把已配置有该键合引线的空间密封起来。这时，如果填充到已配置上键合引线的空间内的树脂量不充分，则存在着在引线下部易于产生树脂的未填充空间的问题。
此外，还进行了在半导体元件间形成防止键合引线的接触的空间而不使用衬垫的研究。例如，在特开2004-072009号公报中，就记载了把将半导体元件间粘接起来的绝缘性粘接剂层的厚度，形成得比键合引线的高度厚的半导体器件。可把键合引线的一部分配置到绝缘性粘接剂层内。在特开平08-288455号公报中，讲述了在依次在下边部分一侧的半导体元件上边形成了绝缘用树脂层和固定用树脂层后，再配置固定上边部分一侧的半导体元件的结构。再有，在特开2004-193363号公报中，记载了采用对上边部分一侧的半导体元件的背面进行绝缘处理的办法，防止由键合引线和半导体元件之间的接触产生的绝缘不良或短路等的技术。
如上所述，具有把衬垫配置在半导体元件间的结构的半导体器件，具有易于在键合引线的下部空间内产生树脂的未填充部分的问题。由于即使在之后的树脂模塑工序中向引线下部的树脂未填充部分内填充树脂也是困难的，故结果就变成为残存着起因于树脂的未填充部的气泡。当在半导体器件内产生了气泡时，在对吸湿或焊料回流等的可靠性试验中就易于产生以气泡为起点的剥离或泄漏等，有损半导体器件的可靠性。作为防止树脂的未填充部分的发生的方法，可以考虑使用低黏度的粘接剂树脂，或者增加粘接剂树脂的填充量的方法。但是，在这些情况下，会产生来自元件端面的树脂的挤出(漏出)或树脂往上爬等的问题。
另一方面，在用粘接剂层维持半导体元件间的空间的结构(省去了衬垫的结构)中，必须用高黏度的粘接剂树脂保持粘接剂层的形状。如上所述，倘使用高黏度的粘接剂树脂，则更易于发生上边所说的引线下部的树脂未填充部分。特别是在把多个半导体元件叠层起来而不使用衬垫的半导体器件中，由于粘接剂层兼用作衬垫和密封树脂，故要同时实现形状的维持和填充性的提高是困难的。
如上所述，在使用现有的堆叠式多芯片封装结构的半导体器件中，由于在键合引线的下部易于产生树脂的未填充部分，因该树脂未填充部分作为气泡残存下来，故存在着降低半导体器件的可靠性的问题。特别是在不使用衬垫的半导体器件中，在保持防止键合引线的接触的层形状的基础上提高粘接剂树脂的填充性是困难的。这样的问题，并不限于把多个半导体元件叠层起来的半导体器件，在把各种电子部件叠层后封装起来的叠层式电子部件中，也会产生同样的问题。
发明内容
因此，本发明的目的在于提供除去可以抑制起因于键合引线下部的树脂未填充部分的气泡的发生，还可以维持防止基于下边部分一侧的电子部件的键合引线与上边部分一侧的电子部件之间的接触的绝缘不良或短路等的发生的空间的叠层式电子部件。
本发明的一个形态的叠层式电子部件，其特征在于，具备：具有电极部分的基板；具有通过第1键合引线连接到上述电极部分上的第1电极焊盘，通过第1粘接层粘接到上述基板上的第1电子部件；以及具有通过第2键合引线连接到上述电极部分上的第2电极焊盘，通过第2粘接层粘接到上述第1电子部件上的第2电子部件，上述第2粘接层，具有已填充到上述第1电子部件与上述第1键合引线之间的空间内的第1绝缘性树脂，和被配置为把上述第1电子部件和上述第2电子部件粘接起来的，具有与上述第1绝缘性树脂不同的弹性系数的第2绝缘性树脂。
本发明的另一形态的叠层式电子部件，其特征在于，具备：具有电极部分的基板；具有通过第1键合引线连接到上述电极部分上的第1电极焊盘，通过第1粘接层粘接到上述基板上的第1电子部件；以及具有通过第2键合引线连接到上述电极部分上的第2电极焊盘，通过第2粘接层粘接到上述第1电子部件上的第2电子部件，上述第2粘接层，具有填充到上述第1电子部件与上述第1键合引线之间的空间内的，填充时黏度在大于等于1Pa·s且小于1000Pa·s的范围内的第1绝缘性树脂，和被配置为把上述第1电子部件和上述第2电子部件粘接起来的，粘接时黏度在大于等于1kPa·s且小于等于100kPa·s的范围内的第2绝缘性树脂。
本发明的再一形态的叠层式电子部件，其特征在于，具备：具有电极部分的基板；具有通过第1键合引线连接到上述电极部分上的第1电极焊盘，通过第1粘接层粘接到上述基板上的第1电子部件；以及具有通过第2键合引线连接到上述电极部分上的第2电极焊盘，通过第2粘接层粘接到上述第1电子部件上的第2电子部件，上述第2粘接层，具有已填充到上述第1电子部件与上述第1键合引线之间的空间内的光硬化型绝缘性树脂，和被配置为把上述第1电子部件和上述第2电子部件粘接起来的，粘接时黏度在大于等于1kPa·s且小于等于100kPa·s的范围内的热硬化型绝缘性树脂。
附图说明
本发明虽然边参看附图边进行说明，但是这些附图仅仅出于图解的目的而提供的，不论从哪一方面来说都不是对发明的限定。
图1的剖面图模式地示出了把本发明的叠层式电子部件应用于半导体器件的实施形态1的构成。
图2的剖面图放大示出了图1所示的半导体器件的主要部分。
图3的平面图示出了图1所示的半导体器件中的第1绝缘性树脂的填充形态的一个构成例。
图4的平面图示出了图1所示的半导体器件中的第1绝缘性树脂的填充形态的另一个构成例。
图5示出了可应用于本发明的实施形态的半导体器件的绝缘性树脂(粘接剂树脂)的黏度特性的一个例子。
图6的剖面图示出了图1所示的半导体器件的一个变形例。
图7的剖面图放大示出了图6所示的半导体器件的主要部分。
图8是作为与图7之间的比较而示出的半导体器件的主要部分放大剖面图。
图9的剖面图示出了图7所示的半导体器件的主要部分制造工序。
图10的剖面图示出了图1所示的半导体器件的另一个变形例。
图11的剖面图示出了图1所示的半导体器件的再一个变形例。
图12的剖面图模式地示出了把本发明的叠层式电子部件应用于半导体器件的实施形态2的构成。
图13的平面图示出了图12所示的半导体器件中的光硬化型绝缘性树脂的填充、硬化形态的一个构成例。
图14的剖面图模式地示出了把本发明的叠层式电子部件应用于半导体器件的实施形态3的构成。
图15的剖面图示出了图14所示的半导体器件的一个变形例。
图16的剖面图示出了图14所示的半导体器件的另一个变形例。
具体实施方式
以下，边参看附图边对用来实施本发明的形态进行说明。另外，在以下虽然根据附图对本发明的实施形态进行说明，但是，这些附图是为了图解的目的而提供的，本发明并不限于这些附图。
图1的剖面图模式地示出了把本发明的叠层式电子部件应用于堆叠式多芯片结构的半导体器件的实施形态1的构成。同图所示的半导体器件1，具有元件装载用的基板2。元件装载用基板2，只要是可以装载电子部件，而且具有电路的基板即可。作为这样的基板2，可以使用在绝缘基板或半导体基板等的表面或内部形成了电路的电路基板，或使引线框架之类的元件装载部分和电路部分一体化了的基板等。半导体器件1作为元件装载用基板具有电路基板2。电路基板2可以使用树脂基板、陶瓷基板、玻璃基板和半导体基板等由各种材料构成的基板。作为树脂基板可以使用一般的多层贴铜叠层板(多层印制布线板)等。在电路基板2的下表面一侧设置有焊料突点等的外部连接端子3。
在作为电路基板2的元件装载面的上表面一侧，设置有与外部连接端子3例如通过内层布线(未画出来)电连接起来的电极部分4。电极部分4成为引线键合部分。作为第1电子部件把第1半导体元件5通过第1粘接层6粘接到这样的电路基板2的元件装载面(上表面)上。第1粘接层6可以使用一般的小片粘接材料(小片粘接膜等)。设置在第1半导体元件5的上表面一侧上的第1电极焊盘(未画出来)通过第1键合引线/金属线7与电路基板2的电极部分4电连接起来。
此外，作为第2电子部件把第2半导体元件8通过第2粘接层9粘接到第1半导体元件5上边。第2半导体元件8与第1半导体元件5具有同样形状或比之大的形状。设置在第2半导体元件8的上表面一侧上的第2电极焊盘(未画出来)通过第2键合引线10与电路基板2的电极部分4电连接起来。
在第1半导体元件5与第1键合引线7之间的空间内，如图2的放大图所示，填充有填充时黏度在大于等于1Pa·s且小于1000Pa·s的范围内的第1绝缘性树脂11。另外，标号12是设置在第1半导体元件5的上表面一侧上的第1电极焊盘。第2粘接层9除去第1绝缘性树脂11的填充部分之外，用粘接时黏度大于等于1kPa·s且小于等于100kPa·s的第2绝缘性树脂(粘接剂树脂)构成。就是说，第1半导体元件5和第2半导体元件8通过主要由第2绝缘性树脂构成的第2粘接层9进行粘接。
在把第1键合引线7键合到第1半导体元件5的电极焊盘上之后，在第2半导体元件8的粘接工序之前，第1绝缘性树脂11，就被填充到了第1半导体元件5与第1键合引线7之间的空间内。如上所述，采用预先向第1半导体元件5与第1键合引线7之间的空间内填充好第1绝缘性树脂11的办法，就可以可靠地防止起因于引线下部的树脂未填充部分的气泡的发生等。
此外，由于没有必要担心引线下部的树脂未填充部分的产生，故主要构成第2粘接层9的第2绝缘性树脂，可以使用能够维持其形状(设定的层厚度等)的高黏度的粘接剂树脂。因此，就可以把保持第1和第2半导体元件5、8间的空间的功能良好地赋予第2粘接层(第2绝缘性树脂层)9。倘采用主要由这样的高黏度的第2绝缘性树脂构成的第2粘接层9，则可以再现性良好地抑制因第1键合引线7与第2半导体元件8接触而发生绝缘不良或短路等的问题。
第1绝缘性树脂11，例如，如图3所示，要填充到第1半导体元件5与第1键合引线7之间的每一个空间内。图3所示的第1绝缘性树脂11，例如，可以采用依次灌注绝缘性树脂膏的办法分别填充到第1半导体元件5与第1键合引线7之间的空间内。这样的第1绝缘性树脂11的填充结构，在第1键合引线7的形成间距比较宽的情况下是有效的，具有易于计算第2粘接层9的体积的优点。
第1绝缘性树脂11，如图4所示，也可以填充为使得把第1半导体元件5与第1键合引线7之间的整个空间都连接起来。图4所示的第1绝缘性树脂11，可以采用例如丝网印刷绝缘性树脂膏的办法，填充到第1半导体元件5与第1键合引线7之间的整个空间内。这样的第1绝缘性树脂11的填充结构，对于第1键合引线7的形成间距比较窄的情况是有效的，对于第1键合引线7的变形防止也是有效的。
第1绝缘性树脂11，由于填充到第1半导体元件5与第1键合引线7之间的空间内，可以使用除去确保向这样的空间内的良好的填充性之外，填充时黏度大于等于1Pa·s且小于1000Pa·s的绝缘性树脂。如果第1绝缘性树脂11的填充时黏度大于等于1000Pa·s，则因向第1半导体元件5与第1键合引线7之间的空间内的填充性降低而易于发生未填充部分。第1绝缘性树脂11的填充时黏度，为了提高填充性理想的是为小于等于500Pa·s。另一方面，如果第1绝缘性树脂11的填充时黏度小于1Pa·s，则反之由于过于柔软而存在着发生未填充部分，或者向周围的挤出(漏出)等的可能性。第1绝缘性树脂11的填充时黏度为10～50Pa·s的范围是更为理想的。
具有上边所说的那样的填充时黏度的第1绝缘性树脂11，例如可以使用环氧树脂或硅酮树脂等的热硬化性树脂。填充时黏度，既可以用构成第1绝缘性树脂11的热硬化性树脂组成物的组成等进行调整，也可以用填充工序中的第1半导体元件5的温度(例如加热温度)进行调整。已填充到上边所说的空间内的由热硬化性树脂构成的第1绝缘性树脂11，既可以在第2半导体元件8的粘接工序前施行热处理使之硬化，也可以在粘接第2半导体元件8的第2粘接层9的硬化处理时同时使之硬化。
除去第1绝缘性树脂11的填充部分之外的第2粘接层9，为了维持作为第1键合引线7的配置区域的层形状，可以使用粘接时黏度大于等于1kPa·s且小于等于100kPa·s的第2绝缘性树脂。当第2绝缘性树脂的粘接时黏度超过了100kPa·s时，则会因为过于硬而不能良好地把第1键合引线7取入到层内来。为此，存在着把第1键合引线7压坏的可能性。另一方面，当第2绝缘性树脂的粘接时黏度小于1kPa·s时，则由于过软而存在着或者第1键合引线7与第2半导体元件8接触，或者树脂从元件端面挤出来的可能性。第2绝缘性树脂的粘接时黏度，比较理想的范围是1～50kPa·s，更为理想的范围是1～20kPa·s。
主要构成第2粘接层9的第2绝缘性树脂，例如可以使用环氧树脂之类的热硬化性树脂。热硬化性树脂的粘接时黏度，既可以用热硬化性树脂组成物的组成等进行调整，也可以用粘接工序中的加热温度进行调整。图5示出了由环氧树脂构成的小片粘接材料的黏度特性的一个例子。具有图5所示的黏度特性的小片粘接材料，采用把粘接时温度定为约70～160℃的范围的办法就可以使粘接时黏度变成为小于等于100kPa·s。此外，采用把粘接时温度定为约90～140℃的范围的办法就可以使粘接时黏度变成为小于等于50kPa·s。
此外，在用第2绝缘性树脂形成第2粘接层9时，例如即便是采用适宜调整热硬化性树脂涂料的干燥温度的办法，也可以得到对于粘接工序的加热温度具有适度的黏度的第2粘接层(第2绝缘性树脂层)9。这里所说的干燥温度，就是把例如热硬化性树脂涂料涂敷到第2半导体元件8的背面上之后，使该树脂涂膜(热硬化性树脂组成物的涂膜)变成为半硬化状态(B级状态)的温度。半硬化状态的热硬化性树脂层，由于可以采用加热到大于等于使之半硬化的温度(干燥温度)的办法使之软化或使之熔融，故可以采用适宜调整干燥温度和粘接时的加热温度的办法，得到所希望的粘接时黏度。
第1绝缘性树脂11和第2绝缘性树脂层9，构成把第1半导体元件5和第2半导体元件8粘接起来，同时把半导体元件5、8间密封起来的树脂层。如上所述，主要构成第2粘接层9的第2绝缘性树脂使用的是高黏度的树脂，第1绝缘性树脂11使用的是低黏度的树脂。根据这样的绝缘性树脂的硬化前的黏度特性的不同，第2粘接层9由弹性系数不同的2种的绝缘性树脂构成。就是说，第1绝缘性树脂11，基于硬化前的低黏度特性而具有低弹性系数。另一方面，第2绝缘性树脂9则基于硬化前的高黏度特性而具有高弹性系数(比第1绝缘性树脂11高的弹性系数)。
如上所述，由于用弹性系数不同的2种绝缘性树脂构成第2粘接层9，故除去可以防止基于引线下部的树脂未填充部分的气泡的发生等之外，还可以把保持第1和第2半导体元件5、8间的空间的功能良好地赋予兼用做密封树脂层的第2粘接层9。另外，这里所说的弹性系数不同的2种的绝缘性树脂，说到底既可以是硬化后的弹性系数自身不同的树脂，也可以是在材质上为同材质的绝缘性树脂。
然后，采用使用例如环氧树脂之类的密封树脂13把叠层、配置到电路基板2上边的第1和第2半导体元件5、8密封起来的办法，就可以构成堆叠式多芯片封装结构的半导体器件1。另外，在图1中，虽然说明的是把2个半导体元件5、8叠层起来的结构，但是，半导体元件的叠层数并不限于此，不言而喻也可以是3个或3个以上。在把3个或3个以上的半导体元件叠层起来构成半导体器件的情况下，预先向存在于半导体元件间内的键合引线的下部空间内填充低黏度的绝缘性树脂。
上边所说的实施形态的半导体器件1，例如可如下那样地制作。首先，用第1粘接层6把第1半导体元件5粘接到电路基板2上边。接着，实施引线键合工序，用第1键合引线7把电路基板2的电极部分4和第1半导体元件5的电极焊盘电连接起来。接着，向第1半导体元件5和第1键合引线7之间的空间内填充进填充时黏度大于等于1Pa·s且小于1000Pa·s的范围的第1绝缘性树脂11。第1绝缘性树脂11如上所述既可以灌注填充到各个空间的每一个空间内，也可印刷填充为使得把整个空间都连接起来。根据需要对第1绝缘性树脂11实施硬化处理。
接下来，把已粘接上第1半导体元件5的电路基板2载置到加热台上边。另一方面，用装配工具保持在下表面一侧形成了第2粘接层(第2绝缘性树脂层)9的第2半导体元件8。装配工具例如具备半导体元件8的吸附保持装置和加热机构。在相对第1半导体元件5进行了位置对准后使保持在装配工具上的第2半导体元件8下降，把第2粘接层9推压到第1半导体元件5上。这时，用加热台和装配工具中的至少一方加热第2粘接层(第2绝缘性树脂层)9，把其黏度调整为使之变成为1～100kPa·s的范围。加热形态可以考虑到第2粘接层9的粘接时黏度或粘接速度等适宜地进行选择。
第2粘接层(第2绝缘性树脂层)9，由于归因于其粘接时黏度具有保持第1和第2半导体元件5、8间的空间的功能，故可以抑制第1键合引线7与第2半导体元件8之间的接触。采用在该状态下使第2粘接层(第2绝缘性树脂层)9硬化的办法，就可以在防止在第1键合引线7的下部空间内产生树脂未填充部分的同时，还可以更为有效地抑制因第1键合引线7与第2半导体元件8之间的接触所产生的绝缘不良或短路等的发生。借助于这些，就可以实现进一步提高了可靠性和工作特性等的堆叠式多芯片封装结构的半导体器件1。
上边所说的实施形态的半导体器件1，用粘接时黏度在1～100kPa·s的范围的第2粘接层9抑制第1键合引线7与第2半导体元件8之间的接触。除此之外，例如，如图6所示，也可以在第2半导体元件8的下表面，就是说在与第1半导体元件5之间的粘接面(叠层面)上形成绝缘层14。通过在第2半导体元件8的下表面侧上设置绝缘层14，就可以更为可靠地防止伴随着第1键合引线7与第2半导体元件8之间的接触而产生的绝缘不良或短路等的发生。绝缘层14可以使用对粘接温度具有耐热性的绝缘性树脂等。
在第2半导体元件8的下表面上设置绝缘层14的情况下，例如，如图7所示，也可以做成为使得第1键合引线7主动地与绝缘层14接触，借助于此使第1键合引线7在电路基板2这一侧变形。就是说，绝缘层14可以利用为使第1键合引线7在电路基板2这一侧主动地变形的层而不仅仅是抑制伴随着第1键合引线7与第2半导体元件8之间的接触所产生的短路等。如上所述，采用利用绝缘层14使第1键合引线7在电路基板2这一侧变形的办法，就可以实现半导体器件1的进一步的薄型化。
在这里，边参看图7和图8，边对基于第1键合引线7的变形的半导体器件1的薄型化进行说明。图7示出了使第1键合引线7主动地变形为接触到绝缘层14上的情况下的例子。图8示出了第1键合引线7未接触到绝缘层14上的情况下的例子。设第1半导体元件5的正上边的第1键合引线7的最大高度h的允许范围为60±15微米。如图8所示，在绝缘层14仅仅具有防止绝缘不良或短路等的发生的功能的情况下，就必须把第2粘接层9的厚度t2设定为引线高度h的允许范围(60±15微米)中的上限值(60+15＝75微米)。
相对于此，在图7中则使超过了作为引线高度h的标准值的60微米的键合引线在电路基板2这一侧变形为使之接触到设置在第2半导体元件8的下表面上的绝缘层14上。就是说，把第2粘接层9的厚度t1设定为作为引线高度h的标准值的60微米，使实际的引线高度h变成为60-15微米(45～60微米)的范围。如上所述，采用使构成第1键合引线7的多条引线之中至少一部分(在本例中为超过了引线高度h的标准值的键合引线)主动地变形为接触到绝缘层14上的办法，就可以设定第2粘接层9的厚度t1而与引线高度h的允许范围无关。因此，与图8所示的器件结构比，就可以使半导体器件1的厚度进一步薄型化。
把第2粘接层9的厚度t1设定成引线高度h的标准值(60微米)的构成，说到底只是一个例子，第2粘接层9的厚度t1并不限于此。第2粘接层9的厚度t1，可以在小于等于引线高度h的标准值(60微米)的范围内适宜地进行设定。例如也可以设定成引线高度h的允许范围(60±15微米)中的下限值(60-15＝45微米)。倘采用这样的构成，则实际的引线高度h为45微米而且是恒定的，可以使半导体器件1进一步薄型化。另外，第2粘接层9的厚度t1虽然也可以做成为小于等于引线高度h的下限值，但是，在该情况下因键合引线7的变形比率增大而易于发生连接不良等。为此，第2粘接层9的厚度t1理想的是在引线高度h的允许范围内设定。
设置在第2半导体元件8的下表面侧上的绝缘层14，例如可用具有对第2粘接层9的粘接时温度的耐热性和可以使第1键合引线7变形的强度的绝缘性树脂构成，至于其具体的材料并没有什么特别限定。作为绝缘层14的具体的构成材料，可以举出聚酰亚胺树脂、硅酮树脂、环氧树脂和丙烯酸类树脂等热硬化性树脂。由这样的绝缘性树脂构成的绝缘层14，例如可以借助于树脂膜的粘接或树脂涂料的涂敷、硬化等形成。此外，在使用树脂膜形成绝缘层14的情况下，构成绝缘层14的树脂膜，也可以使用形成了作为第2粘接层9的第2绝缘性树脂层的2层结构的薄膜。
图7所示的半导体器件1，例如可以如下那样地制作。首先，如图9A所示，用第1粘接层6把第1半导体元件5粘接到电路基板2上边。接着，施行引线键合工序，用第1键合引线7把电路基板2的电极部分4和第1半导体元件5的电极焊盘电连接起来。接着，向第1键合引线7与第1半导体元件5之间的空间内填充第1绝缘性树脂11。第1绝缘性树脂11的填充工序，与前边所说明的相同。
接着，如图9B所示，把已粘接装载上第1半导体元件5的电路基板2载置到加热台21上边。另一方面，用装配工具22保持在下表面一侧依次形成了绝缘层14和第2粘接层9的第2半导体元件8。装配工具22例如具备半导体元件8的吸附保持装置和加热机构。接着，在对于第1半导体元件5进行了位置对准后使保持在装配工具22上的第2半导体元件8下降，把第2粘接层9推压到第1半导体元件5上。这时，用加热台21和装配工具22中的至少一方加热第2粘接层9，把其黏度调整为使之变成为1～100kPa·s的范围。第2粘接层9的厚度，例如预先设定成引线高度h的标准值或标准值以下。
在把第2粘接层9的厚度设定成引线高度h的标准值的情况下，在把第2粘接层9推压到第1半导体元件5上的过程中，相对标准值具有正一侧高度的第1键合引线7在电路基板2这一侧变形为与绝缘层14接触(图9C)。由装配工具22产生的把第2半导体元件8推向第1半导体元件5的推压力(荷重)在考虑到第1键合引线7的变形能以及要使之变形的引线的条数等后适宜地设定。例如，在假定要使直径25微米的键合引线变形10微米需要7g的荷重的情况下，粘接时的荷重理想的是定为[(变形所需要的荷重(例如7g))×(引线条数)×(1.2倍)]左右。在这样的状态下，例如进行加热使第2粘接层9硬化。
如上所述，在把第2粘接层9推压到第1半导体元件5上的过程中，采用在电路基板2这一侧使第1键合引线7的至少一部分变形为接触到绝缘层14上的办法，就可以使第1键合引线7的高度的任一个都整齐划一地变成为小于等于引线高度h的标准值。换句话说，由于第1键合引线7的高度都将变成为小于等于第2粘接层9的厚度，故可以基于第2粘接层9的厚度使半导体器件1整体进一步薄型化。由于可以用绝缘层14维持第1键合引线7与第2半导体元件8之间的绝缘，故也不会发生绝缘不良或短路等。借助于这些，就可以实现已兼使进一步的薄型化和可靠性的提高的堆叠式多芯片封装结构的半导体器件1。
由第1键合引线7与第2半导体元件8之间的接触产生的绝缘不良或短路等的发生，如图10所示，也可以借助于在第1键合引线7的外周面上设置的绝缘被覆层15而防止。绝缘被覆层15，例如，可以采用在第1键合引线7的与第2半导体元件8之间的接触部分上，用喷出或滴下等的办法涂敷热硬化性的绝缘性树脂等，使该绝缘性树脂的涂敷层硬化的办法形成。
此外，第1键合引线7的至少一部分，可采用通过绝缘被覆层15接触到第2半导体元件8上，并施加上基于与该第2半导体元件8之间的接触的荷重的办法在电路基板2一侧进行变形。对于该第1键合引线7的变形比率、由此形成的引线高度等来说，与使用绝缘层14的情况是同样的。即便是用这样的构成，也可以使第1键合引线7的高度整齐划一地小于等于恒定的值(例如从引线高度h的标准值到下限值的范围的值)以下。因此，可以使半导体器件1的整体进一步薄型化。
第1半导体元件5与第2半导体元件8之间的距离，例如，如图11所示，也可以做成为采用在第1半导体元件5的连接中未使用的电极焊盘，就是说，在非连接焊盘上边形成由金属材料或树脂材料等构成的柱状突起16的办法维持。柱状突起16，对于伴随第1键合引线7与第2半导体元件8之间的接触所产生的绝缘不良或短路等的抑制，有效地发挥作用。柱状突起16的设置部位虽然可以是一处，但是理想的是在通过第1半导体元件5的重心的3个部位或以上设置。
非连接焊盘将成为气泡发生的原因。因此，在非连接焊盘上边设置的柱状突起16对于气泡的抑制也发挥作用。也可以做成为使得在向第1半导体元件5与第1键合引线7之间的空间内填充第1绝缘性树脂11时，用第1绝缘性树脂11把非连接焊盘填埋起来。借助于此，也可以抑制起因于非连接焊盘的气泡的发生。此外，在半导体元件的表面上存在着熔断丝(fuse)部分的情况下，熔断丝部分也将成为气泡的发生原因。第1绝缘性树脂11，对于熔断丝部分的填充也可以应用。熔断丝部分由于比连接焊盘小，故理想的是使用喷射方式等填充第1绝缘性树脂11。
其次，边参看图12和图13边对本发明的实施形态2进行说明。另外，对于那些与上边所说的实施形态1同一部分赋予同一标号而部分地省略其说明。图12所示的半导体器件30，与上边所说的实施形态1同样，把第1半导体元件5通过第1粘接层6粘接到电路基板2上边。第1半导体元件5的电极焊盘，通过第1键合引线7与电路基板2的电极部分4电连接起来。在第1半导体元件5上边通过由粘接时黏度大于等于1kPa·s且小于等于100kPa·s的热硬化型绝缘性树脂构成的第2粘接层9粘接有第2半导体元件8。第2粘接层9与实施形态1中的第2绝缘性树脂是同样的。
在第1半导体元件5与第1键合引线7之间的空间内，填充、硬化有例如紫外线硬化型绝缘性树脂之类的光硬化型绝缘性树脂31。光硬化型绝缘性树脂31是例如采用填充紫外线硬化型丙烯酸类树脂组成物并使之硬化的办法形成的。紫外线硬化型丙烯酸类树脂组成物，含有作为反应基的具有丙烯酰基的预聚合物或单体与光聚合开始剂，借助于紫外线照射使之硬化。紫外线硬化型丙烯酸类树脂组成物等，由于仅仅使照射过紫外线的部分硬化，故可以容易地使涂敷后的形状稳定化。
这样的光硬化型绝缘性树脂31，在把第1键合引线7键合到第1半导体元件5的电极焊盘上之后，在第2半导体元件8的粘接工序之前，填充到第1半导体元件5与第1键合引线7之间的空间内，然后再照射紫外线等的光使之硬化。光硬化型绝缘性树脂31，例如，如图13所示，理想的是先填充到第1半导体元件5与第1键合引线7之间的每一个空间内，然后再照射紫外线等的预期的光使之硬化。
如上所述，通过预先向第1半导体元件5与第1键合引线7之间的空间内填充光硬化型绝缘性树脂31并使之硬化，可以可靠地防止起因于引线下部的树脂未填充部分的气泡的发生。此外，由于不必担心树脂未填充部分的发生，故第2粘接层9可以使用能够维持其形状(所设定的层厚等)的那样的高黏度的粘接剂树脂。因此，就可以良好地把保持第1和第2半导体元件5、8间的空间的功能赋予第2粘接层9。借助于这些，就可以实现提高了可靠性和工作特性等的堆叠式多芯片封装结构的半导体器件30。
由热硬化型绝缘性树脂构成的第2粘接层9与光硬化型绝缘性树脂31，归因于它们的硬化形态的不同而弹性系数不同。即便是在向第1半导体元件5与第1键合引线7之间的空间内填充进了光硬化型绝缘性树脂31的情况下，也可以用弹性系数不同的2种绝缘性树脂构成粘接层(树脂密封层)。即便是用这样的弹性系数不同的2种绝缘性树脂构成的树脂层，除去可以防止引线下部的树脂未填充部分的发生之外，还可以有效地抑制归因于第1键合引线7与第2半导体元件8之间的接触所产生的接绝缘不良或短路等。
另外，在实施形态2的半导体器件30中，与实施形态1同样，也可以在第2半导体元件8的背面一侧形成绝缘层，或者在第1键合引线7的外周面上形成绝缘被覆层。再有，利用这些绝缘层或绝缘被覆层使第1键合引线7在电路基板2一侧变形，也是有效的。此外，也可以做成为用柱状突起维持第1半导体元件5与第2半导体元件8之间的距离。柱状突起的形成，对于伴随第1键合引线7与第2半导体元件8之间的接触所产生的绝缘不良和短路等的抑制是有效的。
其次，边参看图14、图15和图16边对本发明的实施形态3进行说明。图14的剖面图模式地示出了把本发明的叠层式电子部件应用于半导体器件的实施形态3的构成。另外，对于与上边所说的实施形态1和2相同的部分赋予同一标号而部分地省略其说明。同图所示的半导体器件40，是把作为第1电子部件的半导体元件41和作为第2电子部件的封装部件42叠层起来的器件，借助于这些，就构成了堆叠式封装结构。如上所述，构成叠层式电子部件的电子部件并不限于单个半导体元件(裸芯片)，也可以是预先把半导体元件封装起来的部件。再有，也可以是一般的电路部件等的电子部件而不限于半导体元件41或封装部件42等的半导体部件。
图14所示的半导体器件40，与上边所说的实施形态同样，通过第1粘接层6把作为第1电子部件的半导体元件41粘接到电路基板2上边。半导体元件41的电极焊盘通过第1键合引线7与电路基板2的电极部分4电连接起来。通过由粘接时黏度大于等于1kPa·s且小于等于100kPa·s的绝缘性树脂构成的第2粘接层9把作为第2电子部件的封装部件42粘接到半导体元件41上边。在半导体元件41与第1键合引线7之间的空间内填充有由填充时黏度大于等于1Pa·s且小于1000Pa·s的绝缘性树脂(实施形态1)，或光硬化型绝缘性树脂(实施形态2)构成的绝缘性树脂43。
封装部件42，具有在电路基板44上边已依次叠层第1半导体元件45和第2半导体元件46的结构，而且，已预先用密封树脂47进行了封装。第1半导体元件45通过粘接剂层48粘接到了电路基板44上边，同样，第2半导体元件46通过粘接剂层49粘接到了第1半导体元件45上边。另外，标号50是无源部件。这样的封装部件42，使得电路基板44变成为上方那样地叠层到半导体元件41上边。此外，设置在电路基板44的背面上的电极焊盘51，通过第2键合引线10与电路基板2的电极部分4电连接起来。
然后，采用把叠层、配置在电路基板2上边的半导体元件41和封装部件42用例如环氧树脂之类的密封树脂13密封起来的办法，就构成了具有堆叠式封装结构的半导体器件40。在这样的半导体器件40中，也可以防止在第1键合引线7的下部空间内产生树脂未填充部分。此外，还可以抑制归因于第1键合引线7与封装部件42过度地接触而在第1键合引线7中产生连接不良等的问题。借助于这些，就可以实现已进一步提高了可靠性或工作特性等的半导体器件40。
半导体元件41与封装部件42之间的叠层结构，例如，如图15所示，也可以做成为把封装部件42叠层到已配置到电路基板2上边的2个半导体元件41、41的上边。这样的叠层结构，对于半导体元件41的尺寸与封装部件42大不相同的情况下是有效的。此外，封装部件42，如图16所示，也可以使电路基板44变成为在下方进行叠层。在该情况下，第2键合引线10连接到设置在电路基板44的上表面一侧上的电极焊盘51上。另外，在实施形态3中，与实施形态1和2同样，也可以进行种种的变形。
另外，本发明，可以应用于叠层装载有多个电子部件的各种叠层式电子部件而不限于上边所说的各实施形态。对于这样的叠层式电子部件来说，也包括在本发明内。此外，本发明的实施形态在本发明的技术思想的范围内可以扩大或变更，该扩大或变更后的实施形态也包括在本发明的技术范围内。

Claims (19)

1. 一种叠层式电子部件，其特征在于，具备：
具有电极部分的基板；
具有通过第1键合引线连接到上述电极部分上的第1电极焊盘，通过第1粘接层粘接到上述基板上的第1电子部件；以及
具有通过第2键合引线连接到上述电极部分上的第2电极焊盘，通过第2粘接层粘接到上述第1电子部件上的第2电子部件，
上述第2粘接层，具有填充到上述第1电子部件与上述第1键合引线之间的空间内的第1绝缘性树脂，和被配置为通过上述第1键合引线与上述第1绝缘性树脂相邻、把上述第1电子部件和上述第2电子部件粘接起来的、具有与上述第1绝缘性树脂不同的弹性系数的第2绝缘性树脂。
2. 根据权利要求1所述的叠层式电子部件，其特征在于：上述第2绝缘性树脂具有比上述第1绝缘性树脂高的弹性系数。
3. 根据权利要求1所述的叠层式电子部件，其特征在于：上述第2电子部件具有与上述第1电子部件相同形状或比上述第1电子部件大的形状。
4. 根据权利要求1所述的叠层式电子部件，其特征在于：上述第1和第2电子部件，由从半导体元件和包括半导体元件的封装部件中选出来的至少一种构成。
5. 根据权利要求1所述的叠层式电子部件，其特征在于：在上述第2电子部件的与上述第1电子部件粘接的粘接面上设置有绝缘层。
6. 根据权利要求5所述的叠层式电子部件，其特征在于：上述第1键合引线，与设置在上述第2电子部件上的上述绝缘层接触地在上述基板一侧变形。
7. 根据权利要求1所述的叠层式电子部件，其特征在于：上述第1键合引线，具有在其外周面上设置的绝缘被覆层，而且，通过上述绝缘被覆层与第2电子部件接触地在上述基板一侧变形。
8. 根据权利要求1所述的叠层式电子部件，其特征在于：在上述第1电子部件与上述第2电子部件之间，配置有设置在上述第1电子部件的非连接焊盘上的柱状突起。
9. 根据权利要求1所述的叠层式电子部件，其特征在于：上述第1和第2电子部件用密封树脂密封起来。
10. 一种叠层式电子部件，其特征在于，具备：
具有电极部分的基板；
具有通过第1键合引线连接到上述电极部分上的第1电极焊盘，通过第1粘接层粘接到上述基板上的第1电子部件；以及
具有通过第2键合引线连接到上述电极部分上的第2电极焊盘，通过第2粘接层粘接到上述第1电子部件上的第2电子部件，
上述第2粘接层，具有填充到上述第1电子部件与上述第1键合引线之间的空间内的、填充时黏度在大于等于1Pa·s且小于1000Pa·s的范围的第1绝缘性树脂，和被配置为通过上述第1键合引线与上述第1绝缘性树脂相邻、把上述第1电子部件和上述第2电子部件粘接起来的、粘接时黏度在大于等于1kPa·s且小于等于100kPa·s的范围的第2绝缘性树脂。
11. 根据权利要求10所述的叠层式电子部件，其特征在于：
上述第2绝缘性树脂，具有与上述第1绝缘性树脂不同的弹性系数。
12. 根据权利要求10所述的叠层式电子部件，其特征在于：
上述第2电子部件具有与上述第1电子部件相同形状或比上述第1电子部件大的形状。
13. 根据权利要求10所述的叠层式电子部件，其特征在于：上述第1和第2电子部件，由从半导体元件和包括半导体元件的封装部件中选出来的至少一种构成。
14. 根据权利要求10所述的叠层式电子部件，其特征在于：在上述第2电子部件的与上述第1电子部件粘接的粘接面上设置有绝缘层。
15. 一种叠层式电子部件，其特征在于，具备：
具有电极部分的基板；
具有通过第1键合引线连接到上述电极部分上的第1电极焊盘，通过第1粘接层粘接到上述基板上的第1电子部件；以及
具有通过第2键合引线连接到上述电极部分上的第2电极焊盘，通过第2粘接层粘接到上述第1电子部件上的第2电子部件，
上述第2粘接层，具有填充到上述第1电子部件与上述第1键合引线之间的空间内的光硬化型绝缘性树脂，和被配置为通过上述第1键合引线与上述第1绝缘性树脂相邻、把上述第1电子部件和上述第2电子部件粘接起来的、粘接时黏度在大于等于1kPa·s且小于等于100kPa·s的范围的热硬化型绝缘性树脂。
16. 根据权利要求15所述的叠层式电子部件，其特征在于：
上述热硬化型绝缘性树脂，具有与上述光硬化型绝缘性树脂不同的弹性系数。
17. 根据权利要求15所述的叠层式电子部件，其特征在于：
上述第2电子部件具有与上述第1电子部件相同形状或比上述第1电子部件大的形状。
18. 根据权利要求15所述的叠层式电子部件，其特征在于：上述第1和第2电子部件，由从半导体元件和包括半导体元件的封装部件中选出来的至少一种构成。
19. 根据权利要求15所述的叠层式电子部件，其特征在于：在上述第2电子部件的与上述第1电子部件粘接的粘接面上设置有绝缘层。
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