JP5571045B2 - 積層型半導体装置 - Google Patents
積層型半導体装置 Download PDFInfo
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- JP5571045B2 JP5571045B2 JP2011179686A JP2011179686A JP5571045B2 JP 5571045 B2 JP5571045 B2 JP 5571045B2 JP 2011179686 A JP2011179686 A JP 2011179686A JP 2011179686 A JP2011179686 A JP 2011179686A JP 5571045 B2 JP5571045 B2 JP 5571045B2
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- semiconductor element
- adhesive layer
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- semiconductor device
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32135—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/32145—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/095—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
- H01L2924/097—Glass-ceramics, e.g. devitrified glass
- H01L2924/09701—Low temperature co-fired ceramic [LTCC]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/102—Material of the semiconductor or solid state bodies
- H01L2924/1025—Semiconducting materials
- H01L2924/10251—Elemental semiconductors, i.e. Group IV
- H01L2924/10253—Silicon [Si]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Description
Claims (5)
- 回路基材上に接着された第1の半導体素子と、
前記第1の半導体素子上に厚さが50μm以上の絶縁性接着剤層を介して接着された第2の半導体素子と、
前記第1の半導体素子と前記回路基材の電極部とを電気的に接続する第1のボンディングワイヤであって、前記第1の半導体素子との接続側端部が前記絶縁性接着剤層内に取り込まれている第1のボンディングワイヤと、
前記第2の半導体素子と前記回路基材の電極部とを電気的に接続する第2のボンディングワイヤと、
前記第1および第2の半導体素子を前記第1および第2のボンディングワイヤと共に封止する封止樹脂とを具備し、
前記絶縁性接着剤層は、ガラス転移温度が135℃以上で、かつガラス転移温度以下の線膨張係数が100ppm以下であると共に、常温弾性率が500MPa以上2GPa以下である絶縁樹脂層からなることを特徴とする積層型半導体装置。 - 請求項1記載の積層型半導体装置において、
前記第1のボンディングワイヤは前記絶縁性接着剤層の厚さに基づいて前記第2の半導体素子の下面から離間していることを特徴とする積層型半導体装置。 - 請求項1記載の積層型半導体装置において、
前記絶縁性接着剤層は、前記第1の半導体素子側に配置され、前記第2の半導体素子の接着時温度で軟化または溶融する第1の層と、前記第2の半導体素子側に配置され、前記第2の半導体素子の接着時温度に対して層形状が維持される第2の層とを有することを特徴とする積層型半導体装置。 - 請求項1ないし請求項3のいずれか1項記載の積層型半導体装置において、
前記第2の半導体素子は70μm以下の厚さを有することを特徴とする積層型半導体装置。 - 請求項1ないし請求項4のいずれか1項記載の積層型半導体装置において、
前記絶縁性接着剤層は前記第2の半導体素子の接着時温度における粘度が1kPa・s以上100kPa・s未満であることを特徴とする積層型半導体装置。
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JP2011179686A JP5571045B2 (ja) | 2011-08-19 | 2011-08-19 | 積層型半導体装置 |
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JP2011179686A JP5571045B2 (ja) | 2011-08-19 | 2011-08-19 | 積層型半導体装置 |
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JP2006073142A Division JP4881044B2 (ja) | 2006-03-16 | 2006-03-16 | 積層型半導体装置の製造方法 |
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JP2011228755A JP2011228755A (ja) | 2011-11-10 |
JP5571045B2 true JP5571045B2 (ja) | 2014-08-13 |
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JP5853944B2 (ja) * | 2012-12-25 | 2016-02-09 | 住友ベークライト株式会社 | 半導体装置の製造方法 |
US9809446B1 (en) * | 2016-05-09 | 2017-11-07 | Amkor Technology, Inc. | Semiconductor package and manufacturing method thereof |
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US7247381B1 (en) * | 1998-08-13 | 2007-07-24 | Hitachi Chemical Company, Ltd. | Adhesive for bonding circuit members, circuit board, and method of producing the same |
JP2003213130A (ja) * | 2002-01-25 | 2003-07-30 | Nippon Steel Chem Co Ltd | ポリイミド樹脂組成物及び耐熱接着剤 |
JP2003258034A (ja) * | 2002-03-06 | 2003-09-12 | Mitsubishi Electric Corp | 多層配線基体の製造方法および多層配線基体 |
JP4188337B2 (ja) * | 2004-05-20 | 2008-11-26 | 株式会社東芝 | 積層型電子部品の製造方法 |
WO2006109506A1 (ja) * | 2005-03-30 | 2006-10-19 | Nippon Steel Chemical Co., Ltd. | 半導体装置の製造方法及び半導体装置 |
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