JP4571749B2 - 既知の良品デバイスを使用して期待する応答を生成するための集積回路デバイスの効率的な同時テスト - Google Patents
既知の良品デバイスを使用して期待する応答を生成するための集積回路デバイスの効率的な同時テスト Download PDFInfo
- Publication number
- JP4571749B2 JP4571749B2 JP2000602648A JP2000602648A JP4571749B2 JP 4571749 B2 JP4571749 B2 JP 4571749B2 JP 2000602648 A JP2000602648 A JP 2000602648A JP 2000602648 A JP2000602648 A JP 2000602648A JP 4571749 B2 JP4571749 B2 JP 4571749B2
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- tester
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- interface circuit
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- Expired - Fee Related
Links
- 238000012360 testing method Methods 0.000 title claims description 69
- 230000004044 response Effects 0.000 title claims description 15
- 239000000523 sample Substances 0.000 claims description 23
- 239000004065 semiconductor Substances 0.000 claims description 11
- 238000010586 diagram Methods 0.000 description 8
- 238000000034 method Methods 0.000 description 5
- 230000006870 function Effects 0.000 description 4
- 238000004519 manufacturing process Methods 0.000 description 3
- 230000008859 change Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 230000008569 process Effects 0.000 description 2
- 230000007704 transition Effects 0.000 description 2
- 238000013459 approach Methods 0.000 description 1
- 230000006399 behavior Effects 0.000 description 1
- 230000006835 compression Effects 0.000 description 1
- 238000007906 compression Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000001514 detection method Methods 0.000 description 1
- 230000002349 favourable effect Effects 0.000 description 1
- 238000013100 final test Methods 0.000 description 1
- 230000003278 mimic effect Effects 0.000 description 1
- 238000012544 monitoring process Methods 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 239000013598 vector Substances 0.000 description 1
Images
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/319—Tester hardware, i.e. output processing circuits
- G01R31/3193—Tester hardware, i.e. output processing circuits with comparison between actual response and known fault free response
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/319—Tester hardware, i.e. output processing circuits
- G01R31/31903—Tester hardware, i.e. output processing circuits tester configuration
- G01R31/31905—Interface with the device under test [DUT], e.g. arrangements between the test head and the DUT, mechanical aspects, fixture
Landscapes
- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Tests Of Electronic Circuits (AREA)
- Measuring Leads Or Probes (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US09/260,460 US6452411B1 (en) | 1999-03-01 | 1999-03-01 | Efficient parallel testing of integrated circuit devices using a known good device to generate expected responses |
| US09/260,460 | 1999-03-01 | ||
| PCT/US2000/004864 WO2000052487A1 (en) | 1999-03-01 | 2000-02-24 | Efficient parallel testing of integrated circuit devices using a known good device to generate expected responses |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2002538464A JP2002538464A (ja) | 2002-11-12 |
| JP2002538464A5 JP2002538464A5 (enExample) | 2007-04-12 |
| JP4571749B2 true JP4571749B2 (ja) | 2010-10-27 |
Family
ID=22989261
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2000602648A Expired - Fee Related JP4571749B2 (ja) | 1999-03-01 | 2000-02-24 | 既知の良品デバイスを使用して期待する応答を生成するための集積回路デバイスの効率的な同時テスト |
Country Status (8)
| Country | Link |
|---|---|
| US (2) | US6452411B1 (enExample) |
| EP (1) | EP1159629B1 (enExample) |
| JP (1) | JP4571749B2 (enExample) |
| KR (1) | KR100681363B1 (enExample) |
| AU (1) | AU3245800A (enExample) |
| DE (1) | DE60040212D1 (enExample) |
| TW (1) | TW451379B (enExample) |
| WO (1) | WO2000052487A1 (enExample) |
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-
1999
- 1999-03-01 US US09/260,460 patent/US6452411B1/en not_active Expired - Fee Related
-
2000
- 2000-02-24 AU AU32458/00A patent/AU3245800A/en not_active Abandoned
- 2000-02-24 EP EP00910351A patent/EP1159629B1/en not_active Expired - Lifetime
- 2000-02-24 DE DE60040212T patent/DE60040212D1/de not_active Expired - Lifetime
- 2000-02-24 WO PCT/US2000/004864 patent/WO2000052487A1/en not_active Ceased
- 2000-02-24 KR KR1020017011121A patent/KR100681363B1/ko not_active Expired - Fee Related
- 2000-02-24 JP JP2000602648A patent/JP4571749B2/ja not_active Expired - Fee Related
- 2000-02-25 TW TW089103419A patent/TW451379B/zh not_active IP Right Cessation
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2002
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Also Published As
| Publication number | Publication date |
|---|---|
| KR20010104363A (ko) | 2001-11-24 |
| KR100681363B1 (ko) | 2007-02-12 |
| US20020175697A1 (en) | 2002-11-28 |
| AU3245800A (en) | 2000-09-21 |
| US6559671B2 (en) | 2003-05-06 |
| US6452411B1 (en) | 2002-09-17 |
| TW451379B (en) | 2001-08-21 |
| JP2002538464A (ja) | 2002-11-12 |
| DE60040212D1 (de) | 2008-10-23 |
| EP1159629B1 (en) | 2008-09-10 |
| WO2000052487A1 (en) | 2000-09-08 |
| EP1159629A1 (en) | 2001-12-05 |
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