AU3245800A - Efficient parallel testing of integrated circuit devices using a known good device to generate expected responses - Google Patents

Efficient parallel testing of integrated circuit devices using a known good device to generate expected responses

Info

Publication number
AU3245800A
AU3245800A AU32458/00A AU3245800A AU3245800A AU 3245800 A AU3245800 A AU 3245800A AU 32458/00 A AU32458/00 A AU 32458/00A AU 3245800 A AU3245800 A AU 3245800A AU 3245800 A AU3245800 A AU 3245800A
Authority
AU
Australia
Prior art keywords
integrated circuit
circuit devices
known good
good device
parallel testing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU32458/00A
Other languages
English (en)
Inventor
Charles A. Miller
Richard S. Roy
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
FormFactor Inc
Original Assignee
FormFactor Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by FormFactor Inc filed Critical FormFactor Inc
Publication of AU3245800A publication Critical patent/AU3245800A/en
Abandoned legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317Testing of digital circuits
    • G01R31/3181Functional testing
    • G01R31/319Tester hardware, i.e. output processing circuits
    • G01R31/3193Tester hardware, i.e. output processing circuits with comparison between actual response and known fault free response
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317Testing of digital circuits
    • G01R31/3181Functional testing
    • G01R31/319Tester hardware, i.e. output processing circuits
    • G01R31/31903Tester hardware, i.e. output processing circuits tester configuration
    • G01R31/31905Interface with the device under test [DUT], e.g. arrangements between the test head and the DUT, mechanical aspects, fixture

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Measuring Leads Or Probes (AREA)
AU32458/00A 1999-03-01 2000-02-24 Efficient parallel testing of integrated circuit devices using a known good device to generate expected responses Abandoned AU3245800A (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US09260460 1999-03-01
US09/260,460 US6452411B1 (en) 1999-03-01 1999-03-01 Efficient parallel testing of integrated circuit devices using a known good device to generate expected responses
PCT/US2000/004864 WO2000052487A1 (en) 1999-03-01 2000-02-24 Efficient parallel testing of integrated circuit devices using a known good device to generate expected responses

Publications (1)

Publication Number Publication Date
AU3245800A true AU3245800A (en) 2000-09-21

Family

ID=22989261

Family Applications (1)

Application Number Title Priority Date Filing Date
AU32458/00A Abandoned AU3245800A (en) 1999-03-01 2000-02-24 Efficient parallel testing of integrated circuit devices using a known good device to generate expected responses

Country Status (8)

Country Link
US (2) US6452411B1 (enExample)
EP (1) EP1159629B1 (enExample)
JP (1) JP4571749B2 (enExample)
KR (1) KR100681363B1 (enExample)
AU (1) AU3245800A (enExample)
DE (1) DE60040212D1 (enExample)
TW (1) TW451379B (enExample)
WO (1) WO2000052487A1 (enExample)

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Also Published As

Publication number Publication date
KR100681363B1 (ko) 2007-02-12
US6559671B2 (en) 2003-05-06
EP1159629A1 (en) 2001-12-05
WO2000052487A1 (en) 2000-09-08
TW451379B (en) 2001-08-21
KR20010104363A (ko) 2001-11-24
JP4571749B2 (ja) 2010-10-27
JP2002538464A (ja) 2002-11-12
US6452411B1 (en) 2002-09-17
US20020175697A1 (en) 2002-11-28
EP1159629B1 (en) 2008-09-10
DE60040212D1 (de) 2008-10-23

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