JP4533173B2 - 半導体集積回路装置 - Google Patents

半導体集積回路装置 Download PDF

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Publication number
JP4533173B2
JP4533173B2 JP2005033018A JP2005033018A JP4533173B2 JP 4533173 B2 JP4533173 B2 JP 4533173B2 JP 2005033018 A JP2005033018 A JP 2005033018A JP 2005033018 A JP2005033018 A JP 2005033018A JP 4533173 B2 JP4533173 B2 JP 4533173B2
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JP
Japan
Prior art keywords
power supply
pad
wire bonding
pads
integrated circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2005033018A
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English (en)
Japanese (ja)
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JP2005277392A5 (enExample
JP2005277392A (ja
Inventor
秀穂 稲川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Canon Inc
Original Assignee
Canon Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Canon Inc filed Critical Canon Inc
Priority to JP2005033018A priority Critical patent/JP4533173B2/ja
Priority to US11/061,438 priority patent/US7259467B2/en
Publication of JP2005277392A publication Critical patent/JP2005277392A/ja
Publication of JP2005277392A5 publication Critical patent/JP2005277392A5/ja
Priority to US11/765,185 priority patent/US7538441B2/en
Priority to US12/429,461 priority patent/US7902658B2/en
Application granted granted Critical
Publication of JP4533173B2 publication Critical patent/JP4533173B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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    • H10W70/65—
    • H10W72/00—
    • H10W70/60—
    • H10W70/655—
    • H10W72/075—
    • H10W72/07554—
    • H10W72/5449—
    • H10W72/547—
    • H10W72/59—
    • H10W72/932—
    • H10W72/9445—
    • H10W72/951—
    • H10W90/754—

Landscapes

  • Semiconductor Integrated Circuits (AREA)
  • Wire Bonding (AREA)
JP2005033018A 2004-02-24 2005-02-09 半導体集積回路装置 Expired - Fee Related JP4533173B2 (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP2005033018A JP4533173B2 (ja) 2004-02-24 2005-02-09 半導体集積回路装置
US11/061,438 US7259467B2 (en) 2004-02-24 2005-02-22 Semiconductor integrated circuit device
US11/765,185 US7538441B2 (en) 2004-02-24 2007-06-19 Chip with power and signal pads connected to power and signal lines on substrate
US12/429,461 US7902658B2 (en) 2004-02-24 2009-04-24 Integrated circuit having wide power lines

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2004047408 2004-02-24
JP2005033018A JP4533173B2 (ja) 2004-02-24 2005-02-09 半導体集積回路装置

Publications (3)

Publication Number Publication Date
JP2005277392A JP2005277392A (ja) 2005-10-06
JP2005277392A5 JP2005277392A5 (enExample) 2006-09-14
JP4533173B2 true JP4533173B2 (ja) 2010-09-01

Family

ID=34863514

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2005033018A Expired - Fee Related JP4533173B2 (ja) 2004-02-24 2005-02-09 半導体集積回路装置

Country Status (2)

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US (3) US7259467B2 (enExample)
JP (1) JP4533173B2 (enExample)

Families Citing this family (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4570868B2 (ja) * 2003-12-26 2010-10-27 ルネサスエレクトロニクス株式会社 半導体装置
JP4533173B2 (ja) * 2004-02-24 2010-09-01 キヤノン株式会社 半導体集積回路装置
JP4006447B2 (ja) * 2004-04-16 2007-11-14 キヤノン株式会社 半導体装置およびプリント回路板
JP4353328B2 (ja) * 2005-09-28 2009-10-28 エルピーダメモリ株式会社 半導体パッケージの製造方法及び半導体パッケージ
JP4993929B2 (ja) * 2006-03-23 2012-08-08 ルネサスエレクトロニクス株式会社 半導体集積回路装置
KR100843220B1 (ko) * 2006-12-19 2008-07-02 삼성전자주식회사 동일 평면상 엘.씨 벨런싱이 달성된 인쇄회로기판
TWI333689B (en) * 2007-02-13 2010-11-21 Advanced Semiconductor Eng Semiconductor package
US8922028B2 (en) * 2007-02-13 2014-12-30 Advanced Semiconductor Engineering, Inc. Semiconductor package
TWI358577B (en) * 2007-06-20 2012-02-21 Au Optronics Corp Light emitting device and manufacture method there
US7863099B2 (en) 2007-06-27 2011-01-04 Stats Chippac Ltd. Integrated circuit package system with overhanging connection stack
JP2009164195A (ja) 2007-12-28 2009-07-23 Panasonic Corp 半導体チップ
JP4991637B2 (ja) * 2008-06-12 2012-08-01 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法
US7825527B2 (en) * 2008-06-13 2010-11-02 Altera Corporation Return loss techniques in wirebond packages for high-speed data communications
JP5656644B2 (ja) * 2008-12-19 2015-01-21 株式会社アドバンテスト 半導体装置、半導体装置の製造方法およびスイッチ回路
US20110103030A1 (en) * 2009-11-02 2011-05-05 International Business Machines Corporation Packages and Methods for Mitigating Plating Stub Effects
US11171126B2 (en) * 2015-09-04 2021-11-09 Octavo Systems Llc Configurable substrate and systems
US10580756B2 (en) * 2015-12-09 2020-03-03 Intel Corporation Connection pads for low cross-talk vertical wirebonds
CN107123636B (zh) * 2016-02-25 2020-01-10 瑞昱半导体股份有限公司 集成电路装置
US10833238B2 (en) * 2018-08-27 2020-11-10 International Business Machines Corporation Wirebond cross-talk reduction for quantum computing chips
JP7362380B2 (ja) 2019-09-12 2023-10-17 キヤノン株式会社 配線基板及び半導体装置
CN113703099A (zh) * 2020-05-21 2021-11-26 青岛海信宽带多媒体技术有限公司 一种光模块
WO2023159393A1 (zh) * 2022-02-23 2023-08-31 京东方科技集团股份有限公司 发光基板、背光模组及显示装置
KR102830332B1 (ko) * 2022-12-09 2025-07-08 한국전자통신연구원 반도체 패키지
CN121419230A (zh) * 2023-03-15 2026-01-27 长鑫存储技术有限公司 一种芯片结构及存储器
TWI854533B (zh) * 2023-03-17 2024-09-01 群聯電子股份有限公司 差分線的佈線結構、記憶體儲存裝置及記憶體控制電路單元

Family Cites Families (18)

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Publication number Priority date Publication date Assignee Title
JPH04252073A (ja) * 1991-01-10 1992-09-08 Nec Ic Microcomput Syst Ltd マスタースライス方式半導体集積回路
JPH05160333A (ja) 1991-12-05 1993-06-25 Sharp Corp 半導体集積回路装置
US5468999A (en) * 1994-05-26 1995-11-21 Motorola, Inc. Liquid encapsulated ball grid array semiconductor device with fine pitch wire bonding
JP2716005B2 (ja) * 1995-07-04 1998-02-18 日本電気株式会社 ワイヤボンド型半導体装置
JPH1140754A (ja) * 1997-07-17 1999-02-12 Mitsubishi Electric Corp 半導体装置
JP3472455B2 (ja) * 1997-09-12 2003-12-02 沖電気工業株式会社 半導体集積回路装置及びそのパッケージ構造
US6008532A (en) * 1997-10-23 1999-12-28 Lsi Logic Corporation Integrated circuit package having bond fingers with alternate bonding areas
US6410990B2 (en) * 1997-12-12 2002-06-25 Intel Corporation Integrated circuit device having C4 and wire bond connections
JPH11284006A (ja) * 1998-03-31 1999-10-15 Fujitsu Ltd 半導体装置
JP3516608B2 (ja) * 1999-04-27 2004-04-05 沖電気工業株式会社 半導体装置
JP4071914B2 (ja) * 2000-02-25 2008-04-02 沖電気工業株式会社 半導体素子及びこれを用いた半導体装置
US6291898B1 (en) * 2000-03-27 2001-09-18 Advanced Semiconductor Engineering, Inc. Ball grid array package
TW495940B (en) * 2001-07-20 2002-07-21 Via Tech Inc Method for forming a grid array packaged integrated circuit
US6476506B1 (en) * 2001-09-28 2002-11-05 Motorola, Inc. Packaged semiconductor with multiple rows of bond pads and method therefor
TW517362B (en) * 2002-01-10 2003-01-11 Advanced Semiconductor Eng Ball grid array package structure
US6700207B2 (en) * 2002-08-05 2004-03-02 Lsi Logic Corporation Flip-chip ball grid array package for electromigration testing
JP2005160333A (ja) 2003-11-28 2005-06-23 Q P Corp オリゴヌクレオチド及びこれをプライマーとして用いたラクトバチルス属細菌の検出方法
JP4533173B2 (ja) * 2004-02-24 2010-09-01 キヤノン株式会社 半導体集積回路装置

Also Published As

Publication number Publication date
US20090200666A1 (en) 2009-08-13
US20050184403A1 (en) 2005-08-25
US7259467B2 (en) 2007-08-21
US7902658B2 (en) 2011-03-08
JP2005277392A (ja) 2005-10-06
US7538441B2 (en) 2009-05-26
US20070235874A1 (en) 2007-10-11

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