JP4510072B2 - 不揮発性半導体記憶装置とその書き込み方法 - Google Patents

不揮発性半導体記憶装置とその書き込み方法 Download PDF

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Publication number
JP4510072B2
JP4510072B2 JP2007328525A JP2007328525A JP4510072B2 JP 4510072 B2 JP4510072 B2 JP 4510072B2 JP 2007328525 A JP2007328525 A JP 2007328525A JP 2007328525 A JP2007328525 A JP 2007328525A JP 4510072 B2 JP4510072 B2 JP 4510072B2
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Japan
Prior art keywords
memory cell
data
latch
page
writing
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JP2007328525A
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English (en)
Japanese (ja)
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JP2009151865A5 (enExample
JP2009151865A (ja
Inventor
勝 矢野
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Powerchip Technology Corp
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Powerchip Technology Corp
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Priority to JP2007328525A priority Critical patent/JP4510072B2/ja
Priority to US12/808,265 priority patent/US8738836B2/en
Priority to PCT/JP2008/072507 priority patent/WO2009081745A1/ja
Publication of JP2009151865A publication Critical patent/JP2009151865A/ja
Publication of JP2009151865A5 publication Critical patent/JP2009151865A5/ja
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Publication of JP4510072B2 publication Critical patent/JP4510072B2/ja
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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3418—Disturbance prevention or evaluation; Refreshing of disturbed memory data
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
    • G11C11/5628—Programming or writing circuits; Data input circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0483—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells having several storage transistors connected in series
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2216/00—Indexing scheme relating to G11C16/00 and subgroups, for features not directly covered by these groups
    • G11C2216/12—Reading and writing aspects of erasable programmable read-only memories
    • G11C2216/14—Circuits or methods to write a page or sector of information simultaneously into a nonvolatile memory, typically a complete row or word line in flash memory

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Read Only Memory (AREA)
JP2007328525A 2007-12-20 2007-12-20 不揮発性半導体記憶装置とその書き込み方法 Active JP4510072B2 (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2007328525A JP4510072B2 (ja) 2007-12-20 2007-12-20 不揮発性半導体記憶装置とその書き込み方法
US12/808,265 US8738836B2 (en) 2007-12-20 2008-12-11 Non-volatile semiconductor memory device and write-in method thereof
PCT/JP2008/072507 WO2009081745A1 (ja) 2007-12-20 2008-12-11 不揮発性半導体記憶装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2007328525A JP4510072B2 (ja) 2007-12-20 2007-12-20 不揮発性半導体記憶装置とその書き込み方法

Publications (3)

Publication Number Publication Date
JP2009151865A JP2009151865A (ja) 2009-07-09
JP2009151865A5 JP2009151865A5 (enExample) 2010-04-22
JP4510072B2 true JP4510072B2 (ja) 2010-07-21

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Family Applications (1)

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JP2007328525A Active JP4510072B2 (ja) 2007-12-20 2007-12-20 不揮発性半導体記憶装置とその書き込み方法

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US (1) US8738836B2 (enExample)
JP (1) JP4510072B2 (enExample)
WO (1) WO2009081745A1 (enExample)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5330421B2 (ja) * 2011-02-01 2013-10-30 株式会社東芝 不揮発性半導体記憶装置
KR101184803B1 (ko) * 2011-06-09 2012-09-20 에스케이하이닉스 주식회사 반도체 장치 및 이의 프로그램 방법
KR20130008300A (ko) * 2011-07-12 2013-01-22 삼성전자주식회사 오버 프로그램을 이용하여 소거 동작을 수행하는 플래시 메모리 장치 및 그 동작방법
US9030870B2 (en) 2011-08-26 2015-05-12 Micron Technology, Inc. Threshold voltage compensation in a multilevel memory
US9076547B2 (en) 2012-04-05 2015-07-07 Micron Technology, Inc. Level compensation in multilevel memory
TWI582778B (zh) 2011-12-09 2017-05-11 Toshiba Kk Nonvolatile semiconductor memory device
JP5706350B2 (ja) * 2012-02-01 2015-04-22 株式会社東芝 不揮発性半導体記憶装置
JP5819338B2 (ja) * 2013-03-21 2015-11-24 株式会社東芝 半導体記憶装置
JP2015053098A (ja) 2013-09-09 2015-03-19 株式会社東芝 不揮発性半導体記憶装置
US20150155039A1 (en) 2013-12-02 2015-06-04 Silicon Storage Technology, Inc. Three-Dimensional Flash NOR Memory System With Configurable Pins
JP2016054017A (ja) * 2014-09-04 2016-04-14 株式会社東芝 半導体記憶装置
KR102246843B1 (ko) 2015-01-15 2021-05-03 에스케이하이닉스 주식회사 데이터 저장 장치 및 그것의 동작 방법
JP6154879B2 (ja) 2015-11-18 2017-06-28 ウィンボンド エレクトロニクス コーポレーション Ｎａｎｄ型フラッシュメモリとそのプログラム方法
US11562791B1 (en) * 2021-08-09 2023-01-24 Micron Technology, Inc. Memory devices with four data line bias levels

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR950000273B1 (ko) 1992-02-21 1995-01-12 삼성전자 주식회사 불휘발성 반도체 메모리장치 및 그 최적화 기입방법
JP2000285692A (ja) 1999-04-01 2000-10-13 Sony Corp 不揮発性半導体記憶装置、並びにデータ書き込み方法およびデータ読み出し方法
JP2001028575A (ja) 1999-07-13 2001-01-30 Victor Co Of Japan Ltd デジタル放送受信装置
JP3983969B2 (ja) 2000-03-08 2007-09-26 株式会社東芝 不揮発性半導体記憶装置
JP2003346485A (ja) 2002-05-23 2003-12-05 Fujitsu Ltd 不揮発性半導体記憶装置及び不揮発性半導体記憶装置の書き込み方法
JP3913704B2 (ja) 2003-04-22 2007-05-09 株式会社東芝 不揮発性半導体記憶装置及びこれを用いた電子装置
JP4521243B2 (ja) 2004-09-30 2010-08-11 株式会社東芝 不揮発性半導体記憶装置及びそのデータ消去方法
JP4713873B2 (ja) * 2004-11-12 2011-06-29 株式会社東芝 半導体記憶装置
JP4157562B2 (ja) 2006-01-31 2008-10-01 株式会社東芝 半導体集積回路装置
JP2007305204A (ja) * 2006-05-10 2007-11-22 Toshiba Corp 不揮発性半導体記憶装置
JP2008084471A (ja) * 2006-09-28 2008-04-10 Toshiba Corp 半導体記憶装置

Also Published As

Publication number Publication date
US20100299475A1 (en) 2010-11-25
US8738836B2 (en) 2014-05-27
WO2009081745A1 (ja) 2009-07-02
JP2009151865A (ja) 2009-07-09

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