JP4343022B2 - 基板の処理方法及び基板の処理装置 - Google Patents

基板の処理方法及び基板の処理装置 Download PDF

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Publication number
JP4343022B2
JP4343022B2 JP2004139458A JP2004139458A JP4343022B2 JP 4343022 B2 JP4343022 B2 JP 4343022B2 JP 2004139458 A JP2004139458 A JP 2004139458A JP 2004139458 A JP2004139458 A JP 2004139458A JP 4343022 B2 JP4343022 B2 JP 4343022B2
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Japan
Prior art keywords
resist pattern
liquid
substrate processing
fluorine
substrate
Prior art date
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Expired - Fee Related
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JP2004139458A
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English (en)
Japanese (ja)
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JP2005322765A (ja
JP2005322765A5 (https=
Inventor
光秋 岩下
悟 志村
啓士 田内
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Tokyo Electron Ltd
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Tokyo Electron Ltd
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Publication date
Application filed by Tokyo Electron Ltd filed Critical Tokyo Electron Ltd
Priority to JP2004139458A priority Critical patent/JP4343022B2/ja
Priority to PCT/JP2005/008128 priority patent/WO2005109476A1/ja
Priority to US11/596,459 priority patent/US7781342B2/en
Publication of JP2005322765A publication Critical patent/JP2005322765A/ja
Publication of JP2005322765A5 publication Critical patent/JP2005322765A5/ja
Application granted granted Critical
Publication of JP4343022B2 publication Critical patent/JP4343022B2/ja
Priority to US12/846,406 priority patent/US20100307683A1/en
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    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/26—Processing photosensitive materials; Apparatus therefor
    • G03F7/40—Treatment after imagewise removal, e.g. baking
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/04—Apparatus for manufacture or treatment
    • H10P72/0448—Apparatus for applying a liquid, a resin, an ink or the like
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/04—Apparatus for manufacture or treatment
    • H10P72/0451—Apparatus for manufacturing or treating in a plurality of work-stations
    • H10P72/0452—Apparatus for manufacturing or treating in a plurality of work-stations characterised by the layout of the process chambers
    • H10P72/0458—Apparatus for manufacturing or treating in a plurality of work-stations characterised by the layout of the process chambers vertical arrangement
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/04—Apparatus for manufacture or treatment
    • H10P72/0451—Apparatus for manufacturing or treating in a plurality of work-stations
    • H10P72/0468—Apparatus for manufacturing or treating in a plurality of work-stations comprising a chamber adapted to a particular process
    • H10P72/0474—Apparatus for manufacturing or treating in a plurality of work-stations comprising a chamber adapted to a particular process comprising at least one lithography chamber
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P76/00—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography
    • H10P76/20—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising organic materials
    • H10P76/204—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising organic materials of organic photoresist masks

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Photosensitive Polymer And Photoresist Processing (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
  • Drying Of Semiconductors (AREA)
JP2004139458A 2004-05-10 2004-05-10 基板の処理方法及び基板の処理装置 Expired - Fee Related JP4343022B2 (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP2004139458A JP4343022B2 (ja) 2004-05-10 2004-05-10 基板の処理方法及び基板の処理装置
PCT/JP2005/008128 WO2005109476A1 (ja) 2004-05-10 2005-04-28 基板の処理方法及び基板の処理装置
US11/596,459 US7781342B2 (en) 2004-05-10 2005-04-28 Substrate treatment method for etching a base film using a resist pattern
US12/846,406 US20100307683A1 (en) 2004-05-10 2010-07-29 Substrate treatment method and substrate treatment apparatus

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2004139458A JP4343022B2 (ja) 2004-05-10 2004-05-10 基板の処理方法及び基板の処理装置

Publications (3)

Publication Number Publication Date
JP2005322765A JP2005322765A (ja) 2005-11-17
JP2005322765A5 JP2005322765A5 (https=) 2006-07-20
JP4343022B2 true JP4343022B2 (ja) 2009-10-14

Family

ID=35320464

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2004139458A Expired - Fee Related JP4343022B2 (ja) 2004-05-10 2004-05-10 基板の処理方法及び基板の処理装置

Country Status (3)

Country Link
US (2) US7781342B2 (https=)
JP (1) JP4343022B2 (https=)
WO (1) WO2005109476A1 (https=)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007214365A (ja) * 2006-02-09 2007-08-23 Sokudo:Kk 基板処理装置
US8926788B2 (en) * 2010-10-27 2015-01-06 Lam Research Ag Closed chamber for wafer wet processing
US20130008602A1 (en) * 2011-07-07 2013-01-10 Lam Research Ag Apparatus for treating a wafer-shaped article
JP5827939B2 (ja) 2012-12-17 2015-12-02 東京エレクトロン株式会社 成膜方法、プログラム、コンピュータ記憶媒体及び成膜装置
JP5871844B2 (ja) * 2013-03-06 2016-03-01 東京エレクトロン株式会社 基板処理方法、プログラム、コンピュータ記憶媒体及び基板処理システム
JP2014175357A (ja) 2013-03-06 2014-09-22 Tokyo Electron Ltd 基板処理方法、プログラム、コンピュータ記憶媒体及び基板処理システム
JP6450333B2 (ja) * 2015-04-30 2019-01-09 東京エレクトロン株式会社 基板処理方法、基板処理装置及び基板処理システム
JP2018110186A (ja) * 2017-01-04 2018-07-12 東京エレクトロン株式会社 液処理装置及び液処理方法
US11049741B2 (en) 2017-12-01 2021-06-29 Elemental Scientific, Inc. Systems for integrated decomposition and scanning of a semiconducting wafer
CN115398615A (zh) 2020-04-16 2022-11-25 基础科学公司 用于半导体晶圆的集成分解和扫描的系统

Family Cites Families (20)

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US4536271A (en) * 1983-12-29 1985-08-20 Mobil Oil Corporation Method of plasma treating a polymer film to change its properties
JPS63283028A (ja) * 1986-09-29 1988-11-18 Hashimoto Kasei Kogyo Kk 微細加工表面処理剤
JPH0669118A (ja) 1992-05-28 1994-03-11 Nec Corp レジストパターンの形成方法
JP2741330B2 (ja) * 1993-09-13 1998-04-15 株式会社ペトカ 回転体用金属被覆炭素繊維強化プラスチックパイプ及びその製造方法
JPH07239558A (ja) * 1994-02-28 1995-09-12 Nippon Telegr & Teleph Corp <Ntt> 現像液及びパターン形成方法
JPH0831720A (ja) * 1994-07-13 1996-02-02 Nkk Corp レジストマスクの形成方法
US5801083A (en) * 1997-10-20 1998-09-01 Chartered Semiconductor Manufacturing, Ltd. Use of polymer spacers for the fabrication of shallow trench isolation regions with rounded top corners
JP3979553B2 (ja) * 1998-06-12 2007-09-19 東京応化工業株式会社 反射防止膜形成用塗布液組成物およびこれを用いたレジスト材料
US6530340B2 (en) * 1998-11-12 2003-03-11 Advanced Micro Devices, Inc. Apparatus for manufacturing planar spin-on films
JP4087000B2 (ja) * 1999-03-08 2008-05-14 日鉱金属株式会社 レードル及びレードルのライニング方法
KR100447263B1 (ko) * 1999-12-30 2004-09-07 주식회사 하이닉스반도체 식각 폴리머를 이용한 반도체 소자의 제조방법
US20020170878A1 (en) * 2001-03-27 2002-11-21 Bmc Industries, Inc. Etching resistance of protein-based photoresist layers
US7125496B2 (en) * 2001-06-28 2006-10-24 Hynix Semiconductor Inc. Etching method using photoresist etch barrier
TW502300B (en) * 2001-09-28 2002-09-11 Macronix Int Co Ltd Method of reducing pattern spacing or opening dimension
JP3858730B2 (ja) * 2002-03-05 2006-12-20 富士通株式会社 レジストパターン改善化材料およびそれを用いたパターンの製造方法
US7129009B2 (en) * 2002-05-14 2006-10-31 E. I. Du Pont De Nemours And Company Polymer-liquid compositions useful in ultraviolet and vacuum ultraviolet uses
JP3850781B2 (ja) * 2002-09-30 2006-11-29 富士通株式会社 レジストパターン厚肉化材料、レジストパターンの形成方法、及び半導体装置の製造方法
TW200424767A (en) * 2003-02-20 2004-11-16 Tokyo Ohka Kogyo Co Ltd Immersion exposure process-use resist protection film forming material, composite film, and resist pattern forming method
JP2005101498A (ja) * 2003-03-04 2005-04-14 Tokyo Ohka Kogyo Co Ltd 液浸露光プロセス用浸漬液および該浸漬液を用いたレジストパターン形成方法
US20050202351A1 (en) * 2004-03-09 2005-09-15 Houlihan Francis M. Process of imaging a deep ultraviolet photoresist with a top coating and materials thereof

Also Published As

Publication number Publication date
WO2005109476A1 (ja) 2005-11-17
JP2005322765A (ja) 2005-11-17
US20070243711A1 (en) 2007-10-18
US7781342B2 (en) 2010-08-24
US20100307683A1 (en) 2010-12-09

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