JP4292720B2 - 電源ノイズ検出回路を有する半導体集積回路およびプロセッサ - Google Patents

電源ノイズ検出回路を有する半導体集積回路およびプロセッサ Download PDF

Info

Publication number
JP4292720B2
JP4292720B2 JP2001015195A JP2001015195A JP4292720B2 JP 4292720 B2 JP4292720 B2 JP 4292720B2 JP 2001015195 A JP2001015195 A JP 2001015195A JP 2001015195 A JP2001015195 A JP 2001015195A JP 4292720 B2 JP4292720 B2 JP 4292720B2
Authority
JP
Japan
Prior art keywords
circuit
noise
power supply
noise detection
semiconductor integrated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2001015195A
Other languages
English (en)
Japanese (ja)
Other versions
JP2002222919A (ja
JP2002222919A5 (enExample
Inventor
文夫 結城
勝也 田中
猛 加藤
照久 清水
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP2001015195A priority Critical patent/JP4292720B2/ja
Priority to TW090121041A priority patent/TW515082B/zh
Priority to KR1020010052743A priority patent/KR100691594B1/ko
Priority to US09/946,451 priority patent/US20020096677A1/en
Publication of JP2002222919A publication Critical patent/JP2002222919A/ja
Priority to US11/253,833 priority patent/US7339411B2/en
Publication of JP2002222919A5 publication Critical patent/JP2002222919A5/ja
Application granted granted Critical
Publication of JP4292720B2 publication Critical patent/JP4292720B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/003—Modifications for increasing the reliability for protection
    • H03K19/00346—Modifications for eliminating interference or parasitic voltages or currents
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/50—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor for integrated circuit devices, e.g. power bus, number of leads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • Mathematical Physics (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • General Physics & Mathematics (AREA)
  • Semiconductor Integrated Circuits (AREA)
JP2001015195A 2001-01-24 2001-01-24 電源ノイズ検出回路を有する半導体集積回路およびプロセッサ Expired - Fee Related JP4292720B2 (ja)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP2001015195A JP4292720B2 (ja) 2001-01-24 2001-01-24 電源ノイズ検出回路を有する半導体集積回路およびプロセッサ
TW090121041A TW515082B (en) 2001-01-24 2001-08-27 Semiconductor integrated circuit with noise detection circuits for detecting power supply noise
KR1020010052743A KR100691594B1 (ko) 2001-01-24 2001-08-30 전원 노이즈를 검출하는 노이즈 검출 회로를 갖는 반도체집적 회로
US09/946,451 US20020096677A1 (en) 2001-01-24 2001-09-06 Semiconductor integrated circuit having noise detect circuits detecting noise on power supply nets
US11/253,833 US7339411B2 (en) 2001-01-24 2005-10-20 Semiconductor integrated circuit having noise detect circuits detecting noise on power supply nets

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2001015195A JP4292720B2 (ja) 2001-01-24 2001-01-24 電源ノイズ検出回路を有する半導体集積回路およびプロセッサ

Publications (3)

Publication Number Publication Date
JP2002222919A JP2002222919A (ja) 2002-08-09
JP2002222919A5 JP2002222919A5 (enExample) 2008-02-28
JP4292720B2 true JP4292720B2 (ja) 2009-07-08

Family

ID=18881787

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2001015195A Expired - Fee Related JP4292720B2 (ja) 2001-01-24 2001-01-24 電源ノイズ検出回路を有する半導体集積回路およびプロセッサ

Country Status (4)

Country Link
US (2) US20020096677A1 (enExample)
JP (1) JP4292720B2 (enExample)
KR (1) KR100691594B1 (enExample)
TW (1) TW515082B (enExample)

Families Citing this family (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3981234B2 (ja) * 2000-02-21 2007-09-26 松下電器産業株式会社 マイクロコンピュータ
JP4000001B2 (ja) * 2002-04-22 2007-10-31 松下電器産業株式会社 クロック制御装置およびクロック制御方法
US7667477B2 (en) * 2003-08-22 2010-02-23 The New Industry Research Organization Circuit for detecting and measuring noise in semiconductor integrated circuit
JP5173216B2 (ja) * 2006-04-18 2013-04-03 パナソニック株式会社 半導体集積回路システム、半導体集積回路、オペレーティングシステム及び半導体集積回路の制御方法
US7467050B2 (en) * 2006-05-30 2008-12-16 International Business Machines Corporation Method for detecting noise events in systems with time variable operating points
US7607028B2 (en) * 2006-05-30 2009-10-20 International Business Machines Corporation Mitigate power supply noise response by throttling execution units based upon voltage sensing
KR100776751B1 (ko) * 2006-06-09 2007-11-19 주식회사 하이닉스반도체 전압 공급 장치 및 방법
JP2008072045A (ja) 2006-09-15 2008-03-27 Oki Electric Ind Co Ltd 半導体集積回路
JP5011944B2 (ja) * 2006-10-18 2012-08-29 セイコーエプソン株式会社 誤動作防止回路、半導体集積回路装置および電子機器
JP5011945B2 (ja) * 2006-10-18 2012-08-29 セイコーエプソン株式会社 半導体集積回路装置および電子機器
US7966447B2 (en) * 2007-07-06 2011-06-21 Hewlett-Packard Development Company, L.P. Systems and methods for determining refresh rate of memory based on RF activities
US7720621B2 (en) * 2007-08-30 2010-05-18 International Business Machines Corporation Application of multiple voltage droop detection
US7599808B2 (en) * 2007-08-31 2009-10-06 International Business Machines Corporation Application of multiple voltage droop detection and instruction throttling instances with customized thresholds across a semiconductor chip
US7818599B2 (en) * 2007-10-09 2010-10-19 International Business Machines Corporation Statistical switched capacitor droop sensor for application in power distribution noise mitigation
KR100974213B1 (ko) * 2008-08-12 2010-08-06 주식회사 하이닉스반도체 전원 잡음 검출 장치 및 이를 이용한 전원 잡음 제어 장치
JP5051112B2 (ja) * 2008-12-05 2012-10-17 富士通株式会社 電圧変動量算出方法及びシステム並びにコンデンサ実装形態決定方法及びシステム
JP5312227B2 (ja) * 2009-06-29 2013-10-09 株式会社日本マイクロニクス プローブカード及び検査装置
JP5750829B2 (ja) * 2010-03-19 2015-07-22 富士通セミコンダクター株式会社 半導体装置の試験方法
US9070776B2 (en) 2011-04-15 2015-06-30 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and driving method thereof
KR101776329B1 (ko) * 2011-11-25 2017-09-08 현대자동차주식회사 접근권한코드를 이용한 디바이스 보호 시스템 및 그 보호 방법
KR101446762B1 (ko) 2013-06-26 2014-10-06 전재현 화장품 용기
KR101643456B1 (ko) * 2014-02-14 2016-07-28 주식회사 엘지생활건강 화장품 용기
KR102660729B1 (ko) 2016-10-28 2024-04-26 삼성전자주식회사 전원 잡음을 검출하는 불휘발성 메모리 장치 및 그것의 동작 방법

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2699755B1 (fr) * 1992-12-22 1995-03-10 Sgs Thomson Microelectronics Circuit de démarrage et de sécurité contre les coupures d'alimentation, pour circuit intégré.
JPH0973400A (ja) 1995-09-05 1997-03-18 Mitsubishi Electric Corp 半導体集積回路
JP3608361B2 (ja) 1997-12-26 2005-01-12 株式会社日立製作所 低ノイズ半導体集積回路装置
JP2001125690A (ja) * 1999-10-26 2001-05-11 Mitsubishi Electric Corp マイクロコンピュータの誤動作防止装置及びマイクロコンピュータの誤動作防止方法
IT1319820B1 (it) * 2000-01-28 2003-11-03 St Microelectronics Srl Circuito di reset di accensione a basso consumo per memorie asemiconduttore
JP3981234B2 (ja) * 2000-02-21 2007-09-26 松下電器産業株式会社 マイクロコンピュータ

Also Published As

Publication number Publication date
KR100691594B1 (ko) 2007-03-09
JP2002222919A (ja) 2002-08-09
US20020096677A1 (en) 2002-07-25
US7339411B2 (en) 2008-03-04
KR20020062791A (ko) 2002-07-31
TW515082B (en) 2002-12-21
US20060033559A1 (en) 2006-02-16

Similar Documents

Publication Publication Date Title
JP4292720B2 (ja) 電源ノイズ検出回路を有する半導体集積回路およびプロセッサ
US9899066B2 (en) Priority based backup in nonvolatile logic arrays
JPH04143819A (ja) 消費電力制御方法、半導体集積回路装置およびマイクロプロセツサ
US20120275236A1 (en) Method and Apparatus for Power Domain Isolation during Power Down
WO2009107408A1 (ja) 不揮発性記憶ゲートおよびその動作方法、および不揮発性記憶ゲート組込み型論理回路およびその動作方法
US9436598B2 (en) Semiconductor device with nonvolatile memory prevented from malfunctioning caused by momentary power interruption
US7511535B2 (en) Fine-grained power management of synchronous and asynchronous datapath circuits
JP2000156083A (ja) 半導体装置
US6189133B1 (en) Coupling noise reduction technique using reset timing
JP3898371B2 (ja) 同期式ｄｒａｍ半導体装置
US10553274B2 (en) Low active power write driver with reduced-power boost circuit
EP0343626A2 (en) Microprocessor operable in a functional redundancy monitor mode
US10199094B2 (en) Write operation scheme for SRAM
JPH10199254A (ja) 電力節減機能付半導体メモリ素子のバッファ制御回路および方法
JP4883621B2 (ja) 半導体集積回路
US20070271421A1 (en) Reducing aging effect on memory
CN110007739A (zh) 一种噪声屏蔽电路及芯片
US20100091583A1 (en) Memory device having latch for charging or discharging data input/output line
US20080101129A1 (en) Semiconductor memory device
JP2007220148A (ja) マイクロプロセッサ
JP3080785B2 (ja) システムクロック選択回路
EP0458362A2 (en) Low power consumption programmable logic array (PLA) and data processing system incorporating the PLA
JP2004135063A (ja) 半導体集積回路
JP3729827B2 (ja) マイクロプロセッサ
JP3559631B2 (ja) 半導体メモリ及びデータ処理装置

Legal Events

Date Code Title Description
RD01 Notification of change of attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7421

Effective date: 20060418

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20080110

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20080110

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20081224

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20081224

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20090220

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20090317

A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20090330

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120417

Year of fee payment: 3

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120417

Year of fee payment: 3

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120417

Year of fee payment: 3

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130417

Year of fee payment: 4

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130417

Year of fee payment: 4

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20140417

Year of fee payment: 5

LAPS Cancellation because of no payment of annual fees