JP4188337B2 - 積層型電子部品の製造方法 - Google Patents

積層型電子部品の製造方法 Download PDF

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Publication number
JP4188337B2
JP4188337B2 JP2005126443A JP2005126443A JP4188337B2 JP 4188337 B2 JP4188337 B2 JP 4188337B2 JP 2005126443 A JP2005126443 A JP 2005126443A JP 2005126443 A JP2005126443 A JP 2005126443A JP 4188337 B2 JP4188337 B2 JP 4188337B2
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JP
Japan
Prior art keywords
layer
semiconductor element
electronic component
bonding
semiconductor
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Expired - Fee Related
Application number
JP2005126443A
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English (en)
Japanese (ja)
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JP2006005333A5 (enExample
JP2006005333A (ja
Inventor
淳 芳村
直幸 小牟田
英夫 沼田
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Toshiba Corp
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Toshiba Corp
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Publication date
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Priority to JP2005126443A priority Critical patent/JP4188337B2/ja
Publication of JP2006005333A publication Critical patent/JP2006005333A/ja
Publication of JP2006005333A5 publication Critical patent/JP2006005333A5/ja
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Publication of JP4188337B2 publication Critical patent/JP4188337B2/ja
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Expired - Fee Related legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32135—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/32145—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/095—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
    • H01L2924/097—Glass-ceramics, e.g. devitrified glass
    • H01L2924/09701—Low temperature co-fired ceramic [LTCC]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19107—Disposition of discrete passive components off-chip wires

Landscapes

  • Die Bonding (AREA)
  • Wire Bonding (AREA)
JP2005126443A 2004-05-20 2005-04-25 積層型電子部品の製造方法 Expired - Fee Related JP4188337B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2005126443A JP4188337B2 (ja) 2004-05-20 2005-04-25 積層型電子部品の製造方法

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2004150046 2004-05-20
JP2004150047 2004-05-20
JP2005126443A JP4188337B2 (ja) 2004-05-20 2005-04-25 積層型電子部品の製造方法

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2008117005A Division JP4746646B2 (ja) 2004-05-20 2008-04-28 積層型電子部品

Publications (3)

Publication Number Publication Date
JP2006005333A JP2006005333A (ja) 2006-01-05
JP2006005333A5 JP2006005333A5 (enExample) 2006-09-14
JP4188337B2 true JP4188337B2 (ja) 2008-11-26

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Country Status (1)

Country Link
JP (1) JP4188337B2 (enExample)

Families Citing this family (34)

* Cited by examiner, † Cited by third party
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WO2007026392A1 (ja) 2005-08-30 2007-03-08 Spansion Llc 半導体装置およびその製造方法
JP4621595B2 (ja) * 2006-01-11 2011-01-26 株式会社東芝 半導体装置の製造方法
JP2007242684A (ja) * 2006-03-06 2007-09-20 Disco Abrasive Syst Ltd 積層型半導体装置及びデバイスの積層方法
JP4881044B2 (ja) 2006-03-16 2012-02-22 株式会社東芝 積層型半導体装置の製造方法
JP5207336B2 (ja) * 2006-06-05 2013-06-12 ルネサスエレクトロニクス株式会社 半導体装置
WO2007145599A1 (en) * 2006-06-12 2007-12-21 Stats Chippac Ltd Integrated circuit package system with offset stacked die
JP5166716B2 (ja) * 2006-09-26 2013-03-21 積水化学工業株式会社 半導体チップ積層体及びその製造方法
KR100837000B1 (ko) 2007-05-22 2008-06-10 엘에스전선 주식회사 와이어 침투 다이 접착 필름
JP5529371B2 (ja) * 2007-10-16 2014-06-25 ピーエスフォー ルクスコ エスエイアールエル 半導体装置及びその製造方法
JP2010040835A (ja) 2008-08-06 2010-02-18 Toshiba Corp 積層型半導体装置の製造方法
JP5595314B2 (ja) * 2011-03-22 2014-09-24 ルネサスエレクトロニクス株式会社 半導体装置
JP5673423B2 (ja) 2011-08-03 2015-02-18 富士通セミコンダクター株式会社 半導体装置および半導体装置の製造方法
JP5571045B2 (ja) * 2011-08-19 2014-08-13 株式会社東芝 積層型半導体装置
JP2013098240A (ja) * 2011-10-28 2013-05-20 Toshiba Corp 記憶装置、半導体装置及び半導体装置の製造方法
JP5840479B2 (ja) * 2011-12-20 2016-01-06 株式会社東芝 半導体装置およびその製造方法
JP5918664B2 (ja) * 2012-09-10 2016-05-18 株式会社東芝 積層型半導体装置の製造方法
JP5853944B2 (ja) * 2012-12-25 2016-02-09 住友ベークライト株式会社 半導体装置の製造方法
JP6101492B2 (ja) * 2013-01-10 2017-03-22 日東電工株式会社 接着フィルム、ダイシング・ダイボンドフィルム、半導体装置の製造方法及び半導体装置
JP5814965B2 (ja) * 2013-03-15 2015-11-17 株式会社東芝 半導体装置
JP2014216488A (ja) * 2013-04-25 2014-11-17 日東電工株式会社 接着フィルム、ダイシング・ダイボンドフィルム、半導体装置の製造方法及び半導体装置
KR102191823B1 (ko) * 2013-12-27 2020-12-16 엘지디스플레이 주식회사 유기발광다이오드 표시장치 및 이의 제조방법
JP6373811B2 (ja) * 2015-09-08 2018-08-15 東芝メモリ株式会社 半導体装置の製造方法および製造装置
US10418343B2 (en) * 2017-12-05 2019-09-17 Infineon Technologies Ag Package-in-package structure for semiconductor devices and methods of manufacture
SG11202004664PA (en) * 2018-01-30 2020-06-29 Hitachi Chemical Co Ltd Semiconductor device production method and film-shaped adhesive
WO2020217394A1 (ja) * 2019-04-25 2020-10-29 日立化成株式会社 ドルメン構造を有する半導体装置及びその製造方法、並びに、支持片形成用積層フィルム及びその製造方法
WO2020217397A1 (ja) * 2019-04-25 2020-10-29 日立化成株式会社 ドルメン構造を有する半導体装置の製造方法、支持片の製造方法及び積層フィルム
WO2020217401A1 (ja) * 2019-04-25 2020-10-29 日立化成株式会社 ドルメン構造を有する半導体装置及びその製造方法、並びに、支持片形成用積層フィルム及びその製造方法
JP7247733B2 (ja) * 2019-04-25 2023-03-29 株式会社レゾナック ドルメン構造を有する半導体装置の製造方法
WO2020217395A1 (ja) * 2019-04-25 2020-10-29 日立化成株式会社 ドルメン構造を有する半導体装置及びその製造方法、支持片の製造方法、並びに、支持片形成用積層フィルム
WO2020217411A1 (ja) * 2019-04-25 2020-10-29 日立化成株式会社 ドルメン構造を有する半導体装置及びその製造方法、並びに、支持片形成用積層フィルム及びその製造方法
SG11202110100WA (en) * 2019-04-25 2021-11-29 Showa Denko Materials Co Ltd Method for manufacturing semiconductor device having dolmen structure, method for manufacturing support piece, and laminate film for support piece formation
KR102711424B1 (ko) * 2019-04-25 2024-09-26 가부시끼가이샤 레조낙 돌멘 구조를 갖는 반도체 장치 및 그 제조 방법
KR102780310B1 (ko) * 2019-08-29 2025-03-11 가부시끼가이샤 레조낙 지지편의 제조 방법, 반도체 장치의 제조 방법, 및 지지편 형성용 적층 필름
JP7703328B2 (ja) * 2021-01-25 2025-07-07 キオクシア株式会社 半導体装置

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