JP4117369B2 - アクティブマトリクス方式液晶表示装置 - Google Patents
アクティブマトリクス方式液晶表示装置 Download PDFInfo
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- JP4117369B2 JP4117369B2 JP2007059644A JP2007059644A JP4117369B2 JP 4117369 B2 JP4117369 B2 JP 4117369B2 JP 2007059644 A JP2007059644 A JP 2007059644A JP 2007059644 A JP2007059644 A JP 2007059644A JP 4117369 B2 JP4117369 B2 JP 4117369B2
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- 239000004973 liquid crystal related substance Substances 0.000 title description 21
- 239000011159 matrix material Substances 0.000 title description 3
- 239000004065 semiconductor Substances 0.000 claims description 64
- 239000002184 metal Substances 0.000 claims description 38
- 229910052751 metal Inorganic materials 0.000 claims description 38
- 230000001681 protective effect Effects 0.000 claims description 25
- 239000000758 substrate Substances 0.000 claims description 21
- 239000012535 impurity Substances 0.000 claims description 14
- 238000005530 etching Methods 0.000 claims description 7
- 239000004020 conductor Substances 0.000 claims 1
- 230000000149 penetrating effect Effects 0.000 claims 1
- 239000010410 layer Substances 0.000 description 127
- 238000004519 manufacturing process Methods 0.000 description 21
- 239000011521 glass Substances 0.000 description 11
- 238000000034 method Methods 0.000 description 11
- 239000010408 film Substances 0.000 description 6
- 229910052581 Si3N4 Inorganic materials 0.000 description 5
- 238000000059 patterning Methods 0.000 description 5
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 5
- 229910021417 amorphous silicon Inorganic materials 0.000 description 3
- 238000004544 sputter deposition Methods 0.000 description 3
- 229910018125 Al-Si Inorganic materials 0.000 description 2
- 229910018520 Al—Si Inorganic materials 0.000 description 2
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 2
- XYFCBTPGUUZFHI-UHFFFAOYSA-N Phosphine Natural products P XYFCBTPGUUZFHI-UHFFFAOYSA-N 0.000 description 2
- 229910018594 Si-Cu Inorganic materials 0.000 description 2
- 229910008332 Si-Ti Inorganic materials 0.000 description 2
- 229910004205 SiNX Inorganic materials 0.000 description 2
- 229910008465 Si—Cu Inorganic materials 0.000 description 2
- 229910006749 Si—Ti Inorganic materials 0.000 description 2
- 238000000151 deposition Methods 0.000 description 2
- 239000007789 gas Substances 0.000 description 2
- 238000009413 insulation Methods 0.000 description 2
- 238000005268 plasma chemical vapour deposition Methods 0.000 description 2
- 230000007261 regionalization Effects 0.000 description 2
- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 description 1
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000010292 electrical insulation Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 229910000073 phosphorus hydride Inorganic materials 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 229920002120 photoresistant polymer Polymers 0.000 description 1
- 239000011241 protective layer Substances 0.000 description 1
- 229910000077 silane Inorganic materials 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66742—Thin film unipolar transistors
- H01L29/6675—Amorphous silicon or polysilicon transistors
- H01L29/66765—Lateral single gate single channel transistors with inverted structure, i.e. the channel layer is formed after the gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78651—Silicon transistors
- H01L29/7866—Non-monocrystalline silicon transistors
- H01L29/78663—Amorphous silicon transistors
- H01L29/78669—Amorphous silicon transistors with inverted-type structure, e.g. with bottom gate
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
Description
図1のようにTFTアレイを具備した一般の液晶表示装置は、透明ガラス基板上に大略長方形の画素電極47が行、列で近接して配列されている。ゲートバス配線(アトレスライン)13は画素電極47の各行配列に沿って近接して形成されており、ソースバス配線(データライン)14は画素電極47の各列配列に沿って近接して形成されている。
基板の全面にSiNxから成る第1絶縁層(ゲート絶縁層)35と、a−Siから成る半導体層37及びSiNxから成る第2絶縁層とを順次被着する。
図4に示すように、前記第2絶縁層のパターニングを行ってエッチストッパ40を形成し、n+型a−Siから成る不純物がドープされた半導体39層を基板の全面に被着した後、該不純物半導体層39と半導体層37とを同時にパターニングする(図5)。
まず、透明ガラス基板131の一面にAl、又は、Al系合金のAl−Pd、Al−Si、Al−Si−Ti、Al−Si−Cu等から成る第1金属層をスパッタリング法で被着する。写真食刻法で第1金属層を選択的にエッチングしてゲート電極133を形成する(図8)。
もし必要であれば、耐化学性、耐熱性、特に、続いて形成するゲート絶縁層との接着性等の向上のため、ゲート電極133を陽極酸化させ、陽極酸化層を形成するようにしてもよい。該陽極酸化層は続いて形成されるゲート絶縁層の窒化シリコンと共に絶縁層として機能してゲート電極133と近接の信号線間の電気的絶縁性を向上させる役割を果たす。
そして、エッチストッパ140上の開口と、第2金属層143の一部分が露出するコンタクトホールを形成するように保護絶縁層145をパターニングする(図14)。
そして、図16に示されるように、保護絶縁層145をマスクとして用いて、露出された第2金属層の部分143とN+半導体層139とをエッチングして、ソース電極143aとドレイン電極143bを形成する。
前記第2金属層143とN+半導体層139のエッチングの前に、保護絶縁層145にコンタクトホールを形成して、その後に前記画素電極147を形成する理由は、前記画素電極147は、コンタクトホールを介して露出された第2金属層143をエッチングされることを防ぐ役割をするためである。従って、製造工程の順序が重要である。それで、第2金属層143及びN+半導体層139は単一の工程でエッチングされる。これに対して、前記の従来の工程によると、エッチングストッパ140上に形成される各層は各々別々の工程でエッチングされる。
14 ソース配線
31、131 透明ガラス基板
33、133 ゲート電極
35、135 第1絶縁層
37、137 半導体層
39、139 不純物半導体層
40、140 エッチストッパ
43、143 第2金属層
43a、143a ソース電極
43b、143b ドレイン電極
45、145 保護絶縁層
47、147 画素電極
Claims (6)
- 基板と、
前記基板上に形成されたゲート電極と、
前記ゲート電極を被覆するように前記基板上に形成されたゲート絶縁層と、
前記ゲート絶縁層上に形成された第1半導体層と、
前記第1半導体層上に形成された、不純物を含む第2半導体層と、
前記第1半導体層と前記第2半導体層との間に形成されたエッチストッパと、
前記第2半導体層上に形成された金属層と、
前記第1半導体層と前記第2半導体層と前記金属層とを被覆する保護絶縁層と、
前記保護絶縁層に形成され、前記金属層の一部を露出させる第1開口と、
前記保護絶縁層に形成され、前記エッチストッパの一部を露出させる第2開口と、
前記保護絶縁層上に、前記第1開口を通じて前記金属層と接触するように形成された透明導電層と、
前記保護絶縁層を貫通する前記第2開口を通じて前記金属層と前記第2半導体層をエッチングすることで形成した、前記金属層からなるソースおよびドレイン領域と、を備え、
前記金属層と前記第1半導体層と前記第2半導体層のそれぞれのエッジ部の位置は大略一致することを特徴とする半導体装置。 - 前記第1半導体層は実質的に不純物がドープされていない半導体層であることを特徴とする、請求項1記載の半導体装置。
- 前記第1開口は、前記ドレイン領域の上に位置していることを特徴とする、請求項1記載の半導体装置。
- 前記保護絶縁層に形成された前記第2開口は前記エッチストッパと実質的に位置合わせされたことを特徴とする、請求項1記載の半導体装置。
- 前記透明導電層は透明電極であり、前記保護絶縁層の前記第1開口を通じて前記金属層と電気的に接触することを特徴とする、請求項1記載の半導体装置。
- 前記透明電極は透明導電物質を含むことを特徴とする、請求項5記載の半導体装置。
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019960010637A KR100202236B1 (ko) | 1996-04-09 | 1996-04-09 | 액티브 매트릭스 기판의 제조방법 및 그 방법에 의해 제조되는 액티브 매트릭스 기판 |
Related Parent Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP10525597A Division JP4034376B2 (ja) | 1996-04-09 | 1997-04-08 | アクティブマトリクス方式液晶表示装置の製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2007206712A JP2007206712A (ja) | 2007-08-16 |
JP4117369B2 true JP4117369B2 (ja) | 2008-07-16 |
Family
ID=19455336
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP10525597A Expired - Lifetime JP4034376B2 (ja) | 1996-04-09 | 1997-04-08 | アクティブマトリクス方式液晶表示装置の製造方法 |
JP2007059644A Expired - Lifetime JP4117369B2 (ja) | 1996-04-09 | 2007-03-09 | アクティブマトリクス方式液晶表示装置 |
Family Applications Before (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP10525597A Expired - Lifetime JP4034376B2 (ja) | 1996-04-09 | 1997-04-08 | アクティブマトリクス方式液晶表示装置の製造方法 |
Country Status (5)
Country | Link |
---|---|
JP (2) | JP4034376B2 (ja) |
KR (1) | KR100202236B1 (ja) |
DE (1) | DE19714690C2 (ja) |
FR (1) | FR2747237B1 (ja) |
GB (1) | GB2312092B (ja) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100538293B1 (ko) * | 1998-04-03 | 2006-03-17 | 삼성전자주식회사 | 평면 구동 방식 액정 표시 장치의 제조 방법 |
TW525216B (en) | 2000-12-11 | 2003-03-21 | Semiconductor Energy Lab | Semiconductor device, and manufacturing method thereof |
SG111923A1 (en) | 2000-12-21 | 2005-06-29 | Semiconductor Energy Lab | Light emitting device and method of manufacturing the same |
KR100980015B1 (ko) * | 2003-08-19 | 2010-09-03 | 삼성전자주식회사 | 박막 트랜지스터 표시판 및 그 제조 방법 |
KR102183920B1 (ko) | 2013-12-16 | 2020-11-30 | 삼성디스플레이 주식회사 | 박막 트랜지스터 표시판 및 그 제조 방법 |
CN104022126B (zh) * | 2014-05-28 | 2017-04-12 | 京东方科技集团股份有限公司 | 一种阵列基板、其制作方法及显示装置 |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2629743B2 (ja) * | 1987-10-08 | 1997-07-16 | カシオ計算機株式会社 | 薄膜トランジスタの製造方法 |
US5173753A (en) * | 1989-08-10 | 1992-12-22 | Industrial Technology Research Institute | Inverted coplanar amorphous silicon thin film transistor which provides small contact capacitance and resistance |
US5130263A (en) * | 1990-04-17 | 1992-07-14 | General Electric Company | Method for photolithographically forming a selfaligned mask using back-side exposure and a non-specular reflecting layer |
DE69115405T2 (de) * | 1990-09-21 | 1996-06-13 | Casio Computer Co Ltd | Dünnfilmtransistor und eine Dünnfilmtransistorpanele, die solche Transistoren verwendet |
JPH04505832A (ja) * | 1990-10-05 | 1992-10-08 | ゼネラル・エレクトリック・カンパニイ | 改良されたソース/ドレイン接点を持つ薄膜トランジスタ構造 |
KR920010885A (ko) * | 1990-11-30 | 1992-06-27 | 카나이 쯔또무 | 박막반도체와 그 제조방법 및 제조장치 및 화상처리장치 |
EP0545327A1 (en) * | 1991-12-02 | 1993-06-09 | Matsushita Electric Industrial Co., Ltd. | Thin-film transistor array for use in a liquid crystal display |
EP0566838A3 (en) * | 1992-02-21 | 1996-07-31 | Matsushita Electric Ind Co Ltd | Manufacturing method of thin film transistor |
US5539219A (en) * | 1995-05-19 | 1996-07-23 | Ois Optical Imaging Systems, Inc. | Thin film transistor with reduced channel length for liquid crystal displays |
-
1996
- 1996-04-09 KR KR1019960010637A patent/KR100202236B1/ko not_active IP Right Cessation
-
1997
- 1997-03-11 FR FR9702841A patent/FR2747237B1/fr not_active Expired - Lifetime
- 1997-04-04 GB GB9706824A patent/GB2312092B/en not_active Expired - Lifetime
- 1997-04-08 JP JP10525597A patent/JP4034376B2/ja not_active Expired - Lifetime
- 1997-04-09 DE DE19714690A patent/DE19714690C2/de not_active Expired - Lifetime
-
2007
- 2007-03-09 JP JP2007059644A patent/JP4117369B2/ja not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
JPH1039331A (ja) | 1998-02-13 |
KR970072497A (ko) | 1997-11-07 |
JP2007206712A (ja) | 2007-08-16 |
GB2312092B (en) | 1998-06-03 |
JP4034376B2 (ja) | 2008-01-16 |
FR2747237B1 (fr) | 1999-04-16 |
GB2312092A (en) | 1997-10-15 |
DE19714690C2 (de) | 2003-12-11 |
DE19714690A1 (de) | 1997-10-30 |
KR100202236B1 (ko) | 1999-07-01 |
GB9706824D0 (en) | 1997-05-21 |
FR2747237A1 (fr) | 1997-10-10 |
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