JP4112729B2 - 半導体装置 - Google Patents

半導体装置 Download PDF

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Publication number
JP4112729B2
JP4112729B2 JP03695399A JP3695399A JP4112729B2 JP 4112729 B2 JP4112729 B2 JP 4112729B2 JP 03695399 A JP03695399 A JP 03695399A JP 3695399 A JP3695399 A JP 3695399A JP 4112729 B2 JP4112729 B2 JP 4112729B2
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JP
Japan
Prior art keywords
circuit
signal
memory cell
read
cpu
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Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP03695399A
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English (en)
Japanese (ja)
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JP2000235796A5 (enExample
JP2000235796A (ja
Inventor
礼二 玉城
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Renesas Technology Corp
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Renesas Technology Corp
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Publication date
Application filed by Renesas Technology Corp filed Critical Renesas Technology Corp
Priority to JP03695399A priority Critical patent/JP4112729B2/ja
Priority to US09/411,836 priority patent/US6219300B1/en
Publication of JP2000235796A publication Critical patent/JP2000235796A/ja
Publication of JP2000235796A5 publication Critical patent/JP2000235796A5/ja
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Publication of JP4112729B2 publication Critical patent/JP4112729B2/ja
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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/06—Sense amplifiers; Associated circuits, e.g. timing or triggering circuits
    • G11C7/062—Differential amplifiers of non-latching type, e.g. comparators, long-tailed pairs
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/06—Sense amplifiers; Associated circuits, e.g. timing or triggering circuits

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  • Dram (AREA)
  • Static Random-Access Memory (AREA)
  • Read Only Memory (AREA)
JP03695399A 1999-02-16 1999-02-16 半導体装置 Expired - Fee Related JP4112729B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP03695399A JP4112729B2 (ja) 1999-02-16 1999-02-16 半導体装置
US09/411,836 US6219300B1 (en) 1999-02-16 1999-10-04 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP03695399A JP4112729B2 (ja) 1999-02-16 1999-02-16 半導体装置

Publications (3)

Publication Number Publication Date
JP2000235796A JP2000235796A (ja) 2000-08-29
JP2000235796A5 JP2000235796A5 (enExample) 2005-10-27
JP4112729B2 true JP4112729B2 (ja) 2008-07-02

Family

ID=12484121

Family Applications (1)

Application Number Title Priority Date Filing Date
JP03695399A Expired - Fee Related JP4112729B2 (ja) 1999-02-16 1999-02-16 半導体装置

Country Status (2)

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US (1) US6219300B1 (enExample)
JP (1) JP4112729B2 (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0751920A (ja) * 1993-08-19 1995-02-28 Techno Sakato:Kk 軸装置及び該軸装置を用いたカッター

Families Citing this family (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001222899A (ja) * 1999-11-30 2001-08-17 Seiko Epson Corp 半導体集積回路
US20030112665A1 (en) * 2001-12-17 2003-06-19 Nec Electronics Corporation Semiconductor memory device, data processor, and method of determining frequency
US7106636B2 (en) * 2004-06-22 2006-09-12 Intel Corporation Partitionable memory device, system, and method
KR100672147B1 (ko) * 2005-03-15 2007-01-19 주식회사 하이닉스반도체 불휘발성 메모리 장치의 체크 보드 프로그램 시에 프로그램페일을 방지하기 위한 페이지 버퍼
KR100756798B1 (ko) 2006-04-24 2007-09-07 주식회사 하이닉스반도체 Ｒｆｉｄ 장치
US7536570B2 (en) * 2006-10-02 2009-05-19 Silicon Laboratories Inc. Microcontroller unit (MCU) with suspend mode
US7886084B2 (en) 2007-06-26 2011-02-08 International Business Machines Corporation Optimized collectives using a DMA on a parallel computer
US8108738B2 (en) 2007-06-26 2012-01-31 International Business Machines Corporation Data eye monitor method and apparatus
US7984448B2 (en) * 2007-06-26 2011-07-19 International Business Machines Corporation Mechanism to support generic collective communication across a variety of programming models
US8230433B2 (en) 2007-06-26 2012-07-24 International Business Machines Corporation Shared performance monitor in a multiprocessor system
US7873843B2 (en) * 2007-06-26 2011-01-18 International Business Machines Corporation Static power reduction for midpoint-terminated busses
US8458282B2 (en) 2007-06-26 2013-06-04 International Business Machines Corporation Extended write combining using a write continuation hint flag
US7877551B2 (en) * 2007-06-26 2011-01-25 International Business Machines Corporation Programmable partitioning for high-performance coherence domains in a multiprocessor system
US8468416B2 (en) 2007-06-26 2013-06-18 International Business Machines Corporation Combined group ECC protection and subgroup parity protection
US7827391B2 (en) 2007-06-26 2010-11-02 International Business Machines Corporation Method and apparatus for single-stepping coherence events in a multiprocessor system under software control
US8103832B2 (en) * 2007-06-26 2012-01-24 International Business Machines Corporation Method and apparatus of prefetching streams of varying prefetch depth
US7802025B2 (en) 2007-06-26 2010-09-21 International Business Machines Corporation DMA engine for repeating communication patterns
US8032892B2 (en) * 2007-06-26 2011-10-04 International Business Machines Corporation Message passing with a limited number of DMA byte counters
US8010875B2 (en) 2007-06-26 2011-08-30 International Business Machines Corporation Error correcting code with chip kill capability and power saving enhancement
US8140925B2 (en) 2007-06-26 2012-03-20 International Business Machines Corporation Method and apparatus to debug an integrated circuit chip via synchronous clock stop and scan
US7793038B2 (en) 2007-06-26 2010-09-07 International Business Machines Corporation System and method for programmable bank selection for banked memory subsystems
US8756350B2 (en) 2007-06-26 2014-06-17 International Business Machines Corporation Method and apparatus for efficiently tracking queue entries relative to a timestamp
US8509255B2 (en) 2007-06-26 2013-08-13 International Business Machines Corporation Hardware packet pacing using a DMA in a parallel computer
EP2539897B1 (en) * 2010-02-23 2020-03-18 Rambus Inc. Methods and circuits for dynamically scaling dram power and performance
JP5328957B2 (ja) * 2012-04-17 2013-10-30 ルネサスエレクトロニクス株式会社 半導体記憶装置
TWI610179B (zh) * 2016-12-07 2018-01-01 慧榮科技股份有限公司 主機裝置與資料傳輸速率控制方法
JP2020004119A (ja) * 2018-06-28 2020-01-09 ルネサスエレクトロニクス株式会社 半導体装置およびそれを用いた制御システム

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2743653B2 (ja) 1991-09-20 1998-04-22 富士通株式会社 半導体記憶装置
JPH06275081A (ja) 1993-03-18 1994-09-30 Fujitsu Ltd 半導体記憶装置
US5497355A (en) * 1994-06-03 1996-03-05 Intel Corporation Synchronous address latching for memory arrays
JPH10275140A (ja) * 1997-03-31 1998-10-13 Nec Ic Microcomput Syst Ltd マイクロコンピュータ
JP3090104B2 (ja) * 1997-10-27 2000-09-18 日本電気株式会社 半導体メモリ装置

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0751920A (ja) * 1993-08-19 1995-02-28 Techno Sakato:Kk 軸装置及び該軸装置を用いたカッター

Also Published As

Publication number Publication date
JP2000235796A (ja) 2000-08-29
US6219300B1 (en) 2001-04-17

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