JP4109839B2 - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
- Publication number
- JP4109839B2 JP4109839B2 JP2001167185A JP2001167185A JP4109839B2 JP 4109839 B2 JP4109839 B2 JP 4109839B2 JP 2001167185 A JP2001167185 A JP 2001167185A JP 2001167185 A JP2001167185 A JP 2001167185A JP 4109839 B2 JP4109839 B2 JP 4109839B2
- Authority
- JP
- Japan
- Prior art keywords
- chip
- interlayer connection
- terminals
- substrates
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/50—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor for integrated circuit devices, e.g. power bus, number of leads
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5382—Adaptable interconnections, e.g. for engineering changes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of semiconductor or other solid state devices
- H01L25/03—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/065—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H10D89/00
- H01L25/0657—Stacked arrangements of devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of semiconductor or other solid state devices
- H01L25/03—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes
- H01L25/10—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices having separate containers
- H01L25/105—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices having separate containers the devices being integrated devices of class H10
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Semiconductor Memories (AREA)
- Dram (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Priority Applications (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2001167185A JP4109839B2 (ja) | 2001-06-01 | 2001-06-01 | 半導体装置 |
| TW091110913A TW541585B (en) | 2001-06-01 | 2002-05-23 | Chip-stacked semiconductor device |
| KR10-2002-0029835A KR100512835B1 (ko) | 2001-06-01 | 2002-05-29 | 칩 적층형 반도체 장치 |
| US10/156,819 US6861738B2 (en) | 2001-06-01 | 2002-05-30 | Laminated-chip semiconductor device |
| CNB021221596A CN100524744C (zh) | 2001-06-01 | 2002-05-31 | 芯片层叠型半导体装置 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2001167185A JP4109839B2 (ja) | 2001-06-01 | 2001-06-01 | 半導体装置 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2002368185A JP2002368185A (ja) | 2002-12-20 |
| JP2002368185A5 JP2002368185A5 (enExample) | 2005-10-27 |
| JP4109839B2 true JP4109839B2 (ja) | 2008-07-02 |
Family
ID=19009610
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2001167185A Expired - Fee Related JP4109839B2 (ja) | 2001-06-01 | 2001-06-01 | 半導体装置 |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US6861738B2 (enExample) |
| JP (1) | JP4109839B2 (enExample) |
| KR (1) | KR100512835B1 (enExample) |
| CN (1) | CN100524744C (enExample) |
| TW (1) | TW541585B (enExample) |
Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2004095799A (ja) | 2002-08-30 | 2004-03-25 | Toshiba Corp | 半導体装置およびその製造方法 |
| JP4799157B2 (ja) * | 2005-12-06 | 2011-10-26 | エルピーダメモリ株式会社 | 積層型半導体装置 |
| CN100547784C (zh) * | 2005-12-16 | 2009-10-07 | 晨星半导体股份有限公司 | 多芯片封装结构的内连线 |
| JP2009026884A (ja) | 2007-07-18 | 2009-02-05 | Elpida Memory Inc | 回路モジュール及び電気部品 |
| US11056463B2 (en) * | 2014-12-18 | 2021-07-06 | Sony Corporation | Arrangement of penetrating electrode interconnections |
| US11824009B2 (en) * | 2018-12-10 | 2023-11-21 | Preferred Networks, Inc. | Semiconductor device and data transferring method for semiconductor device |
| JPWO2023119450A1 (enExample) * | 2021-12-21 | 2023-06-29 |
Family Cites Families (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH04284661A (ja) | 1991-03-13 | 1992-10-09 | Toshiba Corp | 半導体装置 |
| KR100204753B1 (ko) * | 1996-03-08 | 1999-06-15 | 윤종용 | 엘오씨 유형의 적층 칩 패키지 |
| JPH10107205A (ja) * | 1996-09-27 | 1998-04-24 | Hitachi Ltd | 積層半導体モジュール |
| SE511425C2 (sv) * | 1996-12-19 | 1999-09-27 | Ericsson Telefon Ab L M | Packningsanordning för integrerade kretsar |
| JP2870530B1 (ja) * | 1997-10-30 | 1999-03-17 | 日本電気株式会社 | スタックモジュール用インターポーザとスタックモジュール |
| JP3519924B2 (ja) * | 1997-11-21 | 2004-04-19 | ローム株式会社 | 半導体装置の構造及びその製造方法 |
| KR100271639B1 (ko) * | 1997-12-23 | 2000-11-15 | 김영환 | 적층형 반도체패키지 및 그 제조방법 및 그 적층방법 |
| DE19801312A1 (de) * | 1998-01-15 | 1999-07-22 | Siemens Ag | Halbleiterbauelement mit mehreren Substratlagen und zumindest einem Halbleiterchip und einem Verfahren zum Herstellen eines solchen Halbleiterbauelementes |
| JP3186700B2 (ja) * | 1998-06-24 | 2001-07-11 | 日本電気株式会社 | 半導体装置及びその製造方法 |
| KR20000011420U (ko) * | 1998-12-02 | 2000-07-05 | 김영환 | 적층형 반도체 패키지 |
-
2001
- 2001-06-01 JP JP2001167185A patent/JP4109839B2/ja not_active Expired - Fee Related
-
2002
- 2002-05-23 TW TW091110913A patent/TW541585B/zh not_active IP Right Cessation
- 2002-05-29 KR KR10-2002-0029835A patent/KR100512835B1/ko not_active Expired - Fee Related
- 2002-05-30 US US10/156,819 patent/US6861738B2/en not_active Expired - Fee Related
- 2002-05-31 CN CNB021221596A patent/CN100524744C/zh not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JP2002368185A (ja) | 2002-12-20 |
| KR100512835B1 (ko) | 2005-09-07 |
| KR20020092193A (ko) | 2002-12-11 |
| US6861738B2 (en) | 2005-03-01 |
| CN100524744C (zh) | 2009-08-05 |
| CN1399338A (zh) | 2003-02-26 |
| US20020180030A1 (en) | 2002-12-05 |
| TW541585B (en) | 2003-07-11 |
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