JP3967108B2 - 半導体装置およびその製造方法 - Google Patents

半導体装置およびその製造方法 Download PDF

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Publication number
JP3967108B2
JP3967108B2 JP2001329687A JP2001329687A JP3967108B2 JP 3967108 B2 JP3967108 B2 JP 3967108B2 JP 2001329687 A JP2001329687 A JP 2001329687A JP 2001329687 A JP2001329687 A JP 2001329687A JP 3967108 B2 JP3967108 B2 JP 3967108B2
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Japan
Prior art keywords
wiring
layer
capacitor
pitch
conductor
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Expired - Fee Related
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JP2001329687A
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English (en)
Japanese (ja)
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JP2003133507A (ja
JP2003133507A5 (https=
Inventor
圭史郎 岡本
健司 塩賀
修 谷口
孝司 表
佳彦 今中
康男 山岸
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Fujitsu Ltd
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Fujitsu Ltd
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Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP2001329687A priority Critical patent/JP3967108B2/ja
Priority to US10/092,525 priority patent/US7176556B2/en
Publication of JP2003133507A publication Critical patent/JP2003133507A/ja
Publication of JP2003133507A5 publication Critical patent/JP2003133507A5/ja
Priority to US11/600,211 priority patent/US7557014B2/en
Application granted granted Critical
Publication of JP3967108B2 publication Critical patent/JP3967108B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01—Manufacture or treatment
    • H10W70/05—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/68—Shapes or dispositions thereof
    • H10W70/685—Shapes or dispositions thereof comprising multiple insulating layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/63—Vias, e.g. via plugs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/941—Dispositions of bond pads
    • H10W72/9415—Dispositions of bond pads relative to the surface, e.g. recessed, protruding
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL

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  • Semiconductor Integrated Circuits (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
JP2001329687A 2001-10-26 2001-10-26 半導体装置およびその製造方法 Expired - Fee Related JP3967108B2 (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2001329687A JP3967108B2 (ja) 2001-10-26 2001-10-26 半導体装置およびその製造方法
US10/092,525 US7176556B2 (en) 2001-10-26 2002-03-08 Semiconductor system-in-package
US11/600,211 US7557014B2 (en) 2001-10-26 2006-11-16 Semiconductor system-in-package

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2001329687A JP3967108B2 (ja) 2001-10-26 2001-10-26 半導体装置およびその製造方法

Publications (3)

Publication Number Publication Date
JP2003133507A JP2003133507A (ja) 2003-05-09
JP2003133507A5 JP2003133507A5 (https=) 2005-07-07
JP3967108B2 true JP3967108B2 (ja) 2007-08-29

Family

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Family Applications (1)

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JP2001329687A Expired - Fee Related JP3967108B2 (ja) 2001-10-26 2001-10-26 半導体装置およびその製造方法

Country Status (2)

Country Link
US (2) US7176556B2 (https=)
JP (1) JP3967108B2 (https=)

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TWI419277B (zh) * 2010-08-05 2013-12-11 日月光半導體製造股份有限公司 線路基板及其製作方法與封裝結構及其製作方法
JP5275400B2 (ja) 2011-04-18 2013-08-28 新光電気工業株式会社 配線基板、半導体装置及び配線基板の製造方法
JP5275401B2 (ja) 2011-04-18 2013-08-28 新光電気工業株式会社 配線基板、半導体装置及び配線基板の製造方法
US20120292777A1 (en) * 2011-05-18 2012-11-22 Lotz Jonathan P Backside Power Delivery Using Die Stacking
US8994157B1 (en) 2011-05-27 2015-03-31 Scientific Components Corporation Circuit system in a package
JP6136061B2 (ja) * 2012-12-13 2017-05-31 株式会社村田製作所 半導体装置
US9865524B2 (en) * 2013-04-08 2018-01-09 STATS ChipPAC Pte. Ltd. Semiconductor device and method of forming conductive vias using backside via reveal and selective passivation
JP5569831B1 (ja) * 2013-05-15 2014-08-13 国立大学法人東北大学 マイクロ空室の内壁面処理方法
US10090239B2 (en) 2013-06-26 2018-10-02 Intel Corporation Metal-insulator-metal on-die capacitor with partial vias
JP6339669B2 (ja) 2013-07-08 2018-06-06 モーション・エンジン・インコーポレーテッド Ｍｅｍｓデバイスおよび製造する方法
US10273147B2 (en) 2013-07-08 2019-04-30 Motion Engine Inc. MEMS components and method of wafer-level manufacturing thereof
WO2015013827A1 (en) 2013-08-02 2015-02-05 Motion Engine Inc. Mems motion sensor for sub-resonance angular rate sensing
US20160276287A1 (en) * 2013-12-06 2016-09-22 Renesas Electronics Corporation Semiconductor device
JPWO2015083289A1 (ja) * 2013-12-06 2017-03-16 ルネサスエレクトロニクス株式会社 半導体装置
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JP2015153978A (ja) * 2014-02-18 2015-08-24 キヤノン株式会社 貫通配線の作製方法
US20170030788A1 (en) 2014-04-10 2017-02-02 Motion Engine Inc. Mems pressure sensor
US11674803B2 (en) 2014-06-02 2023-06-13 Motion Engine, Inc. Multi-mass MEMS motion sensor
US11287486B2 (en) 2014-12-09 2022-03-29 Motion Engine, Inc. 3D MEMS magnetometer and associated methods
US10407299B2 (en) 2015-01-15 2019-09-10 Motion Engine Inc. 3D MEMS device with hermetic cavity
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Also Published As

Publication number Publication date
JP2003133507A (ja) 2003-05-09
US20030080400A1 (en) 2003-05-01
US7176556B2 (en) 2007-02-13
US20070065981A1 (en) 2007-03-22
US7557014B2 (en) 2009-07-07

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