JP3776427B2 - 半導体装置及びその製造方法 - Google Patents
半導体装置及びその製造方法 Download PDFInfo
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Description
〔構造〕
図1は、本発明の第1実施形態に係る半導体装置1の上面透視図(上部の樹脂封止体を取り除いた図)であり、図2は、図1のA−Aにおける断面図である。半導体装置1は、例えば、半導体メモリ装置である。
図3から図7は、本実施形態に係る半導体装置1の製造方法を説明する断面図である。
本実施形態では、半導体チップ4及び半導体チップ5をダイパッド部200に積層して固定するとともに、半導体チップ5が半導体チップ4よりも外側にはみ出すはみ出し部分とリードフレーム2との間に支持部材300を介装した。これにより、はみ出し部の電極部(電極部57)に金属配線(配線部9)をボンディングする際に、ヒートコマ400からの熱が支持部材300を介してはみ出し部の電極に良好に伝達される。また、はみ出し部とリードフレーム2との間の空間に支持部材300が存在するため、キャピラリ401からの超音波が金属配線に良好に伝達される。この結果、はみ出し部の電極に金属配線を確実に接続することができる。
(2)第2実施形態
図8は、第2実施形態に係る半導体装置1の断面図である。図8において第1実施形態と同様の構成には同一符号を付し説明を省略する。第2実施形態に係る半導体装置1の平面図も第1実施形態に係る図1と同様である。本実施形態が第1実施形態と異なる点は、半導体チップ4と支持部材300とが一体に形成される点である。
支持部材300と半導体チップ4とを別々に形成する場合、支持部材300と半導体チップ4との膜厚がばらつくおそれがあり、半導体チップ4及び支持部材300の面41及び面301の間に段差が生じる場合がある。半導体チップ4及び支持部材300に段差がある場合に面41及び面301に半導体チップ5を固定すると、半導体チップ5がダイパッド部200及び半導体チップ4に対して傾いて固定されるおそれがある。半導体チップ5が傾いて配置されていると、半導体チップ5の電極(電極部57)に金属配線(配線部9)を圧着させる際に、キャピラリ401から金属配線に超音波が良好に伝達されず、金属配線と電極との接続が悪化する虞がある。
図12及び図13は、第3実施形態に係る半導体装置1の平面図及び断面図である。第1実施形態と同様の構成には同一の符号を付し、説明を省略する。
上記実施形態では、半導体チップ4及び5が同一の形状及び大きさを有する場合であったが、図15に示すように、下側の半導体チップ4aの短辺43a及び44aが上側の半導体チップ5の短辺53及び54よりも長い場合にも適用することができる。
2 リードフレーム
200 ダイパッド部
210,220 リード端子部
300 支持部材
400 ヒートコマ
401 キャピラリ
402 ヒートコマの突起部
4,5 半導体チップ
47,57 電極部
8,9 配線部
10 樹脂封止体
Claims (11)
- ダイパッド部と、
第1電極部が形成された表面と、前記ダイパッド部に固定された裏面とを有する第1半導体チップと、
第2電極部が形成された表面と、前記第1半導体チップの表面に固定された裏面とを有する第2半導体チップと、
前記第2半導体チップの裏面に固定された表面と、前記ダイパッド部に固定された裏面とを有する支持部材と、
前記第1及び第2電極部に電気的に接続されたリード端子部と、
前記ダイパッド部、前記第1及び第2半導体チップ、及び前記支持部材を封止した樹脂封止体とを備え、
前記支持部材は、前記ダイパッド部から前記リード端子部に亘って配置され、前記第2半導体チップは、前記支持部材上に固定されていることを特徴とする半導体装置。 - 前記第1半導体チップと前記第2半導体チップとは、同一機能を有する電気回路を有することを特徴とする、請求項1に記載の半導体装置。
- 前記第1半導体チップと前記第2半導体チップとは、同一形状及び大きさを有することを特徴とする、請求項1に記載の半導体装置。
- 前記支持部材は、前記第1半導体チップと別体で形成されていることを特徴とする、請求項1に記載の半導体装置。
- 前記支持部材は、前記第1半導体チップと一体に形成されていることを特徴とする、請求項1に記載の半導体装置。
- 前記第1半導体チップ及び前記支持部材は、半導体ウエハに形成された後に、一体の状態で分離されて形成されていることを特徴とする、請求項5に記載の半導体装置。
- 前記第1半導体チップの表面は互いに対向する第1及び第2の辺を有し、
前記第2半導体チップの表面は互いに対向する第3及び第4の辺を有し、
前記第2半導体チップの前記第4辺が前記第1半導体チップの前記第2辺から突出しており、前記第4辺が前記支持部材の上方に位置していることを特徴とする、請求項1に記載の半導体装置。 - ダイパッド部と、第1電極部が形成された表面と前記表面と対向する裏面とを有する第1半導体チップと、第2電極部が形成された表面と前記表面と対向する裏面とを有する第2半導体チップと、表面及び裏面を有する支持部材と、リード端子部と、樹脂封止体とを備える半導体装置を製造する方法であって、
前記支持部材が前記ダイパッド部から前記リード端子部に亘って配置されるように、前記第1半導体チップの裏面及び前記支持部材の裏面を前記ダイパッド部に固定するステップと、
前記第2半導体チップの裏面を前記第1半導体チップの表面及び前記支持部材の表面に固定するステップと、
前記第1及び第2電極部を前記リード端子部に電気的に接続するステップと、
前記ダイパッド部、前記第1及び第2半導体チップ、及び前記支持部材を樹脂で封止するステップと、を含む半導体装置の製造方法。 - 回路形成領域及び回路非形成領域を有する第1半導体ウエハを準備するステップと、
前記第1半導体ウエハの前記回路形成領域に電気回路を形成するステップと、
前記第1半導体ウエハの前記回路形成領域及び前記回路非形成領域をそれぞれ第1半導体チップ及び支持部材として一体の状態で分離するステップと、をさらに含む請求項8に記載の半導体装置の製造方法。 - 回路形成領域及び回路非形成領域を有する第2半導体ウエハを準備するステップと、
前記第2半導体ウエハの回路形成領域に電気回路を形成するステップと、
前記第2半導体ウエハの回路形成領域及び回路非形成領域を別々に分離し、回路形成領域を第2半導体チップとするステップと、をさらに含む請求項9に記載の半導体装置の製造方法。 - 前記第1及び第2電極部と前記リード端子部との接続では、前記第1及び第2電極部に金属配線を超音波振動によって接着することを特徴とする、請求項8に記載の半導体装置の製造方法。
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KR101668444B1 (ko) * | 2010-01-28 | 2016-10-21 | 삼성전자 주식회사 | 프레임 인터포저를 갖는 멀티 칩 패키지 |
KR101909203B1 (ko) | 2011-07-21 | 2018-10-17 | 삼성전자 주식회사 | 멀티-채널 패키지 및 그 패키지를 포함한 전자 시스템 |
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US8674494B2 (en) | 2011-08-31 | 2014-03-18 | Samsung Electronics Co., Ltd. | Semiconductor package having supporting plate and method of forming the same |
US9412720B2 (en) | 2011-08-31 | 2016-08-09 | Samsung Electronics Co., Ltd. | Semiconductor package having supporting plate and method of forming the same |
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US20050104166A1 (en) | 2005-05-19 |
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