JP3414935B2 - １ビット方式制御波形生成回路 - Google Patents

１ビット方式制御波形生成回路

Info

Publication number
JP3414935B2
JP3414935B2 JP14956696A JP14956696A JP3414935B2 JP 3414935 B2 JP3414935 B2 JP 3414935B2 JP 14956696 A JP14956696 A JP 14956696A JP 14956696 A JP14956696 A JP 14956696A JP 3414935 B2 JP3414935 B2 JP 3414935B2
Authority
JP
Japan
Prior art keywords
output
bit
clock
data
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP14956696A
Other languages
English (en)
Japanese (ja)
Other versions
JPH09330070A (ja
Inventor
雄史 中條
Original Assignee
エヌイーシー三菱電機ビジュアルシステムズ株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by エヌイーシー三菱電機ビジュアルシステムズ株式会社 filed Critical エヌイーシー三菱電機ビジュアルシステムズ株式会社
Priority to JP14956696A priority Critical patent/JP3414935B2/ja
Priority to US08/726,603 priority patent/US5742247A/en
Priority to DE19646704A priority patent/DE19646704C2/de
Publication of JPH09330070A publication Critical patent/JPH09330070A/ja
Application granted granted Critical
Publication of JP3414935B2 publication Critical patent/JP3414935B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G1/00—Control arrangements or circuits, of interest only in connection with cathode-ray tube indicators; General aspects or details, e.g. selection emphasis on particular characters, dashed line or dotted line generation; Preprocessing of data
    • G09G1/04—Deflection circuits ; Constructional details not otherwise provided for

Landscapes

  • Engineering & Computer Science (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Remote Sensing (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Controls And Circuits For Display Device (AREA)
  • Analogue/Digital Conversion (AREA)
  • Picture Signal Circuits (AREA)
JP14956696A 1996-06-11 1996-06-11 １ビット方式制御波形生成回路 Expired - Fee Related JP3414935B2 (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP14956696A JP3414935B2 (ja) 1996-06-11 1996-06-11 １ビット方式制御波形生成回路
US08/726,603 US5742247A (en) 1996-06-11 1996-10-07 One bit type control waveform generation circuit
DE19646704A DE19646704C2 (de) 1996-06-11 1996-11-12 Steuersignalform-Erzeugungsschaltung der Einbitart

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14956696A JP3414935B2 (ja) 1996-06-11 1996-06-11 １ビット方式制御波形生成回路

Publications (2)

Publication Number Publication Date
JPH09330070A JPH09330070A (ja) 1997-12-22
JP3414935B2 true JP3414935B2 (ja) 2003-06-09

Family

ID=15477991

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14956696A Expired - Fee Related JP3414935B2 (ja) 1996-06-11 1996-06-11 １ビット方式制御波形生成回路

Country Status (3)

Country Link
US (1) US5742247A (de)
JP (1) JP3414935B2 (de)
DE (1) DE19646704C2 (de)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3073486B2 (ja) * 1998-02-16 2000-08-07 キヤノン株式会社 画像形成装置及び電子線装置及び変調回路及び画像形成装置の駆動方法
CA2279680C (en) * 1999-08-05 2002-11-26 Vtech Communications, Ltd. Binary waveform shaping apparatus
US7069042B2 (en) * 2002-11-01 2006-06-27 Intel Corporation Quadrature direct synthesis discrete time multi-tone generator
US8988048B2 (en) * 2009-04-28 2015-03-24 Semiconductor Components Industries, Llc Circuit for generating a clock signal for interleaved PFC stages and method thereof

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59197867A (ja) * 1983-04-26 1984-11-09 Shin Kobe Electric Mach Co Ltd オシロスコ−プ
DD257564A3 (de) * 1986-01-20 1988-06-22 Karl Marx Stadt Tech Hochschul Digitales verfahren und anordnung zur erzeugung treppenfoermiger auslenksignale

Also Published As

Publication number Publication date
US5742247A (en) 1998-04-21
DE19646704C2 (de) 1999-01-14
JPH09330070A (ja) 1997-12-22
DE19646704A1 (de) 1997-12-18

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