JP3394562B2 - Ｍｏｓｆｅｔ製造方法 - Google Patents

Ｍｏｓｆｅｔ製造方法

Info

Publication number
JP3394562B2
JP3394562B2 JP16333193A JP16333193A JP3394562B2 JP 3394562 B2 JP3394562 B2 JP 3394562B2 JP 16333193 A JP16333193 A JP 16333193A JP 16333193 A JP16333193 A JP 16333193A JP 3394562 B2 JP3394562 B2 JP 3394562B2
Authority
JP
Japan
Prior art keywords
gate
film
forming
concentration
conductivity type
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP16333193A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0653231A (ja
Inventor
ゾン・ソク・グ
Original Assignee
エルジイ・セミコン・カンパニイ・リミテッド
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by エルジイ・セミコン・カンパニイ・リミテッド filed Critical エルジイ・セミコン・カンパニイ・リミテッド
Publication of JPH0653231A publication Critical patent/JPH0653231A/ja
Application granted granted Critical
Publication of JP3394562B2 publication Critical patent/JP3394562B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0223—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate
    • H10D30/0227—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate having both lightly-doped source and drain extensions and source and drain regions self-aligned to the sides of the gate, e.g. lightly-doped drain [LDD] MOSFET or double-diffused drain [DDD] MOSFET
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/022—Manufacture or treatment of FETs having insulated gates [IGFET] having lightly-doped source or drain extensions selectively formed at the sides of the gates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/17—Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
    • H10D62/351—Substrate regions of field-effect devices
    • H10D62/357—Substrate regions of field-effect devices of FETs
    • H10D62/364—Substrate regions of field-effect devices of FETs of IGFETs
    • H10D62/371—Inactive supplementary semiconductor regions, e.g. for preventing punch-through, improving capacity effect or leakage current
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/021—Manufacture or treatment using multiple gate spacer layers, e.g. bilayered sidewall spacers

Landscapes

  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
JP16333193A 1992-06-12 1993-06-08 Ｍｏｓｆｅｔ製造方法 Expired - Fee Related JP3394562B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR10235/1992 1992-06-12
KR1019920010235A KR950002196B1 (ko) 1992-06-12 1992-06-12 반도체 소자의 ldd 제조방법

Publications (2)

Publication Number Publication Date
JPH0653231A JPH0653231A (ja) 1994-02-25
JP3394562B2 true JP3394562B2 (ja) 2003-04-07

Family

ID=19334606

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16333193A Expired - Fee Related JP3394562B2 (ja) 1992-06-12 1993-06-08 Ｍｏｓｆｅｔ製造方法

Country Status (4)

Country Link
JP (1) JP3394562B2 (OSRAM)
KR (1) KR950002196B1 (OSRAM)
DE (1) DE4318866C2 (OSRAM)
TW (1) TW234773B (OSRAM)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5444002A (en) * 1993-12-22 1995-08-22 United Microelectronics Corp. Method of fabricating a short-channel DMOS transistor with removable sidewall spacers
EP2073391B1 (en) 2007-12-21 2011-06-08 Fujitsu Ten Limited Method of operating a radio tuner, for detecting and responding to effects of tunnel situations on radio reception by an in-vehicle radio receiver

Also Published As

Publication number Publication date
KR940001460A (ko) 1994-01-11
TW234773B (OSRAM) 1994-11-21
DE4318866A1 (de) 1993-12-16
JPH0653231A (ja) 1994-02-25
DE4318866C2 (de) 1997-01-23
KR950002196B1 (ko) 1995-03-14

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