JP2727352B2 - リード付き半導体素子の製造方法 - Google Patents

リード付き半導体素子の製造方法

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Publication number
JP2727352B2
JP2727352B2 JP1096950A JP9695089A JP2727352B2 JP 2727352 B2 JP2727352 B2 JP 2727352B2 JP 1096950 A JP1096950 A JP 1096950A JP 9695089 A JP9695089 A JP 9695089A JP 2727352 B2 JP2727352 B2 JP 2727352B2
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Japan
Prior art keywords
wire
tool
semiconductor element
electrode
semiconductor device
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Expired - Fee Related
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JP1096950A
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English (en)
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JPH02273944A (ja
Inventor
信人 山崎
明浩 西村
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Shinkawa Ltd
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Shinkawa Ltd
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Priority to JP1096950A priority Critical patent/JP2727352B2/ja
Priority to US07/510,035 priority patent/US5056217A/en
Publication of JPH02273944A publication Critical patent/JPH02273944A/ja
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Publication of JP2727352B2 publication Critical patent/JP2727352B2/ja
Anticipated expiration legal-status Critical
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Description

【発明の詳細な説明】 [産業上の利用分野] 本発明はリード付き半導体素子の製造方法に関する。
[従来の技術] 従来、リード付き半導体素子は、第3図の方法によっ
て製造される。同図(a)に示すように、タブテープ1
に形成されたリード2を半導体素子3の電極4に接合し
た後、同図(b)に示すようにリード2をフオーミング
及び切断してタブテープ1より分離する。これにより、
リード付き半導体素子5が得られる。
なお、第3図(a)に示すようにタブテープ1に設け
られたリード2を半導体素子3に接合する方法として
は、例えば特開昭46−2109号公報、特開昭59−110128号
公報が知られている。
[発明が解決しようとする課題] 上記従来技術は、タブテープ1に予めリード2を形成
しておく必要があり、タブテープ1は無駄なものとな
り、材料的にコスト高となる。またタブテープ1へのリ
ード形成工程、フオーミング及び切断工程が必要であ
り、多くの工程を経て製造され、また設備費用がかかる
こと等により、この点からもコスト高になる。
本発明の目的は、大幅なコスト低減が図れるリード付
き半導体素子の製造方法を提供することにある。
[課題を解決するための手段] 上記目的は、半導体素子を基台に位置決め保持し、ツ
ールの下面に延在したワイヤを該ツールで前記電極に押
圧して接合し、その後ワイヤの繰り出し動作を伴なって
ツールを前記基台のワイヤ切断部上に移動させてワイヤ
を該ワイヤ切断部に押し付け、その後ワイヤを切断する
ことにより、半導体素子の電極にワイヤよりなるリード
を形成することにより達成される。
[作用] 上記手段によれば、ワイヤ(リード)自体がツールに
よって半導体素子の電極に接合される。このため、従来
のようにリードを予めタブテープに形成する必要がな
く、またフオーミング及び切断工程も必要ない。
[実施例] 以下、本発明の一実施例を第1図及び第2図により説
明する。半導体素子3を位置決め保持する基台6には、
半導体素子3を吸着保持する真空吸着穴6aとワイヤ切断
部6bとが形成されている。図示しないスプールに巻回さ
れたワイヤ7の先端は、図示しないワイヤガイド及びク
ランパ8を通ってツール9の下面下方に一定量延在して
いる。前記ワイヤ7は断面が長方形又は正方形のリボン
状となっている。そこで、第1図(a)に示す状態より
ツール9が半導体素子3の電極4の上方より下降し、同
図(b)に示すようにワイヤ7を電極4に押圧して接合
する。
次に同図(c)に示すようにクランパ8が開き、ツー
ル9が上昇すると共にワイヤ7が繰り出される。そし
て、ツール9は同図(d)(e)の動作を伴なって基台
6のワイヤ切断部6b上に下降し、ワイヤ7をワイヤ切断
部6bに押し付ける。この状態でクランパ8が閉じ、同図
(f)に示すようにクランパ8を斜め上方に上昇させる
と、ワイヤ7は引っ張られてツール9の根元部より切断
される。次に同図(g)に示すように、ツール9は上昇
し、またクランパ8は開、上昇、閉、下降の動作を行っ
てワイヤ7の先端はツール9の下面下方に延在される。
このようにワイヤ7が切断されてツール9が上昇する
と、半導体素子3に接続されたワイヤ7の端部はフリー
となるので、このワイヤ7の端部は該ワイヤ7のスプリ
ングバックによって若干上昇する。その後、ツール9、
ワイヤ7及びクランパ8はこの状態を保って同図(a)
に示すように次に接合する電極4上の上方に位置させら
れる。
半導体素子3の一辺に形成された電極4については前
記一連の動作を順次繰り返してワイヤ7を接合する。例
えば、第2図に示す一辺の電極群4aへのワイヤ7の接合
が終了すると、次に他の辺の電極群4bにワイヤ7を接合
するために、ツール9が電極群4bに合うようにツール9
又は基台6が90゜回転させられる。その後は前記した動
作によって電極群4bに順次ワイヤ7が接合される。電極
群4bへのワイヤ接合が終了すると、電極群4c、4dへも同
様にワイヤ7が接合される。
これにより、第2図に示すように全ての電極4にワイ
ヤ7が接合される。その後、基台6の真空を切り、半導
体素子3を取り出すと、第3図(b)に示すリード付き
半導体素子5とほぼ同じ形態のリード付き半導体素子が
得られる。
このように、無駄な材料を用いる必要がなく、また工
程もワイヤボンデイング方法で行えるので、工数的及び
設備的にも優れており、大幅なコストダウンが図れる。
なお、本実施例の場合は、基台6のワイヤ切断部6bの
高さHを変えること及びツール9の移動軌跡を変更する
ことにより、半導体素子3に接続されたワイヤ7のフオ
ーミングは様々な形に変更することができる。ところ
で、半導体素子3に接続されたワイヤ7は、切断後にそ
のスプリングバックによって該ワイヤ7の端部が若干上
昇するので、基台6のワイヤ切断部6bの高さはそのスプ
リングバック量を見込んで設定するのが好ましい。
またワイヤ7は導電性のものであればその材質は限定
されないが、例えばAu線又はAuメツキしたものを使用す
ると、ツール9の押圧部或は後工程でこのワイヤ7を押
圧する別のツールの押圧面に加熱、加圧時に伴なう酸化
物等の汚れを防止することができる。
またワイヤ7は断面が長方形又は正方形のものに限定
されないが、信号伝達時間の速い半導体素子3では、イ
ンダクタンスによる信号減を伴なうため、丸型のものよ
り長方形又は正方形の方が優れている。
また本実施例は、ツール9としてウエツジを使用した
場合について説明したが、キヤピラリを使用してもよ
い。
[発明の効果] 以上の説明から明らかなように、本発明によれば、半
導体素子を基台に位置決め保持し、ツールの下面に延在
したワイヤを該ツールで前記電極に押圧して接合し、そ
の後ワイヤの繰り出し動作を伴なってツールを前記基台
のワイヤ切断部上に移動させてワイヤを該ワイヤ切断部
に押し付け、その後ワイヤを切断することにより、半導
体素子の電極にワイヤよりなるリードを形成するので、
大幅なコスト低減が図れる。
【図面の簡単な説明】
第1図(a)乃至(g)は本発明の一実施例を示す動作
説明図、第2図は第1図の方法によって得られたリード
付き半導体素子を示し、(a)は平面図、(b)は断面
図、第3図(a)(b)は従来の方法を示す説明図であ
る。 2:リード、3:半導体素子、 4:電極、6:基台、 6b:ワイヤ切断部、7:ワイヤ、 9:ツール。
───────────────────────────────────────────────────── フロントページの続き (56)参考文献 特開 昭54−100256(JP,A) 特開 昭54−49066(JP,A)

Claims (2)

    (57)【特許請求の範囲】
  1. 【請求項1】半導体素子の電極にリードを接合する方法
    において、半導体素子を基台に位置決め保持し、ツール
    の下面に延在したワイヤを該ツールで前記電極に押圧し
    て接合し、その後ワイヤの繰り出し動作を伴なってツー
    ルを前記基台のワイヤ切断部上に移動させてワイヤを該
    ワイヤ切断部に押し付け、その後ワイヤを切断すること
    により、半導体素子の電極にワイヤよりなるリードを形
    成することを特徴とするリード付き半導体素子の製造方
    法。
  2. 【請求項2】前記ワイヤは、断面が長方形又は正方形よ
    りなることを特徴とする請求項1記載のリード付き半導
    体素子の製造方法。
JP1096950A 1989-04-17 1989-04-17 リード付き半導体素子の製造方法 Expired - Fee Related JP2727352B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP1096950A JP2727352B2 (ja) 1989-04-17 1989-04-17 リード付き半導体素子の製造方法
US07/510,035 US5056217A (en) 1989-04-17 1990-04-16 Method for manufacturing semiconductor elements equipped with leads

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1096950A JP2727352B2 (ja) 1989-04-17 1989-04-17 リード付き半導体素子の製造方法

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JPH02273944A JPH02273944A (ja) 1990-11-08
JP2727352B2 true JP2727352B2 (ja) 1998-03-11

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Publication number Priority date Publication date Assignee Title
US5152056A (en) * 1991-08-27 1992-10-06 Sun Microsystems, Inc. Method for replacing tape automated bonding components on a printed circuit board
JP2558976B2 (ja) * 1991-11-08 1996-11-27 松下電器産業株式会社 電子部品の電極とリードとの接合方法
US5216803A (en) * 1991-12-11 1993-06-08 Microelectronics And Computer Technology Corporation Method and apparatus for removing bonded connections
KR960011257B1 (ko) * 1993-05-14 1996-08-21 삼성전자 주식회사 번인 소켓 및 이를 사용한 번인 테스트 방법
US5398863A (en) * 1993-07-23 1995-03-21 Tessera, Inc. Shaped lead structure and method
US5735030A (en) * 1996-06-04 1998-04-07 Texas Instruments Incorporated Low loop wire bonding
US6109508A (en) * 1998-03-11 2000-08-29 Texas Instruments Incorporated Fine pitch bonding method using rectangular wire and capillary bore
JP3377748B2 (ja) * 1998-06-25 2003-02-17 株式会社新川 ワイヤボンディング方法

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Publication number Priority date Publication date Assignee Title
US3430835A (en) * 1966-06-07 1969-03-04 Westinghouse Electric Corp Wire bonding apparatus for microelectronic components
DE1912315B1 (de) * 1969-03-11 1970-10-08 Kupex Ag Beregnungsvorrichtung
US3673681A (en) * 1969-04-01 1972-07-04 Inforex Electrical circuit board wiring
DE2528806C2 (de) * 1975-06-27 1983-09-15 Texas Instruments Deutschland Gmbh, 8050 Freising Schweißvorrichtung
DE2608250C3 (de) * 1976-02-28 1985-06-05 Telefunken electronic GmbH, 7100 Heilbronn Verfahren zum Thermokompressions-Verbinden von auf Halbleiterkörpern befindlichen Metall-Anschlußkontakten mit zugeordneten Gehäuseanschlußteilen und Vorrichtung zur Durchführung des Verfahrens
JPS5449066A (en) * 1977-09-27 1979-04-18 Nec Corp Semiconductor device
JPS54100256A (en) * 1978-01-24 1979-08-07 Cho Onpa Kogyo Co Device for cutting wire
JPS63256267A (ja) * 1987-04-10 1988-10-24 Mitsubishi Electric Corp 半田付け方法

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US5056217A (en) 1991-10-15
JPH02273944A (ja) 1990-11-08

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