JPH02273944A - リード付き半導体素子の製造方法 - Google Patents

リード付き半導体素子の製造方法

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Publication number
JPH02273944A
JPH02273944A JP1096950A JP9695089A JPH02273944A JP H02273944 A JPH02273944 A JP H02273944A JP 1096950 A JP1096950 A JP 1096950A JP 9695089 A JP9695089 A JP 9695089A JP H02273944 A JPH02273944 A JP H02273944A
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Japan
Prior art keywords
wire
tool
semiconductor element
electrode
cutting part
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Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1096950A
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English (en)
Other versions
JP2727352B2 (ja
Inventor
Nobuhito Yamazaki
山崎 信人
Akihiro Nishimura
明浩 西村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shinkawa Ltd
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Shinkawa Ltd
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Priority to JP1096950A priority Critical patent/JP2727352B2/ja
Priority to US07/510,035 priority patent/US5056217A/en
Publication of JPH02273944A publication Critical patent/JPH02273944A/ja
Application granted granted Critical
Publication of JP2727352B2 publication Critical patent/JP2727352B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【発明の詳細な説明】 [産業上の利用分野] 本発明はリード付き半導体素子の製造方法に関する。
[従来の技術] 従来、リード付き半導体素子は、第3図の方法によって
製造される。同図(a)に示すように、タブテープ1に
形成されたり−ド2を半導体素子3の電極4に接合した
後、同図(b)に示すようにリード2をフォーミング及
び切断してタブテープ1より分離する。これにより、リ
ード付き半導体素子5が得られる。
なお、第3図(a)に示すようにタブテープlに設けら
れたり−ド2を半導体素子3に接合する方法としては、
例えば特開昭46−2109号公報、特開昭59−11
0128号公報が知られている。
[発明が解決しようとする課題] 上記従来技術は、タブテープ1に予めリード2を形成し
ておく必要があり、タブテープlは無駄なものとなり、
材料的にコスト高となる。またタブテープ1へのリード
形成工程、フォーミング及び切断工程が必要であり、多
くの工程を経て製造され、また設備費用がかかること等
により、この点からもコスト高になる。
本発明の目的は、大幅なコスト低減が図れるリード付き
半導体素子の製造方法を提供することにある。
[課題を解決するための手段] 上記目的は、半導体素子を基台に位置決め保持し、ツー
ルの下面に延在したワイヤを該ツールで前記電極に押圧
して接合し、その後ワイヤの繰り出し動作を伴なってツ
ールを前記基台のワイヤ切断部上に移動させてワイヤを
該ワイヤ切断部に押し付け、その後ワイヤを切断するこ
とにより、半導体素子の電極にワイヤよりなるリードを
形成することにより達成される。
[作用] 上記手段によれば、ワイヤ(リード)自体がツールによ
って半導体素子の電極に接合される。このため、従来の
ようにリードを予めタブテープに形成する必要がなく、
またフォーミング及び切断工程も必要ない。
[実施例] 以下、本発明の一実施例を第1図及び第2図により説明
する。半導体素子3を位置決め保持する基台6には、半
導体素子3を吸着保持する真空吸着穴6aとワイヤ切断
部6bとが形成されている0図示しないスプールに巻回
されたワイヤ7の先端は、図示しないワイヤガイド及び
クランパ8を通ってツール9の下面下方に一定量延在し
ている。前記ワイヤ7は断面が長方形又は正方形のリボ
ン状となっている。そこで、第1図(a)に示す状態よ
りツール9が半導体素子3の電極4の上方より下降し、
同図(b)に示すようにワイヤ7を電極4に押圧して接
合する。
次に同図(C)に示すようにクランパ8が開き、ツール
9が上昇すると共にワイヤ7が繰り出される。そして、
ツール9は同図(d)(e)の動作を伴なって基台6の
ワイヤ切断部6b上に下降し、ワイヤ7をワイヤ切断部
6bに押し付ける。この状態でクランパ8が閉じ、同図
(f)に示すようにクランパ8を斜め上方に上昇させる
と、ワイヤ7は引っ張られてツール9の根元部より切断
される0次に同図(g)に示すように、ツール9は上昇
し、またクランパ8は開、上昇、閉、下降の動作を行っ
てワイヤ7の先端はツール9の下面下方に延在される。
その後、ツール9゜ワイヤ7及びクランパ8はこの状態
を保って同図(L)に示すように次に接合する電極4上
の上方に位置させられる。
半導体素子3の一辺に形成された電極4については前記
一連の動作を順次繰り返してワイヤ7を接合する0例え
ば、第2図に示す一辺の電極群4aへのワイヤ7の接合
が終了すると、次に他の辺の電極群4bにワイヤ7を接
合するために、ツール9が電極群4bに合うようにツー
ル9又は基台6が90”回転させられる。その後は前記
した動作によって電極群4bに順次ワイヤ7が接合され
る。電極群4bへのワイヤ接合が終了すると、電極群4
C14dへも同様にワイヤ7が接合される。
これにより、s2図に示すように全ての電極4にワイヤ
7が接合される。その後、基台6の真空を切り、半導体
素子3を取り出すと、第3図(b)に示すリード付き半
導体素子5とほぼ同じ形態のリード付き半導体素子が得
られる。
このように、無駄な材料を用いる必要がなく、また工程
もワイヤボンディング方法で行えるので、工数的及び設
備的にも優れており、大幅なコストダラシが図れる。
なお、本実施例の場合は、基台6のワイヤ切断部6bの
高さHを変えること及びツール9の移動軌跡を変更する
ことにより、半導体素子3に接続されたワイヤ7のフォ
ーミングは様々な形に変更することができる。ところで
、半導体素子3に接続されたワイヤ7は、切断後にその
スプリングバックによって該ワイヤ7の端部が若干上昇
するので、基台6のワイヤ切断部6bの高さはそのスプ
リングバック量を見込んで設定するのが好ましい。
またワイヤ7は導電性のものであればその材質は限定さ
れないが、例えばAu線又はAuメツキしたものを使用
すると、ツール9の押圧部或は後工程でこのワイヤ7を
押圧する別のツールの押圧面に加熱、加圧時に伴なう酸
化物等の汚れを防止することができる。
またワイヤ7は断面が長方形又は正方形のものに限定さ
れないが、信号伝達時間の速い半導体素子3では、イン
ダクタンスによる信号域を伴なうため、大型のものより
長方形又は正方形の方が優れている。
また本実施例は、ツール9としてウェッジを使用した場
合について説明したが、キャピラリを使用してもよい。
[発明の効果] 以上の説明から明らかなように1本発明によれば、半導
体素子を基台に位置決め保持し、ツールの下面に延在し
たワイヤを該ツールで前記電極に押圧して接合し、その
後ワイヤの繰り出し動作を伴なってツールを前記基台の
ワイヤ切断部上に移動させてワイヤを該ワイヤ切断部に
押し付け、その後ワイヤを切断することにより、半導体
素子の電極にワイヤよりなるリードを形成するので、大
幅なコスト低減が図れる。
【図面の簡単な説明】
第1図(a)乃至(g)は本発明の一実施例を示す動作
説明図、第2図は第1図の方法によって得られたリード
付き半導体素子を示し、(a)は平面図、(b)は断面
図、第3図(a)(b)は従来の方法を示す説明図であ
る。 2:リード、      3:半導体素子、4:電極、
      6:基台、 6b=ワイヤ切断部、  7:ワイヤ、9:ツール。 第1図 (b) (C) 第2図 (d) (e) (f) 4・ミル 6二基台 3:手噂体!、キ

Claims (2)

    【特許請求の範囲】
  1. (1)半導体素子の電極にリードを接合する方法におい
    て、半導体素子を基台に位置決め保持し、ツールの下面
    に延在したワイヤを該ツールで前記電極に押圧して接合
    し、その後ワイヤの繰り出し動作を伴なってツールを前
    記基台のワイヤ切断部上に移動させてワイヤを該ワイヤ
    切断部に押し付け、その後ワイヤを切断することにより
    、半導体素子の電極にワイヤよりなるリードを形成する
    ことを特徴とするリード付き半導体素子の製造方法。
  2. (2)前記ワイヤは、断面が長方形又は正方形よりなる
    ことを特徴とする請求項1記載のリード付き半導体素子
    の製造方法。
JP1096950A 1989-04-17 1989-04-17 リード付き半導体素子の製造方法 Expired - Fee Related JP2727352B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP1096950A JP2727352B2 (ja) 1989-04-17 1989-04-17 リード付き半導体素子の製造方法
US07/510,035 US5056217A (en) 1989-04-17 1990-04-16 Method for manufacturing semiconductor elements equipped with leads

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1096950A JP2727352B2 (ja) 1989-04-17 1989-04-17 リード付き半導体素子の製造方法

Publications (2)

Publication Number Publication Date
JPH02273944A true JPH02273944A (ja) 1990-11-08
JP2727352B2 JP2727352B2 (ja) 1998-03-11

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Country Status (2)

Country Link
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Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5152056A (en) * 1991-08-27 1992-10-06 Sun Microsystems, Inc. Method for replacing tape automated bonding components on a printed circuit board
JP2558976B2 (ja) * 1991-11-08 1996-11-27 松下電器産業株式会社 電子部品の電極とリードとの接合方法
US5216803A (en) * 1991-12-11 1993-06-08 Microelectronics And Computer Technology Corporation Method and apparatus for removing bonded connections
KR960011257B1 (ko) * 1993-05-14 1996-08-21 삼성전자 주식회사 번인 소켓 및 이를 사용한 번인 테스트 방법
US5398863A (en) * 1993-07-23 1995-03-21 Tessera, Inc. Shaped lead structure and method
US5735030A (en) * 1996-06-04 1998-04-07 Texas Instruments Incorporated Low loop wire bonding
US6109508A (en) * 1998-03-11 2000-08-29 Texas Instruments Incorporated Fine pitch bonding method using rectangular wire and capillary bore
JP3377748B2 (ja) * 1998-06-25 2003-02-17 株式会社新川 ワイヤボンディング方法

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JPS5449066A (en) * 1977-09-27 1979-04-18 Nec Corp Semiconductor device
JPS54100256A (en) * 1978-01-24 1979-08-07 Cho Onpa Kogyo Co Device for cutting wire

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US3430835A (en) * 1966-06-07 1969-03-04 Westinghouse Electric Corp Wire bonding apparatus for microelectronic components
DE1912315B1 (de) * 1969-03-11 1970-10-08 Kupex Ag Beregnungsvorrichtung
US3673681A (en) * 1969-04-01 1972-07-04 Inforex Electrical circuit board wiring
DE2528806C2 (de) * 1975-06-27 1983-09-15 Texas Instruments Deutschland Gmbh, 8050 Freising Schweißvorrichtung
DE2608250C3 (de) * 1976-02-28 1985-06-05 Telefunken electronic GmbH, 7100 Heilbronn Verfahren zum Thermokompressions-Verbinden von auf Halbleiterkörpern befindlichen Metall-Anschlußkontakten mit zugeordneten Gehäuseanschlußteilen und Vorrichtung zur Durchführung des Verfahrens
JPS63256267A (ja) * 1987-04-10 1988-10-24 Mitsubishi Electric Corp 半田付け方法

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JPS5449066A (en) * 1977-09-27 1979-04-18 Nec Corp Semiconductor device
JPS54100256A (en) * 1978-01-24 1979-08-07 Cho Onpa Kogyo Co Device for cutting wire

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US5056217A (en) 1991-10-15
JP2727352B2 (ja) 1998-03-11

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