JP2024512805A - 集積回路アセンブリ埋め込み用に使用されるアセンブリ並びにその用途及び製造方法 - Google Patents

集積回路アセンブリ埋め込み用に使用されるアセンブリ並びにその用途及び製造方法 Download PDF

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JP2024512805A
JP2024512805A JP2023561117A JP2023561117A JP2024512805A JP 2024512805 A JP2024512805 A JP 2024512805A JP 2023561117 A JP2023561117 A JP 2023561117A JP 2023561117 A JP2023561117 A JP 2023561117A JP 2024512805 A JP2024512805 A JP 2024512805A
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Prior art keywords
components
amalgam
release layer
assembly
layer
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Pending
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JP2023561117A
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English (en)
Japanese (ja)
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JP2024512805A5 (cg-RX-API-DMAC7.html
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シーツ，ジェイナ
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テレサーキッツ コーポレーション
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Publication of JP2024512805A publication Critical patent/JP2024512805A/ja
Publication of JP2024512805A5 publication Critical patent/JP2024512805A5/ja
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/01—Manufacture or treatment
    • H10W74/019—Manufacture or treatment using temporary auxiliary substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/66—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials
    • H10P14/662—Laminate layers, e.g. stacks of alternating high-k metal oxides
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/0198—Manufacture or treatment batch processes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/01—Manufacture or treatment
    • H10W74/016—Manufacture or treatment using moulds
    • H10W74/017—Auxiliary layers for moulds, e.g. release layers or layers preventing residue
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/111—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
    • H10W74/121—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed by multiple encapsulations, e.g. by a thin protective coating and a thick encapsulation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/131—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being only partially enclosed
    • H10W74/147—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being only partially enclosed the encapsulations being multilayered
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/40—Encapsulations, e.g. protective coatings characterised by their materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/10—Configurations of laterally-adjacent chips

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  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Powder Metallurgy (AREA)
JP2023561117A 2021-04-01 2022-03-30 集積回路アセンブリ埋め込み用に使用されるアセンブリ並びにその用途及び製造方法 Pending JP2024512805A (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US202163169658P 2021-04-01 2021-04-01
US63/169,658 2021-04-01
PCT/US2022/022532 WO2022212492A2 (en) 2021-04-01 2022-03-30 Assemblies used for embedding integrated circuit assemblies, and their uses and method of fabrication thereof

Publications (2)

Publication Number Publication Date
JP2024512805A true JP2024512805A (ja) 2024-03-19
JP2024512805A5 JP2024512805A5 (cg-RX-API-DMAC7.html) 2025-04-07

Family

ID=81585417

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2023561117A Pending JP2024512805A (ja) 2021-04-01 2022-03-30 集積回路アセンブリ埋め込み用に使用されるアセンブリ並びにその用途及び製造方法

Country Status (7)

Country Link
US (1) US20220319829A1 (cg-RX-API-DMAC7.html)
EP (1) EP4315414A2 (cg-RX-API-DMAC7.html)
JP (1) JP2024512805A (cg-RX-API-DMAC7.html)
KR (1) KR20230164117A (cg-RX-API-DMAC7.html)
CN (1) CN117242568A (cg-RX-API-DMAC7.html)
TW (1) TW202249543A (cg-RX-API-DMAC7.html)
WO (1) WO2022212492A2 (cg-RX-API-DMAC7.html)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US12596306B2 (en) * 2021-11-11 2026-04-07 Terecircuits Corporation Photochemical and thermal release layer processes and uses in device manufacturing
US12611840B1 (en) * 2022-09-14 2026-04-28 Apple Inc. Electronic devices with modified covers

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070134849A1 (en) * 2005-11-23 2007-06-14 Jan Vanfleteren Method for embedding dies
US20180130760A1 (en) * 2016-11-07 2018-05-10 Industrial Technology Research Institute Chip package and chip packaging method

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5053195A (en) 1989-07-19 1991-10-01 Microelectronics And Computer Technology Corp. Bonding amalgam and method of making
US6132676A (en) 1997-06-30 2000-10-17 Massachusetts Institute Of Technology Minimal thermal expansion, high thermal conductivity metal-ceramic matrix composite
US6358567B2 (en) 1998-12-23 2002-03-19 The Regents Of The University Of California Colloidal spray method for low cost thin coating deposition
US7141348B2 (en) 2003-05-23 2006-11-28 Intelleflex Corporation Lamination and delamination technique for thin film processing
US6946178B2 (en) 2003-05-23 2005-09-20 James Sheats Lamination and delamination technique for thin film processing
US7300824B2 (en) 2005-08-18 2007-11-27 James Sheats Method of packaging and interconnection of integrated circuits
US20100078496A1 (en) 2008-09-29 2010-04-01 Sono-Tek Corporation Methods and systems for ultrasonic spray shaping
US8922021B2 (en) 2011-12-30 2014-12-30 Deca Technologies Inc. Die up fully molded fan-out wafer level packaging
US9455160B2 (en) * 2013-01-14 2016-09-27 Infineon Technologies Ag Method for fabricating a semiconductor chip panel
US11024608B2 (en) * 2017-03-28 2021-06-01 X Display Company Technology Limited Structures and methods for electrical connection of micro-devices and substrates
TWI734175B (zh) * 2019-08-21 2021-07-21 矽品精密工業股份有限公司 電子封裝件及其製法與電子封裝模組

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070134849A1 (en) * 2005-11-23 2007-06-14 Jan Vanfleteren Method for embedding dies
US20180130760A1 (en) * 2016-11-07 2018-05-10 Industrial Technology Research Institute Chip package and chip packaging method

Also Published As

Publication number Publication date
WO2022212492A3 (en) 2022-11-10
TW202249543A (zh) 2022-12-16
CN117242568A (zh) 2023-12-15
WO2022212492A2 (en) 2022-10-06
EP4315414A2 (en) 2024-02-07
US20220319829A1 (en) 2022-10-06
KR20230164117A (ko) 2023-12-01

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