JP2022045072A - 半導体装置 - Google Patents

半導体装置 Download PDF

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Publication number
JP2022045072A
JP2022045072A JP2020150569A JP2020150569A JP2022045072A JP 2022045072 A JP2022045072 A JP 2022045072A JP 2020150569 A JP2020150569 A JP 2020150569A JP 2020150569 A JP2020150569 A JP 2020150569A JP 2022045072 A JP2022045072 A JP 2022045072A
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JP
Japan
Prior art keywords
porous body
connector
semiconductor device
semiconductor element
base frame
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Pending
Application number
JP2020150569A
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English (en)
Inventor
譽寧 蔡
Yu-Ning Tsai
英敏 倉谷
Hidetoshi Kuratani
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Toshiba Electronic Devices and Storage Corp
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Toshiba Corp
Toshiba Electronic Devices and Storage Corp
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Application filed by Toshiba Corp, Toshiba Electronic Devices and Storage Corp filed Critical Toshiba Corp
Priority to JP2020150569A priority Critical patent/JP2022045072A/ja
Priority to CN202110861495.7A priority patent/CN114156250A/zh
Priority to US17/468,595 priority patent/US11776884B2/en
Publication of JP2022045072A publication Critical patent/JP2022045072A/ja
Pending legal-status Critical Current

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Abstract

Figure 2022045072000001
【課題】信頼性の高い半導体装置を提供する。
【解決手段】実施形態の半導体装置は、ベースフレームと、ベースフレームの上に設けられた半導体素子と、半導体素子の上に設けられ、上面と、側面と、少なくとも側面に設けられ複数の細孔を有する多孔質体と、を有するコネクタと、半導体素子の周囲及び少なくともコネクタの側面に設けられたモールド樹脂と、を備え、コネクタの上面は露出している。
【選択図】図１

Description

本発明の実施形態は、半導体装置に関する。
発電や送電、ポンプやブロアなどの回転機、通信システムや工場などの電源装置、交流モータによる鉄道、電気自動車、家庭用電化製品等の幅広い分野に向けた、ＭＯＳＦＥＴ（Ｍｅｔａｌ－Ｏｘｉｄｅ－Ｓｅｍｉｃｏｎｄｕｃｔｏｒ Ｆｉｅｌｄ－Ｅｆｆｅｃｔ－Ｔｒａｎｓｉｓｔｏｒ）やＩＧＢＴ（Ｉｎｓｕｌａｔｅｄ Ｇａｔｅ Ｂｉｐｏｌａｒ Ｔｒａｎｓｉｓｔｏｒ）等の、電力制御用に設計されたパワー半導体素子の開発が行われている。
また、かかるパワー半導体素子を用いた、パワーモジュールとしての半導体装置の開発が行われている。このような半導体装置には、高電流密度化、低損失化、高放熱化等のスペックが要求されている。
特許第５８０７３４０号公報
本発明が解決しようとする課題は、信頼性の高い半導体装置を提供することである。
実施形態の半導体装置は、ベースフレームと、ベースフレームの上に設けられた半導体素子と、半導体素子の上に設けられ、上面と、側面と、少なくとも側面に設けられ複数の細孔を有する多孔質体と、を有するコネクタと、半導体素子の周囲及び少なくともコネクタの側面に設けられたモールド樹脂と、を備え、コネクタの上面は露出している。
実施形態の半導体装置の模式断面図である。 実施形態の多孔質体及びソースコネクタの断面の顕微鏡写真である。
以下、図面を参照しつつ本発明の実施形態を説明する。なお、以下の説明では、同一又は類似の部材には同一の符号を付す場合がある。また、一度説明した部材等については適宜その説明を省略する場合がある。
本明細書中、部品等の位置関係を示すために、図面の上方向を「上」、図面の下方向を「下」と記述する。本明細書中、「上」、「下」の概念は、必ずしも重力の向きとの関係を示す用語ではない。
（実施形態）
実施形態の半導体装置は、ベースフレームと、ベースフレームの上に設けられた半導体素子と、半導体素子の上に設けられ、上面と、側面と、少なくとも側面に設けられ複数の細孔を有する多孔質体と、を有するコネクタと、半導体素子の周囲及び少なくともコネクタの側面に設けられたモールド樹脂と、を備え、コネクタの上面は露出している。
図１は、本実施形態の半導体装置１００の模式断面図である。
半導体装置１００は、ベースフレーム２と、第１接合材４と、半導体素子６と、第２接合材８と、ソースコネクタ（コネクタの一例）１０と、ゲートコネクタ２０と、コネクタ２２と、第３接合材２４と、第４接合材２６と、モールド樹脂３０と、を備える。
ベースフレーム２は、半導体素子６と、図示しない外部電気回路との接続に用いられている。ベースフレーム２は、例えば電気導電性の板状部材である。
半導体素子６は、ベースフレーム２の上に設けられている。半導体素子６は、例えば縦型のＭＯＳＦＥＴであるが、これに限定されるものではない。例えば半導体素子６がＭＯＳＦＥＴである場合、半導体素子６の底面に設けられた図示しないドレイン電極は、半導体素子６とベースフレーム２の間に設けられた第１接合材４により、ベースフレーム２と電気的に接続されている。
ソースコネクタ１０は、半導体素子６の上に設けられている。ソースコネクタ１０は、底面１０ａと、側面１０ｂと、上面１０ｃと、側面１０ｄと、面１０ｅと、側面１０ｆと、を有している。例えば半導体素子６がＭＯＳＦＥＴである場合、半導体素子６の上面に設けられた、図示しないソース電極は、半導体素子６とソースコネクタ１０の間に設けられた第２接合材８により、ソースコネクタ１０と電気的に接続されている。ソースコネクタ１０は、例えば、半導体素子６のソース電極と、図示しない外部電気回路の電気的接続に用いられている。
ソースコネクタ１０は、多孔質体１２を有する。具体的には、ソースコネクタ１０の、少なくとも側面１０ｂには、複数の細孔を有する多孔質体１２が設けられている。半導体装置１００においては、多孔質体１２としての多孔質体１２ａ、１２ｂ、１２ｃ、１２ｄ、１２ｅ及び１２ｆが、それぞれソースコネクタの底面１０ａ、側面１０ｂ、上面１０ｃ、側面１０ｄ、面１０ｅ及び側面１０ｆに設けられている。なお、多孔質体１２ａ、１２ｃ、１２ｄ、１２ｅ及び１２ｆは、設けられていなくてもかまわない。
ゲートコネクタ２０の一端は、半導体素子６の上面に設けられた図示しないゲート電極と、第３接合材２４により、電気的に接続されている。ゲートコネクタ２０の他端は、第４接合材２６を介して、コネクタ２２に電気的に接続されている。ゲートコネクタ２０及びコネクタ２２は、半導体素子６のゲート電極と、図示しない外部電気回路の電気的接続に用いられている。なお、半導体素子６のゲート電極と外部電気回路の電気的接続には、ボンディングワイヤ等のワイヤを用いてもかまわない。
モールド樹脂３０は、ベースフレーム２の上面、第１接合材４の周囲、半導体素子６の周囲、ゲートコネクタ２０の周囲、第３接合材２４の周囲及び第４接合材２６の周囲に設けられている。また、モールド樹脂３０は、多孔質体１２ａ、１２ｂ、１２ｄ、１２ｅ及び１２ｆの表面に設けられている。多孔質体１２ｃ、ベースフレーム２の底面及びコネクタ２２の一部は、露出している。なお、多孔質体１２ｃが設けられていないソースコネクタ１０の場合には、ソースコネクタ１０の上面１０ｃが露出している。
ベースフレーム２、ソースコネクタ１０、ゲートコネクタ２０及びコネクタ２２は、例えばＣｕ（銅）等の金属又は合金を含む。なお、ベースフレーム２、ソースコネクタ１０、ゲートコネクタ２０及びコネクタ２２の表面には、例えば、Ａｕ（金）、Ｐｔ（白金）、Ｐｄ（パラジウム）、Ａｇ（銀）、Ｃｕ（銅）、Ｓｎ（錫）又はＮｉ（ニッケル）等を含む薄膜が設けられていても良い。
第１接合材４、第２接合材８、第３接合材２４及び第４接合材２６としては、はんだや銀の微粒子を含む導電性樹脂等が用いられる。
多孔質体１２は、例えば、Ａｌ（アルミニウム）、Ｚｎ（亜鉛）、Ｍｇ（マグネシウム）、Ｎｉ（ニッケル）、Ｃｏ（コバルト）、Ｆｅ（鉄）、Ｃｒ（クロム）、Ｔｉ（チタン）、Ｚｒ（ジルコニウム）、Ｃｕ（銅）を含む。また、多孔質体１２は、上記の元素を含む合金であっても良い。多孔質体１２は、Ｎｉを含むことが好ましい。
モールド樹脂３０は、例えば、シリカ（ＳｉＯ２）粒子等のフィラーを含むエポキシ樹脂等である。
図２は、実施形態の多孔質体１２及びソースコネクタ１０の断面の顕微鏡（走査型電子顕微鏡（Ｓｃａｎｎｉｎｇ Ｅｌｅｃｔｒｏｎ Ｍｉｃｒｏｓｃｏｐｅ）ＳＥＭ）写真である。なお、図２に示した顕微鏡写真は、倍率を５００倍として撮影されたものである。ソースコネクタ１０の上に、多孔質体１２が形成されている。そして、多孔質体１２は、複数の細孔１４を有している。図２には、複数の細孔１４としての、細孔１４ａ、１４ｂ、１４ｃ及び１４ｄが示されている。なお、図２に示した多孔質体１２は、Ｎｉにより形成されたものである。
複数の細孔１４の平均めっき深さ（平均深さの一例）は、３μｍ以上２０μｍ以下であることが好ましい。
複数の細孔１４の平均孔ピッチは、１μｍ以上２０μｍ以下であることが好ましい。
複数の細孔１４の平均めっき深さ及び平均孔ピッチの測定方法について説明する。ＪＩＳ Ｂ ０６０１：２０１３（ＩＳＯ４２８７：１９９７）に基づき、多孔質体１２の断面において、測定断面曲線に所定のカットオフ値λｓの低域フィルタを適用して、断面曲線（ｐｒｉｍａｒｙ ｐｒｏｆｉｌｅ）を得る。次に、カットオフ値λｃの高域フィルタによって、断面曲線から長波長成分を遮断して輪郭曲線を得る。この輪郭曲線のことを、粗さ曲線（ｒｏｕｇｈｎｅｓｓ ｐｒｏｆｉｌｅ）と呼ぶ。なお、λｓ及びλｃの標準的な関係は、例えば、ＪＩＳ Ｂ ０６５１による。
また、基準面（粗さ曲線の底面）を決定する。基準面とは、例えばソースコネクタ１０がＣｕで形成され、多孔質体１２がＮｉで形成されている場合には、ＣｕとＮｉの界面である。
平均めっき深さとは、上記の粗さ曲線において、頂点（最大高さ）の部分と、基準面との距離を、合計２０個分測定して、平均を取ったものである。なお、めっき深さは、ＪＩＳ Ｂ ０６０１：２０１３（ＩＳＯ４２８７：１９９７）のＺｔ（最大断面高さ、又は輪郭曲線要素の高さ（Ｚｔ：ｐｒｏｆｉｌｅ ｅｌｅｍｅｎｔ ｈｅｉｇｈｔ）に相当している。
平均孔ピッチとは、上記の粗さ曲線において、基準面に平行な面内において、隣接する頂点同士の距離を、合計２０個分測定して、平均を取ったものである。
多孔質体１２の表面粗さについては、線粗さ（ＪＩＳ Ｂ ０６０１の最大高さ粗さ）Ｒｚは、３μｍ以上２０μｍ以下であることが好ましい。また、面粗さＳｚ（ＩＳＯ２５１７８）は、５μｍ以上３０μｍ以下であることが好ましい。なお、線粗さＲｚ及び面粗さＳｚについては、市販の粗さ計測器を用いて測定を行う。
多孔質体１２の表面の濡れ性は、３８ｄｙｎｅ／ｃｍ以上であることが好ましい。
また、多孔質体１２とモールド樹脂３０の間のシェア強度が高いことが好ましい。なお、シェア強度は、例えば、市販のボンドテスターを用いて測定することが出来る。
次に、実施形態の半導体装置１００の製造方法について説明する。
多孔質体１２の製造方法について説明する、例えば、まず、電解めっきプロセスにおいて、ソースコネクタ１０の表面に微細な水素（Ｈ２）の泡を発生させる。次に、この水素の泡を取り込むように、めっき層を成長させる。これにより、多孔質体１２として用いられるめっき層を形成することが出来る。ここで、ソースコネクタ１０のすべての表面に多孔質体１２を形成することも可能である。また、特定の表面に覆い（カバー）をすることにより、その特定の表面に多孔質体１２を形成しないようにすることも可能である。なお、実施形態の多孔質体１２の製造方法は、これに限定されるものではない。
多孔質体１２が形成されたソースコネクタ１０を用いた半導体装置１００の製造は、公知の方法により好ましく行うことが出来る。
次に、実施形態の半導体装置の作用効果を記載する。
半導体素子６は、光・熱・湿度及び外部の不純物等からの保護のために、モールド樹脂３０により封止されている。ここで、このように封止された半導体素子６と外部電気回路の電気的接続を、どのように行うかが問題となる。
まず、半導体素子６のゲート電極には、半導体素子６を制御する信号が入力される。このような制御信号の電流や電圧は、一般に、大きなものではない。そこで、半導体素子６のゲート電極と外部電気回路との電気接続は、例えば半導体装置１００のように、配線抵抗が大きくなるものの、ゲートコネクタ２０とコネクタ２２という２個のコネクタを介して行い、ゲートコネクタ２０がモールド樹脂３０により全体が修正された形で行われてもかまわない。１個のコネクタを使って外部電気回路と接続する場合と比較すると、２個のコネクタを介して接続を行う場合においては、モールド樹脂３０の外部から半導体素子６へ外部の不純物が侵入することが、起こりづらくなるためである。
しかし、ソース電極と外部電気回路の電気的接続については、配線のオーム損失を少なくするために、ゲート電極の場合のように複数のコネクタを用いたりせずに、ソースコネクタ１０の上面をモールド樹脂３０から露出させることにより行っている。この場合、ソースコネクタ１０の、特に側面１０ｂ及び側面１０ｄと、モールド樹脂３０との界面においては、実装時の熱ストレス又は半導体素子６を駆動する際の加熱・冷却サイクルのため、モールド樹脂３０の剥離が発生しやすい。これにより、モールド樹脂３０が剥離した箇所から、外部の不純物等が半導体素子６の表面まで侵入して、半導体素子６の電極を腐食させて導通不良をおこしてしまうという問題があった。また、この問題は、側面１０ｄ、面１０ｅ及び側面１０ｆのような、沿面距離が長い部分よりも、側面１０ｂのような、沿面距離が短い部分において、外部の不純物等が侵入する経路が短くなるため、深刻なものとなっていた。なお、モールド樹脂３０とベースフレーム２の界面にも、同様の問題があった。
モールド樹脂３０の剥離を抑制するために、ソースコネクタ１０の表面やベースフレーム２の表面についてエッチング処理を行い、モールド樹脂３０とソースコネクタ１０の表面又はベースフレーム２の表面との密着性を向上させる（アンカー効果）ことが考えられる。しかし、ソースコネクタ１０やベースフレーム２に好ましく用いられるＣｕは、表面酸化が発生しやすく、耐腐食性も高くない。そのため、エッチング処理では十分にモールド樹脂３０の剥離の問題を解決することが出来なかった。
耐腐食性を向上させるために、ソースコネクタ１０の表面やベースフレーム２の表面を、Ｎｉ等のめっきで保護する手法が考えられる。しかし、Ｎｉ等のめっきで保護されたソースコネクタ１０の表面やベースフレーム２の表面と、モールド樹脂３０の密着性は良くない。そのため、モールド樹脂３０の剥離の問題を解決することが出来なかった。
実施形態の半導体装置１００は、ベースフレーム２と、ベースフレーム２の上に設けられた半導体素子６と、半導体素子６の上に設けられ、上面１０ｃと、側面１０ｂと、少なくとも側面１０ｂに設けられ複数の細孔１４を有する多孔質体１２と、を有するソースコネクタ１０と、半導体素子６の周囲及び少なくともソースコネクタの側面１０ｂに設けられたモールド樹脂と、を備え、ソースコネクタの上面１０ｃは露出している。
多孔質体１２がソースコネクタ１０の側面１０ｂに設けられることにより、モールド樹脂３０が多孔質体１２の細孔１４に食い込んで密着性が向上し、剥離が起こりづらくなる。また、多孔質体１２が設けられることにより、ソースコネクタ１０の耐腐食性が向上する。そのため、信頼性の高い半導体装置の提供が可能となる。
多孔質体１２とモールド樹脂３０の密着性を向上させるためには、複数の細孔１４の平均めっき深さは３μｍ以上２０μｍ以下であることが好ましい。３μｍより小さい場合には、十分な密着性が得られない。一方、２０μｍより大きくなると、製造時に多くのめっき屑が発生し、うまく多孔質体１２を形成することが出来ない。
また、複数の細孔の平均孔ピッチは１μｍ以上２０μｍ以下であることが好ましい。１μｍより小さい場合には、十分な密着性が得られない。一方、２０μｍより大きくなると、製造時に多くのめっき屑が発生し、うまく多孔質体１２を形成することが出来ない。
また、多孔質体の線粗さＲｚは３μｍ以上２０μｍ以下であることが好ましい。３μｍより小さい場合には、十分な密着性が得られない。一方、２０μｍより大きくなると、製造時に多くのめっき屑が発生し、うまく多孔質体１２を形成することが出来ない。
また、多孔質体の線粗さＲｚは３μｍ以上２０μｍ以下であることが好ましい。３μｍより小さい場合には、十分な密着性が得られない。一方、２０μｍより大きくなると、製造時に多くのめっき屑が発生し、うまく多孔質体１２を形成することが出来ない。
多孔質体１２は、Ｎｉを含むことが好ましい。上記の特性を有する多孔質体１２を容易に形成することが出来るためである。
なお、多孔質体１２は、さらにソースコネクタの上面１０ｃに設けられていても良い。半導体装置１００の実装の際に用いられる、例えばＳｎ（スズ）を含むめっき層が、多孔質体１２を設けることにより、良好に形成されるためである。
以下に、実施例１及び実施例２を、比較例１及び比較例２と対比しながら説明する。
（実施例１）
電解めっきプロセスを用いて、ソースコネクタ１０の表面に微細な水素（Ｈ２）の泡を発生させた。次に、この水素の泡を取り込むように、Ｎｉめっき層を成長させ、多孔質体１２が全ての面に膜厚１０μｍで形成されたソースコネクタ１０を製造した。そして、このソースコネクタを用いて、半導体装置を製造した。
（実施例２）
実施例１と同様の方法で半導体装置を製造した。ただし、半導体装置の製造にあたり、多孔質体１２が全ての面に膜厚２０μｍで形成されたソースコネクタ１０を用いた。
（比較例１）
多孔質体１２を有しないソースコネクタ１０を用いて、半導体装置を製造した。
（比較例２）
実施例１と同様の方法で半導体装置を製造した。ただし、半導体装置の製造にあたり、多孔質体が全ての面に膜厚３μｍで形成されたソースコネクタ１０を用いた。
次に、実施例１、実施例２、比較例１及び比較例２について、以下の方法で、平均めっき深さ、平均孔ピッチ、線粗さＲｚ、面粗さＳｚ、表面張力濡れ判断、及びシェア強度比を評価した。
平均めっき深さは、多孔質体１２の断面ＳＥＭ観察に基づき評価した。
平均孔ピッチは、多孔質体１２の断面ＳＥＭ観察に基づき評価した。
線粗さＲｚ及び面粗さＳｚは、多孔質体１２の表面を、レーザー顕微鏡（Ｏｌｙｍｐｕｓ社製ＯＬＳ４１００）を用いて測定することにより行った。
表面張力濡れ判断は、アルコテスト社製の各表面張力のテストペンを用いて、多孔質体１２の表面に直線を書くことにより行った。ここで、直線を書いた後、直線状態が変わらない場合には、濡れていると判定する。例えば、３０ｄｙｎｅ／ｃｍのテストペンを用いて多孔質体１２の表面に書いた直線の状態が変わらない場合、その多孔質体１２の表面の濡れ性は、少なくとも３０ｄｙｎｅ／ｃｍ以上であると判定する。この場合、後述する表１において、「○」と記載している。一方、３０ｄｙｎｅ／ｃｍのテストペンを用いて直線を書いた後、５分以内に水滴状になる場合には、濡れ性は、３０ｄｙｎｅ／ｃｍについては「△」と記載している。また、３０ｄｙｎｅ／ｃｍのテストペンを用いて直線を書いた後、５秒以内で水滴状になる場合には、濡れ性は、３０ｄｙｎｅ／ｃｍについては「×」と記載している。そして、濡れ性の高いものは、多孔質体１２に対するモールド樹脂３０の濡れ性が高く、多孔質体１２とモールド樹脂３０の密着性が向上していると判断した。
シェア強度比は、ボンドテスター（Ｎｏｒｄｏｓｏｎ Ｄａｇｅ社 Ｄａｇｅ－４０００）を用いて測定した。ここで、２種類の樹脂（樹脂１、樹脂２）を用いて製造した半導体装置について、シェア強度比を測定した。樹脂１は、線膨張係数α１＝１４（ｐｐｍ／℃）、ガラス転移温度Ｔｇ＝１３５℃である。樹脂２は、線膨張係数α１＝２１（ｐｐｍ／℃）、ガラス転移温度Ｔｇ＝１６５℃である。ここで、シェア強度比は、比較例１の半導体装置の強度に対する比をとっている。
Figure 2022045072000002
表１から明らかなように、実施例１及び実施例２においては、測定する場所によって差はあるものの、平均めっき深さは３μｍ以上２０μｍ以下の範囲にあり、平均孔ピッチは１μｍ以上２０μｍ以下の範囲にあり、線粗さＲｚは３μｍ以上２０μｍ以下の範囲にあり、面粗さＳｚは５μｍ以上３０μｍ以下の範囲にある。表面張力濡れ判断は、４４ｄｙｎｅ／ｃｍの判断も「○」であり、比較例１に対して高い濡れ性を示した。そして、シェア強度比も、樹脂１・樹脂２いずれの場合においても高いため、モールド樹脂３０と多孔質体１２の密着性が高くなっているものと判断した。
比較例１においては、表面張力濡れ判断（４０ｄｙｎｅ／ｃｍ）及び表面張力濡れ判断（４４ｄｙｎｅ／ｃｍ）の結果が「△」であった。
比較例２においては、平均めっき深さ、平均孔ピッチ、線粗さＲｚ及び面粗さＳｚのいずれも、好ましい範囲のものではなかった。そして、表面張力濡れ判断（３８ｄｙｎｅ／ｃｍ）の結果が「△」であり、表面張力濡れ判断（４０ｄｙｎｅ／ｃｍ）及び表面張力濡れ判断（４４ｄｙｎｅ／ｃｍ）の結果が「×」であったため、モールド樹脂３０と多孔質体１２の密着性が低いと判断した。
本発明のいくつかの実施形態及び実施例を説明したが、これらの実施形態及び実施例は、例として提示したものであり、発明の範囲を限定することは意図していない。これら新規な実施形態は、その他の様々な形態で実施されることが可能であり、発明の要旨を逸脱しない範囲で、種々の省略、置き換え、変更を行うことが出来る。これら実施形態やその変形は、発明の範囲や要旨に含まれると共に、特許請求の範囲に記載された発明とその均等の範囲に含まれる。
２ ベースフレーム
４ 第１接合材
６ 半導体素子
８ 第２接合材
１０ ソースコネクタ（コネクタ）
１０ｂ ソースコネクタの側面
１０ｃ ソースコネクタの上面
１２ 多孔質体
１４ 細孔
２０ ゲートコネクタ
２２ コネクタ
２４ 第３接合材
２６ 第４接合材
３０ モールド樹脂
１００ 半導体装置

Claims (7)

  1. ベースフレームと、
    前記ベースフレームの上に設けられた半導体素子と、
    前記半導体素子の上に設けられ、上面と、側面と、少なくとも前記側面に設けられ複数の細孔を有する多孔質体と、を有するコネクタと、
    前記半導体素子の周囲及び少なくとも前記コネクタの前記側面に設けられたモールド樹脂と、
    を備え、
    前記コネクタの上面は露出している、
    半導体装置。
  2. 前記複数の細孔の平均深さは３μｍ以上２０μｍ以下である請求項１記載の半導体装置。
  3. 前記複数の細孔の平均孔ピッチは１μｍ以上２０μｍ以下である請求項１又は請求項２記載の半導体装置。
  4. 前記多孔質体の線粗さＲｚは３μｍ以上２０μｍ以下である請求項１乃至請求項３いずれか一項記載の半導体装置。
  5. 前記多孔質体の面粗さＳｚは５μｍ以上３０μｍ以下である請求項１乃至請求項４いずれか一項記載の半導体装置。
  6. 前記多孔質体は、Ｎｉ（ニッケル）を含む請求項１乃至請求項５いずれか一項記載の半導体装置。
  7. 前記多孔質体は、さらに前記上面に設けられ、前記上面に設けられた前記多孔質体は露出している請求項１乃至請求項６いずれか一項記載の半導体装置。
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