JP2016046476A - 電子装置およびその製造方法 - Google Patents
電子装置およびその製造方法 Download PDFInfo
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- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 2
- 239000000919 ceramic Substances 0.000 description 2
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- 229910052689 Holmium Inorganic materials 0.000 description 1
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- 230000012447 hatching Effects 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
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- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
Abstract
【解決手段】電子素子10と、樹脂30aと樹脂30aの内部に分布され樹脂30aよりも熱伝導率の大きい絶縁性のフィラー30bとよりなり、電子素子10を封止するモールド部材30と、を備える電子装置S1であって、モールド部材30の表面は、フィラー30bが露出することにより、当該露出するフィラー30bの外形に対応した凹凸形状をなす凹凸面33とされている。
【選択図】図2
Description
なお、上記実施形態では、モールド部材30の表面の全領域が凹凸面33とされていたが、モールド部材30の表面の一部の領域のみが凹凸面33とされていてもよい。このような構成は、当該一部の領域のみに対して、上記したレーザLの照射を選択的に行うようにすればよい。
30 モールド部材
30a 樹脂
30b フィラー
33 凹凸面
Claims (6)
- 電子素子(10)と、
樹脂(30a)と前記樹脂の内部に分布され前記樹脂よりも熱伝導率の大きい絶縁性のフィラー(30b)とよりなり、前記電子素子を封止するモールド部材(30)と、を備える電子装置であって、
前記モールド部材の表面の少なくとも一部の領域は、前記フィラーが露出することにより、当該露出するフィラーの外形に対応した凹凸形状をなす凹凸面(33)とされていることを特徴とする電子装置。 - 前記凹凸面における凸部の突出高さは、前記フィラーの最大粒子径以下のレベルとされていることを特徴とする請求項1に記載の電子装置。
- 前記フィラーの最大粒子径は200μm以下であることを特徴とする請求項1または2に記載の電子装置。
- 前記凹凸面とされる前記モールド部材の表面の少なくとも一部の領域は、前記モールド部材内部の前記電子素子を前記モールド部材の表面に対して当該表面の法線方向に投影した領域であることを特徴とする請求項1ないし3のいずれか1つに記載の電子装置。
- 電子素子(10)と、
樹脂(30a)と前記樹脂の内部に分布され前記樹脂よりも熱伝導率の大きい絶縁性のフィラー(30b)とよりなり、前記電子素子を封止するモールド部材(30)と、を備える電子装置の製造方法であって、
無機物よりなる前記フィラーを含有する前記モールド部材により前記電子素子を封止する封止工程と、
しかる後、前記モールド部材の表面の少なくとも一部の領域に、レーザを照射して、前記フィラーは残しつつ前記樹脂のみを除去して前記フィラーを露出させることにより、当該少なくとも一部の領域を、当該露出するフィラーの外形に対応した凹凸形状をなす凹凸面(33)とするレーザ工程と、を備えることを特徴とする電子装置の製造方法。 - 前記レーザは、1.5μm以上5μm以下の波長を有するものであることを特徴とする請求項5に記載の電子装置の製造方法。
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Cited By (2)
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JP2022511450A (ja) * | 2019-01-22 | 2022-01-31 | 長江存儲科技有限責任公司 | 集積回路パッケージング構造及びその製造方法 |
WO2023095228A1 (ja) * | 2021-11-25 | 2023-06-01 | 三菱電機株式会社 | 放熱部材、電子機器、及び、放熱部材の製造方法 |
Families Citing this family (1)
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WO2020067299A1 (ja) | 2018-09-27 | 2020-04-02 | 株式会社村田製作所 | モジュールおよびその製造方法 |
Citations (2)
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JP2009275110A (ja) * | 2008-05-14 | 2009-11-26 | Nitto Denko Corp | 半導体封止用樹脂組成物およびそれを用いた半導体装置 |
JP2013118218A (ja) * | 2011-12-01 | 2013-06-13 | Denso Corp | 半導体装置およびその製造方法 |
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JP2009275110A (ja) * | 2008-05-14 | 2009-11-26 | Nitto Denko Corp | 半導体封止用樹脂組成物およびそれを用いた半導体装置 |
JP2013118218A (ja) * | 2011-12-01 | 2013-06-13 | Denso Corp | 半導体装置およびその製造方法 |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
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JP2022511450A (ja) * | 2019-01-22 | 2022-01-31 | 長江存儲科技有限責任公司 | 集積回路パッケージング構造及びその製造方法 |
US11476173B2 (en) | 2019-01-22 | 2022-10-18 | Yangtze Memory Technologies Co., Ltd. | Manufacturing method of integrated circuit packaging structure |
JP7414822B2 (ja) | 2019-01-22 | 2024-01-16 | 長江存儲科技有限責任公司 | 集積回路パッケージング構造及びその製造方法 |
WO2023095228A1 (ja) * | 2021-11-25 | 2023-06-01 | 三菱電機株式会社 | 放熱部材、電子機器、及び、放熱部材の製造方法 |
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