CN106797105A - 半导体装置 - Google Patents

半导体装置 Download PDF

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Publication number
CN106797105A
CN106797105A CN201580053494.2A CN201580053494A CN106797105A CN 106797105 A CN106797105 A CN 106797105A CN 201580053494 A CN201580053494 A CN 201580053494A CN 106797105 A CN106797105 A CN 106797105A
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China
Prior art keywords
electrode block
electrode
region
projection
insulating barrier
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CN201580053494.2A
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CN106797105B (zh
Inventor
上田直人
大森弘治
吉田隆幸
本藤拓磨
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Panasonic Intellectual Property Management Co Ltd
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Panasonic Intellectual Property Management Co Ltd
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    • H01S5/02492CuW heat spreaders

Abstract

本公开所涉及的半导体装置具有:导电性的第1电极块、导电性的辅助基座、绝缘层、半导体元件、导电性的凸块和导电性的第2电极块。辅助基座被设置于第1电极块的上表面的第1区域,电连接于第1电极块。半导体元件被设置于辅助基座之上,具有电连接于辅助基座的第1电极。凸块被设置于与半导体元件的第1电极相反的一侧的第2电极的上表面,电连接于第2电极。此外,第2电极块的下表面在第3区域,经由具有导电性的金属层而电连接于凸块。此外,在金属层与凸块之间,设置具有导电性的金属片。

Description

半导体装置
技术领域
本公开涉及半导体装置,特别地,涉及搭载有发热较大的半导体元件的半导体装置。
背景技术
近年来,在使用了功率半导体元件或半导体激光元件的半导体装置中,流过半导体元件的电流变大,伴随于此,来自半导体元件的发热量变多。例如,用于激光加工的高输出的半导体激光装置为了得到高输出的激光,流过被搭载的半导体激光元件的电流较大,伴随于此,半导体激光元件的发热量较多。若半导体激光元件变成高温,则产生激光输出降低这一性能劣化。为了半导体激光元件的性能的稳定化以及防止异常加热,半导体激光装置成为具有从半导体激光元件的两面释放热量的冷却功能的构造。
使用图18,对专利文献1中所述的现有的半导体激光装置900进行说明。图18是现有的半导体激光装置900的立体图以及侧视图。
如图18所示,现有的半导体激光装置900在散热片901的端部的上方设置辅助基座902、LD(Laser Diode,激光二极管)杆903。在散热片901的上方即未设置辅助基座902的区域,设置绝缘层904。在LD杆903的上方形成凸块905,在绝缘层904以及凸块905的上方设置引出电极906。进一步地,在LD杆903与引出电极906之间,填充材料907被填充到不存在凸块905的空间。
在先技术文献
专利文献
专利文献1:日本特开2003-86883号公报
发明内容
现有的半导体激光装置900在LD杆903与引出电极906之间,填充由Ag糊膏或者焊锡材料构成的填充材料907,使热传导性提高。但是,若由Ag糊膏或焊锡材料填充LD杆903与引出电极906之间,则由于LD杆903与引出电极906的热膨胀率的差异,可能在引出电极906与填充材料907的界面、填充材料907的内部产生龟裂。若产生这样的龟裂,则热传导性降低,并且LD杆903与引出电极906之间的电连接降低(即,电阻增加),导致半导体激光装置的性能降低或故障。
为了解决上述问题,本公开所涉及的半导体装置具有:第1电极块、辅助基座(submount)、绝缘层、半导体元件、凸块和第2电极块。第1电极块具有导电性。辅助基座被设置于第1电极块的上表面的第1区域,电连接于第1电极块,具有导电性。绝缘层被设置于第1电极块的上表面且与第1区域不同的第2区域。半导体元件被设置于辅助基座之上,具有电连接于辅助基座的第1电极。凸块被设置于与半导体元件的第1电极相反的一侧的第2电极的上表面,电连接于第2电极,具有导电性。第2电极块被设置于凸块以及绝缘层之上,具有导电性。此外,第2电极块的下表面在第3区域,经由具有导电性的金属层而电连接于凸块。此外,第2电极块的下表面在第4区域,被搭载于绝缘层。此外,在金属层与凸块之间,设置具有导电性的金属片。
如以上那样,本公开通过在凸块与第2电极块之间设置金属层以及金属片,能够缓和因半导体元件与第2电极块的热膨胀率的差异而引起的应力,并且稳定地确保半导体元件与第2电极块的电连接。
附图说明
图1是表示实施方式1中的半导体激光装置1的示意结构的剖视图。
图2是表示实施方式1中的半导体激光装置1的制造方法的立体图。
图3是表示实施方式1中的半导体激光装置1的制造方法的立体图。
图4是表示实施方式1中的半导体激光装置1的制造方法的立体图。
图5是表示实施方式1中的半导体激光装置1的制造方法的立体图。
图6是表示实施方式1中的半导体激光装置1的制造方法的立体图。
图7是表示实施方式1中的半导体激光装置1的制造方法的立体图。
图8是表示实施方式2中的功率半导体装置2的示意结构的剖视图。
图9是表示实施方式2中的功率半导体装置2的制造方法的立体图。
图10是表示实施方式2中的功率半导体装置2的制造方法的立体图。
图11是表示实施方式2中的功率半导体装置2的制造方法的立体图。
图12是表示实施方式2中的功率半导体装置2的制造方法的立体图。
图13是表示实施方式2中的功率半导体装置2的制造方法的立体图。
图14是表示实施方式2中的功率半导体装置2的制造方法的立体图。
图15是表示实施方式3中的半导体激光装置3的示意结构的剖视图。
图16是表示实施方式3中的半导体激光装置3的示意结构的立体图。
图17是表示实施方式4中的功率半导体装置4的示意结构的剖视图。
图18是表示现有的半导体激光装置900的示意结构(立体图以及侧视图)的图。
具体实施方式
(实施方式1)
以下,使用图1~图7来对本公开的实施方式1进行说明。
图1是表示本实施方式中的半导体激光装置1的示意结构的剖视图。图2~图7是表示本实施方式中的半导体激光装置1的制造方法的立体图。
如图1所示,半导体激光装置1(半导体装置)具有:电极块10(第1电极块)、辅助基座(mount)20、绝缘层30、半导体激光元件40(半导体元件)、凸块50和电极块60(第2电极块)。进一步地,在凸块50与电极块60之间,从凸块50的一侧起依次设置金属片70和金属层80。
电极块10具有导电性,主要材料是铜(Cu),是对铜块依次镀敷了镍(Ni)和金(Au)而成的。如图1所示,在电极块10的上表面的端部设置凹部11,在凹部11内的区域(第1区域)设置辅助基座20,在电极块10的除了凹部11以外的上表面的区域(第2区域),设置绝缘层30。也就是说,绝缘层30“コ”字状地包围凹部11(参照图2~5)。此外,凹部11的上表面位于比凹部11以外的上表面低的位置。
辅助基座20具有导电性,主要材料是铜钨合金(CuW)。如图1所示,辅助基座20被配置为在凹部11内的区域,电极块10的侧面与辅助基座20的侧面一致。辅助基座20与电极块10电连接,通过包含96.5%的锡(Sn)和3.5%的银(Ag)的焊锡材料(未图示)来与电极块10粘合。另外,辅助基座20的主要材料也可以是铜钼合金(CuMo)。
绝缘层30具有绝缘性,主要材料是聚酰亚胺或陶瓷等。如图1所示,被设置在电极块10的除凹部11以外的上表面。另外,虽然在本实施方式中,将绝缘层30分为绝缘层31以及绝缘层32这2个而设置,但也可以设为一个。绝缘层31的主要材料是聚酰亚胺,绝缘层32的主要材料是氮化铝(AlN)。
半导体激光元件40的下表面是正电极41(第1电极),上表面是负电极42(第2电极)。半导体激光元件40若从正电极41向负电极42流过电流,则从发光面(图1的左侧)输出激光。如图1所示,半导体激光元件40被配置在辅助基座20上以使得半导体激光元件40的发光面与辅助基座20的侧面一致。半导体激光元件40的正电极41电连接于辅助基座20,通过包含80%的金和20%的锡的焊锡材料(未图示)来与辅助基座20粘合。
凸块50具有导电性,主要材料是金。如图1所示,凸块50在半导体激光元件40的负电极42上被设置多个,并电连接于半导体激光元件40的负电极42。凸块50的高度为约80μm~约120μm。
金属片70具有导电性,主要材料是金。金属片70是将约8μm~约12μm的厚度的金属箔重叠3~4张而成的,整体的厚度为约24μm~约48μm。另外,金属片70的张数和整体的厚度并不局限于此。金属片70被设置在凸块50的上方以使得凸块50的上端陷入,并电连接于凸块50。此外,虽然凸块50的前端被设置为陷入到金属片70,但优选凸块50的前端不与金属片70化学粘合(接合)地,陷入到金属片70并物理接触。由此,即使针对半导体激光元件40与电极块60的热膨胀率的差,凸块50也能够进行移动以使得在水平面方向上按压金属片70,能够缓和应力。
金属层80具有导电性,主要材料是金。金属层80的厚度为约50μm~约100μm。金属层80被设置在金属片70之上,并电连接于金属片70。此外,优选金属层80不与金属片70化学粘合(接合)地,相互的面彼此物理接触。由此,即使针对半导体激光元件40与电极块60的热膨胀率的差,金属片70也能够沿着金属层80在水平面方向上偏移地移动,能够缓和应力。
电极块60具有导电性,主要材料是铜(Cu),是在铜块上依次镀敷镍(Ni)和金(Au)而成的。如图1所示,电极块60被设置在金属层80以及绝缘层30的上方,电连接于金属层80。金属层80被设置于电极块60的下表面即与半导体激光元件40相对的区域(第3区域)。金属层80是使厚度为约50μm~100μm的薄金属板与电极块60压焊而被设置的。此外,并不局限于此,金属层80也可以在电极块60的下表面即与半导体激光元件40相对的区域,以约50μm~约100μm的厚度使金属镀敷生长。此外,电极块60在电极块60的下表面即与半导体激光元件40相对的区域以外的区域(第4区域),与绝缘层30粘合。
另外,凹部11的深度(高度)是考虑辅助基座20、半导体激光元件40、凸块50、金属片70、金属层80和绝缘层30各自的厚度而被设定的。特别地,考虑到凸块50陷入到金属片70,从而凹部11的深度(高度)例如是从辅助基座20、半导体激光元件40、凸块50和金属层80的厚度之和减去绝缘层30的厚度而得到的厚度等。
接下来,使用图2~图7,对本实施方式的半导体激光装置1的制造方法进行说明。图2~图7是表示本实施方式的半导体激光装置1的制造方法的立体图。
首先,如图2所示,将搭载有半导体激光元件40的辅助基座20搭载于电极块10的凹部11。半导体激光元件40通过包含金和锡的焊锡材料来粘合于辅助基座20,以使得正电极41与辅助基座20连接。此外,辅助基座20使用比半导体激光元件40稍大的部件。半导体激光元件40配置成发光面与辅助基座20的侧面为同一面,半导体激光元件40的其他的侧面被配置于比辅助基座20的侧面更靠内侧。辅助基座20通过包含锡和银的焊锡材料来粘合于电极块10的凹部11。凹部11形成为比辅助基座20大。此外,辅助基座20配置成半导体激光元件40的发光面与电极块10的侧面为同一面,辅助基座20的其他的侧面被配置于比凹部11的侧面更靠内侧。另外,在电极块10,在配置有半导体激光元件40的凹部11的两侧设置连接孔12,在相对于连接孔12,在与激光的出射方向相反的一侧设置连接孔13。此外,在电极块10的与凹部11相反的一侧的端部,设置用于连接与电源连接的布线的端子孔14。连接孔12、连接孔13和端子孔14在内侧的侧面形成螺纹牙,以使得通过螺钉而被固定。
接下来,如图3所示,在半导体激光元件40的负电极42的上方形成多个凸块50。凸块50使通过熔融而前端成为球状的金线与负电极42接触,付与超声波并使其与负电极42接合。并且,通过一边付与超声波一边拉紧金线,形成上端尖锐的形状的凸块50。
接下来,如图4所示,在电极块10的凹部11以外的上表面形成绝缘层31以及绝缘层32(合起来设为绝缘层30)。优选绝缘层31使用例如以聚酰亚胺为主的变形较少(较坚硬)的绝缘性材料。由此,能够使电极块60在半导体激光元件40的上方稳定。此外,优选绝缘层32使用例如以氮化铝为主的热传导率较高且较柔软的绝缘性材料。由此,电极块60与绝缘层32的紧贴性变高,能够使热量容易在电极块10中传导。也就是说,绝缘层31是比绝缘层32坚硬的材料,绝缘层32是热传导率比绝缘层31高的材料。进一步地,在电极块60的下表面即与半导体激光元件40相对的部分形成金属层80。虽然在本实施方式中,金属层80是将金属板与电极块60压焊形成的,但也可以通过金属的镀敷生长来形成。此外,使金属片70载置于凸块50的上方。另外,在电极块60,在与电极块10的连接孔12对应的位置设置连接孔61,在与电极块10的连接孔13对应的位置设置连接孔62。此外,在电极块60的中央部,设置用于连接与电源连接的布线的端子孔63。连接孔61、连接孔62和端子孔63在内侧的侧面形成螺纹牙以使得通过螺钉而被固定。
接下来,如图5所示,在设置有辅助基座20、绝缘层30、半导体激光元件40、凸块50的电极块10,搭载设置有金属层80的电极块60。此时,在凸块50与金属层80之间,载置于凸块50之上的金属片70被夹持。
接下来,如图6所示,通过接合部件来使电极块10和电极块60一体化。具体而言,通过绝缘性螺钉90来将电极块10的连接孔12与电极块60的连接孔61连接。进一步地,通过导电性螺钉91来将电极块10的连接孔13与电极块60的连接孔62连接。在导电性螺钉91与电极块60之间设置绝缘部件92。也就是说,电极块10与电极块60不会通过绝缘性螺钉90或绝缘部件92而被电连接。也可以取代绝缘性螺钉90,使用导电性螺钉91和绝缘部件92,也可以取代导电性螺钉91和绝缘部件92,使用绝缘性螺钉90。绝缘性螺钉90以及绝缘部件92可以利用以陶瓷或树脂为主的绝缘性材料。
通过以上所述,如图7所示,半导体激光装置1完成。另外,图7的I-I线处的剖面相当于图1的剖视图。
(实施方式2)
接下来,使用图8~图14来对本公开的实施方式2进行说明。另外,针对与实施方式1共用的构成,付与相同的符号并省略说明。图8是表示本实施方式中的功率半导体装置2的示意结构的剖视图。图9~图14是表示本实施方式中的功率半导体装置2的制造方法的立体图。
在实施方式1中,作为半导体元件,使用输出激光的半导体激光元件40,将半导体激光元件40以及辅助基座20搭载于电极块10的上表面的端部。与此相对地,在本实施方式中,作为半导体元件,使用功率半导体元件140,将功率半导体元件140以及辅助基座20搭载于电极块110的上表面的中央部。
如图8所示,功率半导体装置2(半导体装置)具有:电极块110(第1电极块)、辅助基座20、绝缘层130、功率半导体元件140(半导体元件)、凸块50和电极块160(第2电极块)。进一步地,在凸块50与电极块160之间,从凸块50的一侧起依次设置金属片70和金属层80。另外,由于辅助基座20、凸块50、金属片70和金属层80与实施方式1相同,因此省略说明。
电极块110具有导电性,材质与实施方式1相同。如图8所示,在电极块110的上表面的中央部设置凹部111,在凹部111内的区域(第1区域)设置辅助基座20,在电极块110的凹部111以外的上表面的区域(第2区域)设置绝缘层130。也就是说,绝缘层130包围凹部111的整个周围(参照图9~12)。此外,凹部111的上表面位于比凹部111以外的上表面低的位置。
绝缘层130具有绝缘性,主要材料是聚酰亚胺。如图8所示,被设置于电极块110的凹部111以外的上表面。
功率半导体元件140是被输入60V以上的高电压、下表面是正电极141(第1电极)、上表面是负电极142(第2电极)的功率二极管。功率半导体元件140从正电极141向负电极142流过电流,从负电极142向正电极141不流过电流。如图8所示,功率半导体元件140被配置于辅助基座20的中央,以使得功率半导体元件140的侧面位于比辅助基座20的侧面更靠内侧。功率半导体元件140的正电极141电连接于辅助基座20,通过包含80%的金和20%的锡的焊锡材料(未图示)来与辅助基座20粘合。
电极块160具有导电性,材质与实施方式1相同。如图8所示,电极块160被设置于金属层80以及绝缘层130的上方,电连接于金属层80。金属层80被设置于电极块160的下表面即与功率半导体元件140相对的区域(第3区域)。金属层80是使厚度为约50μm~100μm的较薄的金属板压焊于电极块160而被设置的。此外,并不局限于此,金属层80也可以在电极块160的下表面即与功率半导体元件140相对的区域,以约50μm~约100μm的厚度使金属镀敷生长。此外,电极块160在电极块160的下表面即与功率半导体元件140相对的区域以外的区域(第4区域),与绝缘层130粘合。
此外,关于凹部111的深度(高度),也将半导体激光元件40设为功率半导体元件140,将绝缘层30设为绝缘层130,与实施方式1同样地设定即可。
接下来,使用图9~图14,来对本实施方式的功率半导体装置2的制造方法进行说明。图9~图14是表示本实施方式的功率半导体装置2的制造方法的立体图。
首先,如图9所示,将搭载有功率半导体元件140的辅助基座20搭载于电极块110的凹部111。与实施方式1的图2的差异在于,实施方式1中的半导体激光元件40在本实施方式中为功率半导体元件140。此外,相对于在实施方式1中凹部11形成于电极块10的端部,在本实施方式中,凹部111形成于电极块110的中央部。其他的方面与实施方式1相同。
接下来,如图10所示,在功率半导体元件140的负电极142之上形成多个凸块50。凸块的形成与实施方式1相同。
接下来,如图11所示,在电极块110的凹部111以外的上表面形成绝缘层130。进一步地,在电极块160的下表面即与功率半导体元件140相对的部分形成金属层80。虽然在本实施方式中,金属层80将金属板压焊于电极块160而形成,但也可以通过金属的镀敷生长来形成。此外,使金属片70载置于凸块50的上方。其他的方面与实施方式1相同。
接下来,如图12所示,在设置有辅助基座20、绝缘层130、功率半导体元件140、凸块50的电极块110搭载设置有金属层80(由于看不到因此未图示)的电极块160。此时,在凸块50与金属层80之间,载置于凸块50的上方的金属片70被夹持。
接下来,如图13所示,通过接合部件来使电极块110和电极块160一体化。这方面与实施方式1相同。
通过以上所述,如图14所示,功率半导体装置2完成。另外,图14的VIII-VIII线处的剖面相当于图8的剖视图。
(实施方式3)
接下来,使用图15以及图16来对本公开的实施方式3进行说明。另外,针对与实施方式1共用的构成付与相同的符号并省略说明。图15是表示本实施方式中的半导体激光装置3的示意结构的剖视图。图16是表示本实施方式中的半导体激光装置3的示意结构的立体图。
在实施方式1中,在搭载有辅助基座20的电极块10的上表面设置凹部11,将对置的电极块60的下表面设为平面。与此相对地,在本实施方式中,将搭载有辅助基座20的电极块210的上表面设为平面,在对置的电极块260的下表面设置凹部261。
如图15所示,半导体激光装置3(半导体装置)具有:电极块210(第1电极块)、辅助基座20、绝缘层30、半导体激光元件40(半导体元件)、凸块50和电极块260(第2电极块)。进一步地,在凸块50与电极块260之间,从凸块50的一侧起依次设置金属片70和金属层80。另外,由于辅助基座20、绝缘层30、半导体激光元件40、凸块50、金属片70和金属层80与实施方式1相同,因此省略说明。
电极块210具有导电性,材质与实施方式1相同。如图15所示,电极块210的上表面是平面,在端部的区域(第1区域)设置辅助基座20,在电极块210的端部以外的上表面的区域(第2区域),设置绝缘层30。关于绝缘层30,与实施方式1同样地,也可以分为绝缘层31以及绝缘层32,关于绝缘层30~32的材质,也与实施方式1相同。
电极块260具有导电性,材质与实施方式1相同。如图15所示,电极块260被设置于金属层80以及绝缘层30的上方,电连接于金属层80。并且,在电极块260的下表面的端部设置凹部261,在凹部261内即与半导体激光元件40相对的区域(第3区域)设置金属层80。并且,电极块260的凹部261以外的下表面的区域(第4区域)与绝缘层30粘合。也就是说,凹部261的下表面位于比凹部261以外的下表面高的位置。金属层80是使厚度为约50μm~100μm的较薄的金属板压焊于电极块260而被设置的。此外,并不局限于此,金属层80也可以在电极块260的下表面的凹部261内即与半导体激光元件40相对的区域,以约50μm~约100μm的厚度使金属镀敷生长。
此外,关于凹部261的深度(高度),与实施方式1同样地设定即可。
另外,图16的XV-XV线处的剖面相当于图15的剖视图。
(实施方式4)
接下来,使用图14以及图17来对本公开的实施方式4进行说明。另外,针对与实施方式2共用的构成付与相同的符号并省略说明。图17是表示本实施方式中的功率半导体装置4的示意结构的剖视图。
在实施方式2中,在搭载有辅助基座20的电极块110的上表面设置凹部111,将对置的电极块160的下表面设为平面。与此相对地,在本实施方式中,将搭载有辅助基座20的电极块310的上表面设为平面,在对置的电极块360的下表面设置凹部361。
如图17所示,功率半导体装置4(半导体装置)具有:电极块310(第1电极块)、辅助基座20、绝缘层130、功率半导体元件140(半导体元件)、凸块50和电极块360(第2电极块)。进一步地,在凸块50与电极块360之间,从凸块50的一侧起依次设置金属片70和金属层80。另外,由于辅助基座20、绝缘层130、功率半导体元件140、凸块50、金属片70和金属层80与实施方式2相同,因此省略说明。
电极块310具有导电性,材质与实施方式2相同。如图17所示,电极块310的上表面是平面,在中央部的区域(第1区域)设置辅助基座20,在电极块310的中央部以外的上表面的区域(第2区域),设置绝缘层130。绝缘层130也与实施方式2相同。
电极块360具有导电性,材质与实施方式2相同。如图17所示,电极块360被设置于金属层80以及绝缘层130之上,电连接于金属层80。并且,在电极块360的下表面的中央部设置凹部361,在凹部361内即与功率半导体元件140相对的区域(第3区域)设置金属层80。并且,电极块360的凹部361以外的下表面的区域(第4区域)与绝缘层130粘合。也就是说,凹部361的下表面位于比凹部361以外的下表面高的位置。金属层80是使厚度为约50μm~100μm的较薄的金属板压焊于电极块360而被设置的。此外,并不局限于此,金属层80也可以在电极块360的下表面的凹部361内即与功率半导体元件140相对的区域,以约50μm~约100μm的厚度使金属镀敷生长。
此外,关于凹部361的深度(高度),与实施方式2同样地设定即可。
另外,图14的VIII-VIII线处的剖面相当于图17的剖视图。
(实施方式1以及3的变形例)
接下来,对实施方式1以及3的变形例进行说明。在实施方式1以及3中,作为绝缘层31的材料,使用聚酰亚胺或陶瓷等基于压力的变形较少的绝缘性材料,作为绝缘层32的材料,使用氮化铝等较柔软的绝缘性材料。由于该绝缘性材料的坚硬度的差,电极块60(260)可能倾斜。也就是说,搭载有半导体激光元件40的一侧(绝缘层31一侧)可能向上方浮起,相反的一侧(绝缘层32一侧)可能向下方沉降。在本变形例中,在电极块60(260)的下表面即与半导体激光元件40相反的一侧设置隔离物。作为隔离物,可以是较坚硬的绝缘性材料,也可以设为使电极块60(260)的下表面突出的形状,由绝缘性材料覆盖。
此外,在全部实施方式以及变形例中,利用连接孔12、13、61、62,通过绝缘性螺钉90、导电性螺钉91以及绝缘部件92来将上下的电极块固定。但是,也可以通过绝缘层30或130的粘合来将上下的电极块固定,还可以使用其它的粘合剂来将上下的块固定。
此外,在全部实施方式以及变形例中,使凸块50陷入于金属片70并将负电极42(142)与金属层80连接,但也可以仅通过金属片70,将负电极42(142)与金属层80连接。
此外,半导体激光元件40、功率半导体元件140也可以将正电极41(141)设为上方,将负电极42(142)设为下方。
产业上的可利用性
根据本公开,通过在凸块与第2电极块之间设置金属层以及金属片,能够缓和基于半导体元件与第2电极块的膨胀率的差异所引起的应力,并且稳定地确保半导体元件与第2电极块的电连接,作为使用了高电流的半导体装置在产业上有用。
-符号说明-
1、3 半导体激光装置
2、4 功率半导体装置
10、60、110、160、210、260、310、360 电极块
11、111、261、361 凹部
12、13、61、62 连接孔
14、63 端子孔
20 辅助基座
30、31、32、130 绝缘层
40 半导体激光元件
41、141 正电极
42、142 负电极
50 凸块
70 金属片
80 金属层
90 绝缘性螺钉
91 导电性螺钉
92 绝缘部件
140 功率半导体元件
900 半导体激光装置
901 散热片
902 辅助基座
903 LD杆
904 绝缘层
905 凸块
906 电极
907 填充材料

Claims (10)

1.一种半导体装置,具备:
第1电极块,具有导电性;
辅助基座,被设置于所述第1电极块的上表面的第1区域,电连接于所述第1电极块,具有导电性;
绝缘层,被设置于所述第1电极块的上表面且与所述第1区域不同的第2区域;
半导体元件,被设置于所述辅助基座之上,具有电连接于所述辅助基座的第1电极;
凸块,被设置于所述半导体元件的与所述第1电极相反的一侧的第2电极的上表面,电连接于所述第2电极,具有导电性;和
第2电极块,被设置于所述凸块以及所述绝缘层之上,具有导电性,
所述第2电极块的下表面在第3区域,经由具有导电性的金属层来电连接于所述凸块,
所述第2电极块的下表面在第4区域,被搭载于所述绝缘层,
在所述金属层与所述凸块之间,设置具有导电性的金属片。
2.根据权利要求1所述的半导体装置,其中,
所述金属层与所述第3区域接合。
3.根据权利要求1所述的半导体装置,其中,
所述金属层在所述第3区域镀敷生长。
4.根据权利要求1~3的任意一项所述的半导体装置,其中,
所述半导体元件是输出激光的半导体激光元件,
所述第1区域是所述第1电极块的上表面的端部,
所述第2区域“コ”字状地包围所述第1区域。
5.根据权利要求1~3的任意一项所述的半导体装置,其中,
所述半导体元件是被输入60V以上的高电压的功率半导体元件,
所述第1区域是所述第1电极块的上表面的中央部,
所述第2区域包围所述第1区域的整个周围。
6.根据权利要求1~5的任意一项所述的半导体装置,其中,
所述第1区域的所述第1电极块的上表面比所述第2区域的所述第1电极的上表面低,
所述第2电极块的下表面是平面。
7.根据权利要求1~5的任意一项所述的半导体装置,其中,
所述第1电极块的上表面是平面,
所述第3区域的所述第2电极块的下表面比所述第4区域的所述第2电极的下表面高。
8.根据权利要求1~7的任意一项所述的半导体装置,其中,
所述金属片的主要材料是金。
9.根据权利要求1~8的任意一项所述的半导体装置,其中,
所述凸块的主要材料是金。
10.根据权利要求1~9的任意一项所述的半导体装置,其中,
所述金属层的主要材料是金。
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Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP3651292B1 (en) 2017-07-07 2021-06-23 Panasonic Intellectual Property Management Co., Ltd. Semiconductor laser device
JP7174899B2 (ja) * 2017-07-07 2022-11-18 パナソニックIpマネジメント株式会社 半導体レーザ装置
CN112154580A (zh) * 2018-05-21 2020-12-29 松下知识产权经营株式会社 半导体激光装置
WO2020044882A1 (ja) * 2018-08-29 2020-03-05 パナソニック株式会社 半導体レーザ装置
JP7228856B2 (ja) * 2018-10-15 2023-02-27 パナソニックIpマネジメント株式会社 高パワーレーザシステムにおける熱インタフェース材料のポンピングの対処のためのシステム及び方法
JP2021034654A (ja) * 2019-08-28 2021-03-01 パナソニックIpマネジメント株式会社 レーザ装置
CN114846705A (zh) 2019-12-23 2022-08-02 松下知识产权经营株式会社 激光装置
US20230033309A1 (en) * 2020-02-21 2023-02-02 Panasonic Holdings Corporation Semiconductor laser device
JP7386408B2 (ja) 2020-02-27 2023-11-27 パナソニックIpマネジメント株式会社 半導体レーザ装置
WO2021024046A1 (ru) * 2020-04-16 2021-02-11 Владимир ВАХ Узел прибора терморегуляции полупроводникового лазера
WO2023008038A1 (ja) * 2021-07-27 2023-02-02 パナソニックIpマネジメント株式会社 レーザモジュール

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003086883A (ja) * 2001-09-10 2003-03-20 Sony Corp 半導体レーザ装置
US20090111206A1 (en) * 1999-03-30 2009-04-30 Daniel Luch Collector grid, electrode structures and interrconnect structures for photovoltaic arrays and methods of manufacture
CN102201401A (zh) * 2010-03-23 2011-09-28 三垦电气株式会社 半导体装置
US20130058367A1 (en) * 2011-08-29 2013-03-07 Intellectual Light, Inc. Mount for Semiconductor Devices Using Conformable Conductive Layers, and Method
US20140042616A1 (en) * 2012-08-09 2014-02-13 Shinko Electric Industries Co., Ltd. Semiconductor device

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL291606A (zh) * 1962-04-18
JPH081914B2 (ja) * 1987-03-31 1996-01-10 株式会社東芝 圧接型半導体装置
JPH10135446A (ja) * 1996-10-30 1998-05-22 Hitachi Ltd 圧接型半導体装置
WO1998030073A1 (en) * 1996-12-27 1998-07-09 Matsushita Electric Industrial Co., Ltd. Method and device for mounting electronic component on circuit board
US5929521A (en) * 1997-03-26 1999-07-27 Micron Technology, Inc. Projected contact structure for bumped semiconductor device and resulting articles and assemblies
JP2002118137A (ja) * 2000-07-31 2002-04-19 Nichia Chem Ind Ltd 半導体発光素子チップとそのバンプ形成方法及びその半導体発光素子チップを用いたディスプレイとセグメント表示部
US6700913B2 (en) * 2001-05-29 2004-03-02 Northrop Grumman Corporation Low cost high integrity diode laser array
US7215690B2 (en) * 2004-08-04 2007-05-08 Monocrom, S.L. Laser module
JP2006303100A (ja) * 2005-04-19 2006-11-02 Sumitomo Electric Ind Ltd 半導体装置及びその製造方法
JP4854571B2 (ja) * 2007-04-06 2012-01-18 三菱電機株式会社 半導体レーザ装置
JP2008283064A (ja) * 2007-05-11 2008-11-20 Sony Corp 半導体レーザ装置
JPWO2010131498A1 (ja) * 2009-05-12 2012-11-01 三菱電機株式会社 レーザダイオード素子
DE102009040835A1 (de) * 2009-09-09 2011-03-10 Jenoptik Laserdiode Gmbh Verfahren zum thermischen Kontaktieren einander gegenüberliegender elektrischer Anschlüsse einer Halbleiterbauelement-Anordnung
JP2011199165A (ja) * 2010-03-23 2011-10-06 Renesas Electronics Corp 半導体装置及び半導体装置の製造方法
US20130069218A1 (en) * 2011-09-20 2013-03-21 Stmicroelectronics Asia Pacific Pte Ltd. High density package interconnect with copper heat spreader and method of making the same
CN103931063B (zh) 2011-11-10 2017-04-19 西铁城时计株式会社 光集成设备
EP2665095A1 (en) * 2012-05-16 2013-11-20 GE Energy Power Conversion UK Limited Power electronic devices

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20090111206A1 (en) * 1999-03-30 2009-04-30 Daniel Luch Collector grid, electrode structures and interrconnect structures for photovoltaic arrays and methods of manufacture
JP2003086883A (ja) * 2001-09-10 2003-03-20 Sony Corp 半導体レーザ装置
CN102201401A (zh) * 2010-03-23 2011-09-28 三垦电气株式会社 半导体装置
US20130058367A1 (en) * 2011-08-29 2013-03-07 Intellectual Light, Inc. Mount for Semiconductor Devices Using Conformable Conductive Layers, and Method
US20140042616A1 (en) * 2012-08-09 2014-02-13 Shinko Electric Industries Co., Ltd. Semiconductor device

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