CN102201401A - 半导体装置 - Google Patents

半导体装置 Download PDF

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CN102201401A
CN102201401A CN2010101951561A CN201010195156A CN102201401A CN 102201401 A CN102201401 A CN 102201401A CN 2010101951561 A CN2010101951561 A CN 2010101951561A CN 201010195156 A CN201010195156 A CN 201010195156A CN 102201401 A CN102201401 A CN 102201401A
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lead terminal
heating panel
semiconductor chip
terminal
lead
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CN102201401B (zh
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志贺利贵
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Sanken Electric Co Ltd
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Abstract

本发明提供半导体装置。其课题在于低成本地得到减小了噪声的不良影响从而提高了可靠性的半导体装置。引线端子(21～24)均作为功率半导体芯片(11)中与流过开关电流的主电极的一方连接的端子(D)。设置在第2侧面侧的引线端子(25)作为与该主电极的另一方连接的端子(S)。设置在第2侧面侧的引线端子(28)是输入控制用IC芯片(12)的控制信号的端子(FB)。设置在引线端子(25)与引线端子(28)之间的引线端子(26、27)分别是端子(Vcc)、端子(GND)。在该结构中，引线端子(26)及与其相连的键合线(50)所处的场所、以及引线端子(27)及与其相连的第2散热板(32)所处的场所的电位恒定，发挥抑制开关噪声传播的噪声屏蔽的功能。

Description

半导体装置
技术领域
本发明涉及将2个半导体芯片一起内置在封装中的结构的半导体装置。
背景技术
在装有进行大电流开关动作或整流的功率半导体元件(整流用二极管、功率MOSFET、IGBT等)的功率半导体模块中，功率半导体元件在工作中的发热量很大。因此，在将形成有这种功率半导体元件的半导体芯片内置在封装中的功率半导体模块中，往往采用将安全地控制功率半导体元件的控制用IC芯片一起进行内置的方式。在这样的情况下，例如在控制用IC芯片中安装有温度传感器，当功率半导体元件的发热量变大时，进行自动将其切断的控制。由此，能够提高进行大功率动作的功率半导体模块的安全性和可靠性。
例如在专利文献1等中对这样的功率半导体模块的形式进行了记载。这里，对于SIP(Single Inline Package：单列直插封装)，采用在同一散热板上接触地安装功率半导体芯片和内置有温度传感器的控制用IC的结构，由此，利用控制用IC芯片迅速且准确地检测功率半导体芯片的温度上升，可靠地进行其控制。
另外，在这样的半导体模块中，与功率半导体芯片连接的各端子将被施加高电压，且在端子之间流过大电流。因此，要求这些端子之间具有高耐压性和高绝缘性，从而还存在其布局自由度降低的问题。针对于此，在专利文献2中，记载了按如下方式配置的功率半导体模块，即：针对在DIP(Dual Inline Package：双列直插封装)的左右侧面上形成的引线端子，在一个侧面上将引线端子形成在高侧(high-side)，在另一个侧面上将引线端子形成在低侧(1ow-side)。
使用这些技术，能够得到安全性及可靠性高的功率半导体模块。
专利文献1：日本特开2005-44958号公报
专利文献2：日本特开2008-125315号公报
如上所述，功率半导体元件是在高电压(例如400V以上)下来驱动的，然而，控制用IC(控制用IC芯片)通常在比其低数V的电压下工作。即，功率半导体芯片与控制用IC芯片虽然是彼此靠近地设置在同一封装内，但其工作电压相差很大。
这里，在功率半导体芯片中，由于是在该高电压下进行反复通断的动作，因此，处于容易产生开关噪声的状态。另一方面，如果该开关噪声混入到在低电压下工作的控制用IC芯片中的控制电路中，则有时会出现误动作。在使功率半导体模块小型化、从而减小了功率半导体芯片与控制用IC芯片之间的间隔的情况下，这种误动作尤为显著。在专利文献1记载的技术中，由于功率半导体芯片与控制用IC芯片是在相接触的状态下配置的，因此该影响特别大。另外，在专利文献2记载的技术中，也未能降低该开关噪声的不良影响。
为了抑制由这种噪声引起的误动作，例如，再设置一个用于对控制用IC芯片进行屏蔽使其不受该噪声影响的构造，是有效的方法。但是，根据该方法，该功率半导体芯片的制造工序变得复杂，或者，由于需要另外设置上述结构，因此，很难实现该功率半导体芯片的小型化。
即，很难低成本地得到降低了噪声的不良影响而提高了可靠性的半导体装置。
发明内容
本发明正是鉴于这样的问题而完成的，其目的在于提供解决上述问题的发明。
为了解决上述课题，本发明采用下述结构。
本发明的半导体装置具有：第1散热板；与该第1散热板分离配置的第2散热板；多个第1引线端子，其配置在所述第1散热板的第1侧面侧；第2引线端子，其配置在所述第1散热板的位于所述第1侧面相反侧的第2侧面侧；多个第3引线端子，其配置在所述第2侧面侧的、比所述第2引线端子更靠近所述第2散热板的一侧；第1半导体芯片，其安装在所述第1散热板的主面上，对与高电压相连的负载进行开关，且具有流过开关动作中的主电流的1对主电极；第2半导体芯片，其安装在所述第2散热板的主面上，控制所述第1半导体芯片的开关动作，且在比所述第1半导体芯片低的电压下工作；以及塑封材料，其覆盖所述第1散热板、所述第2散热板、所述第1引线端子的一部分、所述第2引线端子的一部分、所述第3引线端子的一部分、所述第1半导体芯片以及所述第2半导体芯片，所述第1引线端子与所述第2引线端子及所述第3引线端子分别从所述塑封材料的1对侧面，向彼此相反的方向引出，该半导体装置的特征在于，所述第1散热板具有延伸部，该延伸部在所述第1引线端子的排列方向上，向设置所述第2散热板的一侧延伸，所述多个第1引线端子中的至少一部分连结在所述第1散热板上，所述第1半导体芯片的1对主电极中输入高电压的一侧的主电极与所述第1引线端子连接，所述第1半导体芯片的1对主电极中输入接近于接地电位的电压的一侧的主电极与所述第2引线端子连接，所述第2半导体芯片的电极与所述第3引线端子连接。
本发明的半导体装置的特征在于，所述多个第3引线端子包括：输入所述第2半导体芯片的电源电压的引线端子；输入接地电位的引线端子；以及输入控制所述第2半导体芯片的动作的控制信号的引线端子。
本发明的半导体装置的特征在于，在所述第1散热板的所述第2侧面侧，从所述第2引线端子侧观察，输入所述电源电压的引线端子和输入所述接地电位的引线端子中的至少一个相比于输入所述控制信号的引线端子，被配置在更近的一侧。
本发明由于按以上方式构成，因此能够以低成本地得到降低了噪声的不良影响从而提高了可靠性的半导体装置。
附图说明
图1是由本发明的实施方式的半导体模块构成的电路图的一例。
图2是示出本发明的实施方式的半导体模块结构的、从上面观察的透视图。
图3是本发明的实施方式的半导体模块的外观立体图。
标号说明
10功率半导体模块(半导体装置)；11功率半导体芯片(第1半导体芯片)；12控制用IC芯片(第2半导体芯片)；21～24第1引线端子(引线端子)；25第2引线端子(引线端子)；26～28第3引线端子(引线端子)；31散热板(第1散热板)；31A延伸部；32散热板(第2散热板)；50键合线；60温度传感器；100塑封(mold)材料；111、112、121～125键合焊盘。
具体实施方式
下面，作为本发明的实施方式的半导体装置，对功率半导体模块进行说明。该半导体模块在封装中，将2个半导体芯片(功率半导体芯片和控制用IC芯片)分别安装在独立的散热板上，且整体被密封在塑封材料中。
图1是使用该半导体模块10实现的电源电路(例如待机用电源电路)的一例。在该电路中，由单点划线围起的区域对应于该半导体模块10，其中包含功率半导体芯片(第1半导体芯片)11和控制用IC芯片(第2半导体芯片)12。在该电路中，对右上方标记的负载施加输出电压Vo。
功率半导体芯片(第1半导体芯片)11例如由整流用二极管、功率-MOSFET、IGBT(Insulated Gate Bipolar Transistor：绝缘栅型双极晶体管)等构成，端子D与连接于高电压的负载的一端连接。端子S被设为接近于接地电位的电位。通过向功率半导体芯片11的作为控制端子的栅极提供控制信号，使功率半导体芯片11进行通断动作，控制作为1对主电极的端子D与端子S之间的开关电流。这里，控制用IC芯片12向功率半导体芯片11的栅极提供控制信号，控制其开关电流。
为了对功率半导体芯片11进行控制，控制用IC芯片(第2半导体芯片)12具有用于检测功率半导体芯片11的温度上升的功能。因此，当这里检测到的温度上升高于规定温度时，形成在控制用IC芯片12内的控制电路进行将功率半导体芯片11强制切断的控制。在端子Vcc与端子GND(接地)之间施加用于使控制用IC芯片12工作的电源电压。端子FB是向用于控制功率半导体芯片11的通断动作的控制用IC芯片12施加反馈信号的端子。这里，反馈信号例如是为了使与功率半导体芯片11的端子D连接的负载的输出电压Vo恒定，而从与负载的输出端子连接的误差放大器提供的反馈信号。
因此，在该半导体模块10中，需要D、S、Vcc、FB、GND这5个端子，这些端子被分配给各引线端子。这里，在该半导体模块中，在作为功率半导体芯片11的1对主电极的端子D与端子S之间，被施加最高的电压，流过最大的电流。
图2是从上侧观察该半导体模块(半导体装置)10的透视图。这里，图中用虚线包围的矩形区域对应于由树脂构成的塑封材料。在塑封材料外侧，分别沿着相反方向，从其一个侧面引出4个引线端子21～24，从另一个侧面引出4个引线端子25～28。即，该半导体模块10为DIP(DualInline Package)。
另外，图3是该半导体模块10的外观立体图。如图所示，半导体模块10对从塑封材料100引出的引线端子实施了引线成形(弯折加工)，各引线端子的前端部可插入到印制基板上的通孔中，而且可通过焊接固定到印制基板上。
如图2所示，在该半导体模块10中，使用了2个散热板31、32。在面积大的散热板(第1散热板)31上安装着功率半导体芯片(第1半导体芯片)11，在面积小的散热板(第2散热板)32上安装着控制用IC芯片(第2半导体芯片)12。
这里使用的引线端子21～28在其功能上可划分为第1引线端子(引线端子21～24)、第2引线端子(引线端子25)以及第3引线端子(引线端子26～28)。
第1散热板31具有延伸部31A，该延伸部31A在第1引线端子(引线端子21～24)的排列方向上，向设置第2散热板32的一侧延伸。因此，在图2中，第1散热板31的形成在第1侧面(右侧面)与第2侧面(左侧面)之间的边a靠近于第2散热板32的边c，且与其相对，第1散热板31的构成延伸部31A的边b靠近于第2散热板32的边d，且与其相对。另外，作为延伸部31A的前端部的边e与第2散热板32的位于边c相反侧的边f，大致处于同一直线上。利用这样的结构，能够提高功率半导体芯片11的散热效率，且能够使控制用IC芯片12更准确地检测温度上升。
不过，作为延伸部31A的前端部的边e不是必须与第2散热板32的边f处于同一直线上。例如，只要采用如下方式配置延伸部31A，即可起到相同的效果，即：延伸部31A在沿着第1散热板31的第1侧面(右侧面)的方向上，至少延伸到安装着控制用IC芯片12的第2散热板32的边d的形成位置处，且在延伸部31A与该边d之间隔有间隙。
另外，在第1散热板31上，设置在第1侧面(右侧面)侧的第1引线端子(引线端子21～24)与该第1散热板31连结成一体，而第1侧面的相反侧的第2侧面(左侧面)的第2引线端子、第3引线端子(引线端子25～28)没有连结在第1散热板31上。
第2散热板32采用了沿着该第2侧面(左侧面)侧设置的形式。在第2散热板32上，连结着作为多个第3引线端子之一的引线端子27，但未与第1引线端子(引线端子21～24)连结在一起。
另外，散热板31、32、各引线端子是通过对单个金属板进行构图而制成的。该金属板由导电率及导热率高的铜或铜合金构成。
在功率半导体芯片11的正面，设有与其内部元件连接的键合焊盘111、112。在控制用芯片12的正面，同样设有键合焊盘121～125。与功率半导体芯片11、控制用IC芯片12之间的电连接是通过将键合线与这些键合焊盘连接来进行的。在图2中，分别利用键合线50，将键合焊盘111与引线端子25及键合焊盘122、键合焊盘112与键合焊盘121、键合焊盘123与引线端子26、键合焊盘124与第1散热板31、键合焊盘125与引线端子28连接起来。另外，功率半导体芯片11的背面(与第1散热板31接触的面)与第1散热板31也被电连接。另外，还可以将控制用IC芯片12的背面(与第2散热板32接触的一侧的面)与第2散热板32电连接。另外，像焊盘111与引线端子25之间那样，在大电流流经的场所，使用了多条键合线50。
在该半导体模块10中，所有第1引线端子(引线端子21～24)均作为功率半导体芯片11的与流过开关电流的主电极中的一方连接的端子D。另外，设置在第2侧面侧的第2引线端子(引线端子25)作为与该主电极中的另一方连接的端子S。
另外，作为设置在第2侧面侧的第3引线端子之一的引线端子28是输入控制用IC芯片12的控制信号的端子FB。设置在引线端子25与引线端子28之间的引线端子26、27分别为端子Vcc、端子GND。它们分别用于施加使控制用IC芯片12工作的电源电压。
在该半导体模块10中，在功率半导体芯片11内，会由于在作为主电极的端子D与端子S之间流过的开关电流而产生开关噪声。虽然端子D与端子S未与控制用IC芯片12直接连接，但有时开关噪声通过在空间中(塑封材料100中)进行传播而到达形成在控制用IC芯片12中的控制电路。或者，在该开关噪声混入到施加给端子FB的控制信号中的情况下，有时会引起误动作。
在上述结构中，端子D(引线端子21～24)被设定为与第1散热板31相同的电位，端子S(引线端子25)被设定为与引线焊盘111及和其相连的键合线50相同的电位。它们可能成为开关噪声的振荡源。
在图2的结构中，在这些端子与控制用IC芯片12之间，设置了端子Vcc(引线端子26)及与其相连的键合线50、以及端子GND(引线端子27)及与其相连的第2散热板32。端子GND被接地，端子Vcc被施加恒定的低电压作为电源电压。另外，如图1所示，一般在端子Vcc与端子GND之间设有旁路电容器C3。因此，在图2的结构中，引线端子26及与其相连的键合线50所处的场所、以及引线端子27及与其相连的第2散热板32所处的场所的电位是恒定的，从而发挥抑制开关噪声传播的噪声屏蔽的功能。由它们对设置在左侧面下端部(另一端部)的引线端子28(端子FB)进行了屏蔽，因此，抑制了该开关噪声混入到控制用IC芯片12的控制信号中。另外，分开设置第1散热板31与第2散热板32也有助于抑制该开关噪声的传播。
另外，在这样的结构中，噪声最容易混入到控制用IC芯片12的控制信号中的场所是与引线端子28(端子FB)连接的键合线50。针对于此，在图2的结构中，由于能够减小控制用IC芯片12(键合焊盘125)与引线端子28之间的间隔，因此，能够缩短与它们连接的键合线50。因此，能够减少从此处混入的噪声。该噪声不限于上述开关噪声，还包含在该半导体模块10外部产生的噪声，例如因雷电或商用交流电源等产生的噪声。另外，这种来自于外部的噪声容易混入到面积大的第1散热板31侧，在该情况下，对该噪声进行的屏蔽与上述开关噪声的情况相同。因此，在上述结构中，针对在该半导体模块内部产生的噪声以及在其外部产生的噪声双方，均能够得到很高的抗噪性。
在上述结构中，没有另外设置噪声屏蔽等的结构物，而只是通过设计散热板以及引线端子的结构，即实现了上述功能。即，能够低成本地得到可靠性高的半导体模块。
另外，在上述例子中，将功率半导体芯片设为第1半导体芯片，将控制功率半导体芯片的控制用IC芯片设为第2半导体芯片，但本发明并不限于这种情况。只要是具有以下结构的半导体模块(半导体装置)，则显然会起到相同的效果，所述结构是：将可能成为噪声源的半导体芯片设为第1半导体芯片，将作为用于抑制该噪声混入的对象的半导体芯片设为第2半导体芯片，并将它们封入到同一封装中。
另外，在与作为噪声源的功率半导体芯片11相连的引线端子和输入控制用IC芯片的控制信号的端子FB之间，设置了施加接地电位或恒定电位的引线端子。在上述情况下，端子GND和端子Vcc均相当于上述引线端子，但在仅配置它们中的一个的情况下，也能够起到相同的效果。另外，在配置这二者的情况下，无论二者的配置顺序如何，都能起到相同的效果。另外，在将上述引线端子的排列中的左右或上下关系颠倒的情况下，显然也是相同的。
即，通过采用这样的结构，在内置有2个半导体芯片的结构的半导体模块中，能够降低因噪声引起的不良影响。
另外，图2的结构是引线端子的结构为左右对称的DIP，不过，两个侧面的结构也可以是不对称的。
另外，在图2的结构中，在第1半导体芯片是发热量大的功率半导体芯片的情况下，从降低噪声影响以外的方面来看，还可以提高该半导体模块的安全性及可靠性。下面，对这一点进行说明。
在图2的结构中，由功率半导体芯片11发出的热量是通过传递到第1散热板31来进行散热，而此时，还通过与第1散热板31相连且如图3所示引出到外部的引线端子21～24来散热。因此，利用图2的结构，能够得到高散热效率，能够抑制功率半导体芯片11的温度上升。另外，控制用IC芯片12是通常的IC芯片，从其动作方面考虑，希望其不处于高温状态。在图2的结构中，能够降低散热板31、32整体的温度，因此，对于控制用12芯片12的动作也是十分理想的。
另一方面，为了提高该半导体模块10的安全性，还需要使设置在控制用IC芯片12内的温度传感器60能够敏感地检测功率半导体芯片11或第1散热板31的温度上升。为此，有效的方法是，将位于第2散热板32上的温度传感器60设置在控制用IC芯片12的靠第1散热板31的一侧。因此，特别优选的是，使图2中的第1散热板31的边a与第2散热板32的边c彼此接近，或者，使第1散热板31的边b与第2散热板32的边d彼此接近，并且，将温度传感器60设置在与边c或边d接近的位置处。利用这样的结构，控制用IC芯片12能够特别安全地控制功率半导体芯片11。即，能够提高该半导体模块10的安全性。
另外，第2散热板的形状是任意的。只要是能够构成上述结构的半导体模块且能够与上述结构的第1散热板组合的形状即可。例如，也可以将第2散热板的形状设为圆形、半圆形等形状。关于第1散热板的形状，只要其1个顶点的周围的形状与该第2散热板的形状相匹配即可。
另外，在上述例子中，分别将功率半导体芯片(第1半导体芯片)、控制用IC芯片(第2半导体芯片)安装在各散热板上，但还可以同时将其它芯片安装在各散热板上。在该情况下，优选将可能成为噪声源的半导体芯片安装在第1散热板上，将用于抑制噪声影响的半导体芯片安装在第2散热板上。

Claims (3)

1.一种半导体装置，该半导体装置具有：
第1散热板；
与该第1散热板分离配置的第2散热板；
多个第1引线端子，其配置在所述第1散热板的第1侧面侧；
第2引线端子，其配置在所述第1散热板的位于所述第1侧面相反侧的第2侧面侧；
多个第3引线端子，其配置在所述第2侧面侧的、比所述第2引线端子更靠近所述第2散热板的一侧；
第1半导体芯片，其安装在所述第1散热板的主面上，针对与高电压相连的负载，进行开关动作，且具有流过开关动作中的主电流的1对主电极；
第2半导体芯片，其安装在所述第2散热板的主面上，控制所述第1半导体芯片的开关动作，且在比所述第1半导体芯片低的电压下工作；以及
塑封材料，其覆盖所述第1散热板、所述第2散热板、所述第1引线端子的一部分、所述第2引线端子的一部分、所述第3引线端子的一部分、所述第1半导体芯片以及所述第2半导体芯片，
所述第1引线端子与所述第2引线端子及所述第3引线端子分别从所述塑封材料的1对侧面，向彼此相反的方向引出，
该半导体装置的特征在于，
所述第1散热板具有延伸部，该延伸部在所述第1引线端子的排列方向上，向设置所述第2散热板的一侧延伸，
所述多个第1引线端子中的至少一部分连结在所述第1散热板上，
所述第1半导体芯片的1对主电极中输入高电压的一侧的主电极与所述第1引线端子连接，所述第1半导体芯片的1对主电极中输入接近于接地电位的电压的一侧的主电极与所述第2引线端子连接，所述第2半导体芯片的电极与所述第3引线端子连接。
2.根据权利要求1所述的半导体装置，其特征在于，
所述多个第3引线端子包括：
输入所述第2半导体芯片的电源电压的引线端子；输入接地电位的引线端子；以及输入控制所述第2半导体芯片的动作的控制信号的引线端子。
3.根据权利要求2所述的半导体装置，其特征在于，
在所述第1散热板的所述第2侧面侧，从所述第2引线端子侧观察，输入所述电源电压的引线端子和输入所述接地电位的引线端子中的至少一个相比于输入所述控制信号的引线端子，被配置在更近的一侧。
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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105789164A (zh) * 2016-03-03 2016-07-20 北京兆易创新科技股份有限公司 一种系统级封装结构
CN106797105A (zh) * 2014-12-26 2017-05-31 松下知识产权经营株式会社 半导体装置
CN108369955A (zh) * 2016-03-29 2018-08-03 密克罗奇普技术公司 用于场效应晶体管的经组合源极与基极触点

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9711437B2 (en) 2010-12-13 2017-07-18 Infineon Technologies Americas Corp. Semiconductor package having multi-phase power inverter with internal temperature sensor
CN103367325A (zh) * 2012-04-03 2013-10-23 鸿富锦精密工业（深圳）有限公司 具触觉效果的电子元件
JPWO2014064822A1 (ja) * 2012-10-26 2016-09-05 株式会社日立産機システム パワー半導体モジュールおよびこれを搭載した電力変換装置
EP2779227A3 (en) * 2013-03-13 2017-11-22 International Rectifier Corporation Semiconductor package having multi-phase power inverter with internal temperature sensor
US20170133316A1 (en) * 2015-09-25 2017-05-11 Tesla Motors, Inc. Semiconductor device with stacked terminals
CN107465783B (zh) * 2017-09-20 2019-07-12 Oppo广东移动通信有限公司 主板以及移动终端
DE102017126044A1 (de) * 2017-11-08 2019-05-09 HELLA GmbH & Co. KGaA Schaltungsanordnung einer Leuchteinheit eines Scheinwerfers für ein Fahrzeug

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6137165A (en) * 1999-06-25 2000-10-24 International Rectifier Corp. Hybrid package including a power MOSFET die and a control and protection circuit die with a smaller sense MOSFET
JP2003174142A (ja) * 2001-12-05 2003-06-20 Shindengen Electric Mfg Co Ltd マルチチップ半導体装置
US6593622B2 (en) * 2001-05-02 2003-07-15 International Rectifier Corporation Power mosfet with integrated drivers in a common package
CN1526165A (zh) * 2001-05-15 2004-09-01 Gem 经过改良的表面固定包装
US20050269674A1 (en) * 2004-06-03 2005-12-08 Denso Corporation Semiconductor equipment having multiple semiconductor devices and multiple lead frames
US20070278516A1 (en) * 2006-05-30 2007-12-06 Renesas Technology Corp. Semiconductor device and power source unit using the same

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2708320B2 (ja) * 1992-04-17 1998-02-04 三菱電機株式会社 マルチチップ型半導体装置及びその製造方法
JP3299421B2 (ja) * 1995-10-03 2002-07-08 三菱電機株式会社 電力用半導体装置の製造方法およびリードフレーム
JP3941266B2 (ja) 1998-10-27 2007-07-04 三菱電機株式会社 半導体パワーモジュール
TW521416B (en) * 2000-05-24 2003-02-21 Int Rectifier Corp Three commonly housed diverse semiconductor dice
US6841852B2 (en) * 2002-07-02 2005-01-11 Leeshawn Luo Integrated circuit package for semiconductor devices with improved electric resistance and inductance
US7061077B2 (en) * 2002-08-30 2006-06-13 Fairchild Semiconductor Corporation Substrate based unmolded package including lead frame structure and semiconductor die
JP3989417B2 (ja) * 2003-07-28 2007-10-10 シャープ株式会社 電源用デバイス
JP5191689B2 (ja) * 2006-05-30 2013-05-08 ルネサスエレクトロニクス株式会社 半導体装置
JP2009038956A (ja) 2008-03-24 2009-02-19 Sharp Corp 出力制御装置

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6137165A (en) * 1999-06-25 2000-10-24 International Rectifier Corp. Hybrid package including a power MOSFET die and a control and protection circuit die with a smaller sense MOSFET
US6593622B2 (en) * 2001-05-02 2003-07-15 International Rectifier Corporation Power mosfet with integrated drivers in a common package
CN1526165A (zh) * 2001-05-15 2004-09-01 Gem 经过改良的表面固定包装
JP2003174142A (ja) * 2001-12-05 2003-06-20 Shindengen Electric Mfg Co Ltd マルチチップ半導体装置
US20050269674A1 (en) * 2004-06-03 2005-12-08 Denso Corporation Semiconductor equipment having multiple semiconductor devices and multiple lead frames
US20070278516A1 (en) * 2006-05-30 2007-12-06 Renesas Technology Corp. Semiconductor device and power source unit using the same

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106797105A (zh) * 2014-12-26 2017-05-31 松下知识产权经营株式会社 半导体装置
CN106797105B (zh) * 2014-12-26 2019-10-01 松下知识产权经营株式会社 半导体装置
CN105789164A (zh) * 2016-03-03 2016-07-20 北京兆易创新科技股份有限公司 一种系统级封装结构
CN108369955A (zh) * 2016-03-29 2018-08-03 密克罗奇普技术公司 用于场效应晶体管的经组合源极与基极触点

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