JP2021101452A - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
- Publication number
- JP2021101452A JP2021101452A JP2019232931A JP2019232931A JP2021101452A JP 2021101452 A JP2021101452 A JP 2021101452A JP 2019232931 A JP2019232931 A JP 2019232931A JP 2019232931 A JP2019232931 A JP 2019232931A JP 2021101452 A JP2021101452 A JP 2021101452A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- contact
- semiconductor device
- insulating member
- drain
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 78
- 229910052710 silicon Inorganic materials 0.000 claims description 14
- 239000010703 silicon Substances 0.000 claims description 14
- 230000001154 acute effect Effects 0.000 claims description 6
- 239000010410 layer Substances 0.000 description 169
- 239000012535 impurity Substances 0.000 description 18
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 12
- 239000000758 substrate Substances 0.000 description 10
- 239000011229 interlayer Substances 0.000 description 6
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 5
- 230000005684 electric field Effects 0.000 description 5
- 229910052814 silicon oxide Inorganic materials 0.000 description 5
- BOTDANWDWHJENH-UHFFFAOYSA-N Tetraethyl orthosilicate Chemical compound CCO[Si](OCC)(OCC)OCC BOTDANWDWHJENH-UHFFFAOYSA-N 0.000 description 4
- 238000005229 chemical vapour deposition Methods 0.000 description 4
- 238000000034 method Methods 0.000 description 4
- 230000000694 effects Effects 0.000 description 3
- 239000002994 raw material Substances 0.000 description 3
- 230000003647 oxidation Effects 0.000 description 2
- 238000007254 oxidation reaction Methods 0.000 description 2
- 238000000151 deposition Methods 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 1
- 230000001590 oxidative effect Effects 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7833—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's
- H01L29/7835—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's with asymmetrical source and drain regions, e.g. lateral high-voltage MISFETs with drain offset region, extended drain MISFETs
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7816—Lateral DMOS transistors, i.e. LDMOS transistors
- H01L29/7825—Lateral DMOS transistors, i.e. LDMOS transistors with trench gate electrode
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0642—Isolation within the component, i.e. internal isolation
- H01L29/0649—Dielectric regions, e.g. SiO2 regions, air gaps
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0642—Isolation within the component, i.e. internal isolation
- H01L29/0649—Dielectric regions, e.g. SiO2 regions, air gaps
- H01L29/0653—Dielectric regions, e.g. SiO2 regions, air gaps adjoining the input or output region of a field-effect device, e.g. the source or drain region
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0657—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/08—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/0843—Source or drain regions of field-effect devices
- H01L29/0847—Source or drain regions of field-effect devices of field-effect transistors with insulated gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/1025—Channel region of field-effect devices
- H01L29/1029—Channel region of field-effect devices of field-effect transistors
- H01L29/1033—Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure
- H01L29/1041—Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure with a non-uniform doping structure in the channel region surface
- H01L29/1045—Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure with a non-uniform doping structure in the channel region surface the doping structure being parallel to the channel length, e.g. DMOS like
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/1095—Body region, i.e. base region, of DMOS transistors or IGBTs
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/402—Field plates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/408—Electrodes ; Multistep manufacturing processes therefor with an insulating layer with a particular dielectric or electrostatic property, e.g. with static charges or for controlling trapped charges or moving ions, or with a plate acting on the insulator potential or the insulator charges, e.g. for controlling charges effect or potential distribution in the insulating layer, or with a semi-insulating layer contacting directly the semiconductor surface
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42356—Disposition, e.g. buried gate electrode
- H01L29/4236—Disposition, e.g. buried gate electrode within a trench, e.g. trench gate electrode, groove gate electrode
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42372—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out
- H01L29/42376—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out characterised by the length or the sectional shape
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66674—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/66681—Lateral DMOS transistors, i.e. LDMOS transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7816—Lateral DMOS transistors, i.e. LDMOS transistors
- H01L29/7823—Lateral DMOS transistors, i.e. LDMOS transistors with an edge termination structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
- H01L29/0692—Surface layout
- H01L29/0696—Surface layout of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Electrodes Of Semiconductors (AREA)
Abstract
Description
先ず、第1の実施形態について説明する。
図1は、本実施形態に係る半導体装置を示す断面図である。
なお、図1は模式的なものであり、構成要素は適宜省略又は誇張されている。後述する図2、図3(a)及び(b)についても、同様である。
先ず、シリコン基板10の上面にシリコンをエピタキシャル成長させて、エピタキシャル層11を形成する。次に、例えばドライエッチング法により、エピタキシャル層11の上面にテーパ状の凹部36を形成する。次に、熱酸化処理を施して、エピタキシャル層11の表面を酸化する。次に、不純物を選択的にイオン注入することにより、p形ウェル12、ドリフト層17、n形ウェル18を形成する。
半導体装置1を駆動させる際には、ソースコンタクト46とドレインコンタクト47との間に直流電圧を印加する。例えば、ソースコンタクト46にソース電位として接地電位(0V)を印加し、ドレインコンタクト47に正のドレイン電位、例えば40Vを印加する。また、ボディコンタクト層16には例えばソース電位を印加する。
半導体装置1においては、電極42における凹部36内に配置された第1部分42aがゲート電極として機能し、DMOSのオン状態とオフ状態を切り替える。一方、電極42における絶縁部材41上に乗り上げた第2部分42bが、フィールドプレート電極として機能し、オフ状態における電界の集中を緩和する。
次に、第2の実施形態について説明する。
図2は、本実施形態に係る半導体装置を示す断面図である。
次に、第3の実施形態について説明する。
図3(a)は本実施形態に係る半導体装置を示す平面図であり、(b)はその断面図である。
10:シリコン基板
11:エピタキシャル層
12:p形ウェル
13:ソース層
14:ソースコンタクト層
15:ボディ層
16:ボディコンタクト層
17:ドリフト層
18:n形ウェル
19:ドレイン層
20:ドレインコンタクト層
30:半導体部分
31:第1層
32:第2層
33:第3層
35:半導体部分30の上面
36:凹部
36b:凹部の底面
36d:凹部の側面
36s:凹部の側面
36u:凹部の上面
41:絶縁部材
41b:絶縁部材41の底面
41d:絶縁部材41の側面
41u:絶縁部材41の上面
42:電極
42a:第1部分
42b:第2部分
43:ゲート絶縁膜
45:層間絶縁膜
46:ソースコンタクト
47:ドレインコンタクト
52:電極
60:STI
θ1、θ2:角度
Claims (10)
- 上面に凹部が形成された半導体部分と、
前記凹部内の一部に設けられた絶縁部材と、
前記凹部内の他の一部に設けられた第1部分と、前記絶縁部材よりも上方に設けられた第2部分と、を有する第1電極と、
前記半導体部分と前記第1部分との間に設けられ、前記絶縁部材よりも薄いゲート絶縁膜と、
前記半導体部分上に設けられたソースコンタクトと、
前記半導体部分上に設けられたドレインコンタクトと、
を備え、
前記半導体部分は、
前記ゲート絶縁膜に接した第1導電形の第1層と、
前記第1層に接し、前記ソースコンタクトに接続された第2導電形の第2層と、
前記第1層に接し、前記ドレインコンタクトに接続された第2導電形の第3層と、
を有し、
上方から見て、前記凹部は前記ソースコンタクトと前記ドレインコンタクトとの間に位置し、
前記絶縁部材は、前記第1部分と前記第3層との間に配置された半導体装置。 - 上方から見て、前記第2部分の一部は、前記第1部分と前記ドレインコンタクトとの間に配置された請求項1に記載の半導体装置。
- 前記第3層は前記絶縁部材に接している請求項1または2に記載の半導体装置。
- 前記凹部の側面はテーパ状である請求項1〜3のいずれか1つに記載の半導体装置。
- 前記絶縁部材の前記第3層側の側面と前記絶縁部材の上面とのなす第1角度は鋭角である請求項1〜4のいずれか1つに記載の半導体装置。
- 前記第1角度は10度以上85度以下である請求項5に記載の半導体装置。
- 前記ゲート絶縁膜の表面と前記凹部の上面とのなす第2角度は鋭角である請求項1〜6のいずれか1つに記載の半導体装置。
- 前記第1部分は、前記絶縁部材と前記ゲート絶縁膜との間に配置された請求項1〜7のいずれか1つに記載の半導体装置。
- 前記絶縁部材上であって、前記第1電極と前記ドレインコンタクトとの間に設けられた第2電極をさらに備えた請求項1〜8のいずれか1つに記載の半導体装置。
- 前記半導体部分はシリコンを含有し、
前記ゲート絶縁膜は、シリコンの酸化膜である請求項1〜9のいずれか1つに記載の半導体装置。
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2019232931A JP7265470B2 (ja) | 2019-12-24 | 2019-12-24 | 半導体装置 |
US16/940,671 US11271105B2 (en) | 2019-12-24 | 2020-07-28 | Semiconductor device |
CN202010817443.5A CN113035932B (zh) | 2019-12-24 | 2020-08-14 | 半导体装置 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2019232931A JP7265470B2 (ja) | 2019-12-24 | 2019-12-24 | 半導体装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2021101452A true JP2021101452A (ja) | 2021-07-08 |
JP7265470B2 JP7265470B2 (ja) | 2023-04-26 |
Family
ID=76439339
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2019232931A Active JP7265470B2 (ja) | 2019-12-24 | 2019-12-24 | 半導体装置 |
Country Status (3)
Country | Link |
---|---|
US (1) | US11271105B2 (ja) |
JP (1) | JP7265470B2 (ja) |
CN (1) | CN113035932B (ja) |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2006054431A (ja) * | 2004-06-29 | 2006-02-23 | Infineon Technologies Ag | トランジスタ、メモリセルアレイ、および、トランジスタ製造方法 |
US20070090452A1 (en) * | 2005-10-25 | 2007-04-26 | Gyu Seog Cho | Recess channel transistor for preventing deterioration of device characteristics due to misalignment of gate layers and method of forming the same |
JP2009032820A (ja) * | 2007-07-25 | 2009-02-12 | Denso Corp | 横型mosトランジスタおよびその製造方法 |
JP2010225979A (ja) * | 2009-03-25 | 2010-10-07 | Furukawa Electric Co Ltd:The | GaN系電界効果トランジスタ |
JP2015088597A (ja) * | 2013-10-30 | 2015-05-07 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
JP2018022849A (ja) * | 2016-08-05 | 2018-02-08 | ローム株式会社 | パワーモジュール及びモータ駆動回路 |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6724039B1 (en) * | 1998-08-31 | 2004-04-20 | Stmicroelectronics, Inc. | Semiconductor device having a Schottky diode |
US6566201B1 (en) * | 2001-12-31 | 2003-05-20 | General Semiconductor, Inc. | Method for fabricating a high voltage power MOSFET having a voltage sustaining region that includes doped columns formed by rapid diffusion |
JP5307973B2 (ja) * | 2006-02-24 | 2013-10-02 | セミコンダクター・コンポーネンツ・インダストリーズ・リミテッド・ライアビリティ・カンパニー | 半導体装置 |
JP4943763B2 (ja) * | 2006-07-31 | 2012-05-30 | オンセミコンダクター・トレーディング・リミテッド | 半導体装置及びその製造方法 |
JP5348364B2 (ja) * | 2007-08-27 | 2013-11-20 | サンケン電気株式会社 | ヘテロ接合型電界効果半導体装置 |
US7888732B2 (en) * | 2008-04-11 | 2011-02-15 | Texas Instruments Incorporated | Lateral drain-extended MOSFET having channel along sidewall of drain extension dielectric |
JP5385679B2 (ja) * | 2008-05-16 | 2014-01-08 | 旭化成エレクトロニクス株式会社 | 横方向半導体デバイスおよびその製造方法 |
JP2009302450A (ja) | 2008-06-17 | 2009-12-24 | Sharp Corp | 半導体装置およびその製造方法 |
JP6279346B2 (ja) | 2014-02-27 | 2018-02-14 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
US10680101B2 (en) * | 2017-07-31 | 2020-06-09 | Taiwan Semiconductor Manufacturing Co., Ltd. | Power metal-oxide-semiconductor field-effect transistor |
JP6744270B2 (ja) * | 2017-09-20 | 2020-08-19 | 株式会社東芝 | 半導体装置及びその製造方法 |
-
2019
- 2019-12-24 JP JP2019232931A patent/JP7265470B2/ja active Active
-
2020
- 2020-07-28 US US16/940,671 patent/US11271105B2/en active Active
- 2020-08-14 CN CN202010817443.5A patent/CN113035932B/zh active Active
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2006054431A (ja) * | 2004-06-29 | 2006-02-23 | Infineon Technologies Ag | トランジスタ、メモリセルアレイ、および、トランジスタ製造方法 |
US20070090452A1 (en) * | 2005-10-25 | 2007-04-26 | Gyu Seog Cho | Recess channel transistor for preventing deterioration of device characteristics due to misalignment of gate layers and method of forming the same |
JP2009032820A (ja) * | 2007-07-25 | 2009-02-12 | Denso Corp | 横型mosトランジスタおよびその製造方法 |
JP2010225979A (ja) * | 2009-03-25 | 2010-10-07 | Furukawa Electric Co Ltd:The | GaN系電界効果トランジスタ |
JP2015088597A (ja) * | 2013-10-30 | 2015-05-07 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
JP2018022849A (ja) * | 2016-08-05 | 2018-02-08 | ローム株式会社 | パワーモジュール及びモータ駆動回路 |
Also Published As
Publication number | Publication date |
---|---|
US11271105B2 (en) | 2022-03-08 |
JP7265470B2 (ja) | 2023-04-26 |
CN113035932A (zh) | 2021-06-25 |
US20210193833A1 (en) | 2021-06-24 |
CN113035932B (zh) | 2024-06-07 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US8901573B2 (en) | Silicon carbide semiconductor device and method of manufacturing the same | |
US9041008B2 (en) | Semiconductor device and method of manufacturing the same | |
US20190288063A1 (en) | Semiconductor device | |
JP6047297B2 (ja) | 半導体装置 | |
JP7021416B2 (ja) | トレンチゲートトレンチフィールドプレート半垂直半横方向mosfet | |
JP2012069797A (ja) | 絶縁ゲート型トランジスタ | |
JP2018056463A (ja) | 半導体装置及びその製造方法 | |
TWI620326B (zh) | 半導體裝置 | |
JP6381101B2 (ja) | 炭化珪素半導体装置 | |
JP6340200B2 (ja) | 半導体装置およびその製造方法 | |
JP7265470B2 (ja) | 半導体装置 | |
TWI760453B (zh) | 半導體裝置之製造方法 | |
JP5448733B2 (ja) | 半導体装置の製造方法 | |
JP2022180663A (ja) | 半導体装置 | |
JP6844482B2 (ja) | 窒化物半導体装置とその製造方法 | |
JP2009071152A (ja) | 複合ic | |
TWI824343B (zh) | 背對背連接的電晶體、相關的形成方法及負載開關、及負載開關的控制方法及控制器 | |
JP5223041B1 (ja) | 半導体装置及びその製造方法 | |
JP2010199424A (ja) | 半導体装置および半導体装置の製造方法 | |
JP5161439B2 (ja) | 半導体装置 | |
JP6421784B2 (ja) | 半導体装置 | |
JP6233436B2 (ja) | 炭化珪素半導体装置の製造方法 | |
JP2020184598A (ja) | 半導体装置 | |
JP2023042829A (ja) | 半導体装置 | |
JPWO2022249855A5 (ja) |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20211221 |
|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20211221 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20221122 |
|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20221124 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20230118 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20230316 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20230414 |
|
R150 | Certificate of patent or registration of utility model |
Ref document number: 7265470 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 |