JP2020537343A5 - - Google Patents
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- Publication number
- JP2020537343A5 JP2020537343A5 JP2020519728A JP2020519728A JP2020537343A5 JP 2020537343 A5 JP2020537343 A5 JP 2020537343A5 JP 2020519728 A JP2020519728 A JP 2020519728A JP 2020519728 A JP2020519728 A JP 2020519728A JP 2020537343 A5 JP2020537343 A5 JP 2020537343A5
- Authority
- JP
- Japan
- Prior art keywords
- copper
- containing layer
- substrate
- layer
- die
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000000034 method Methods 0.000 claims 30
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims 27
- 229910052802 copper Inorganic materials 0.000 claims 27
- 239000010949 copper Substances 0.000 claims 27
- 238000004377 microelectronic Methods 0.000 claims 18
- 239000000758 substrate Substances 0.000 claims 18
- 239000000463 material Substances 0.000 claims 12
- 229910052751 metal Inorganic materials 0.000 claims 9
- 239000002184 metal Substances 0.000 claims 9
- 238000007747 plating Methods 0.000 claims 7
- 230000001681 protective effect Effects 0.000 claims 6
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims 4
- 229910000679 solder Inorganic materials 0.000 claims 3
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 claims 2
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims 2
- 229910052759 nickel Inorganic materials 0.000 claims 2
- 238000004806 packaging method and process Methods 0.000 claims 2
- 229910052709 silver Inorganic materials 0.000 claims 2
- 239000004332 silver Substances 0.000 claims 2
- 229910052718 tin Inorganic materials 0.000 claims 2
- 239000011135 tin Substances 0.000 claims 2
- 206010026749 Mania Diseases 0.000 claims 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims 1
- 239000000654 additive Substances 0.000 claims 1
- 230000000996 additive effect Effects 0.000 claims 1
- 238000000151 deposition Methods 0.000 claims 1
- 239000010936 titanium Substances 0.000 claims 1
- 229910052719 titanium Inorganic materials 0.000 claims 1
Applications Claiming Priority (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US201762568463P | 2017-10-05 | 2017-10-05 | |
| US62/568,463 | 2017-10-05 | ||
| US15/984,343 US10566267B2 (en) | 2017-10-05 | 2018-05-19 | Die attach surface copper layer with protective layer for microelectronic devices |
| US15/984,343 | 2018-05-19 | ||
| PCT/US2018/054415 WO2019071006A1 (en) | 2017-10-05 | 2018-10-04 | COPPER LAYER WITH CHIP FASTENING SURFACE WITH PROTECTIVE LAYER FOR MICROELECTRONIC DEVICES |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2020537343A JP2020537343A (ja) | 2020-12-17 |
| JP2020537343A5 true JP2020537343A5 (enExample) | 2021-11-11 |
| JP7240008B2 JP7240008B2 (ja) | 2023-03-15 |
Family
ID=65993419
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2020519728A Active JP7240008B2 (ja) | 2017-10-05 | 2018-10-04 | マイクロ電子デバイスのための保護層を備えたダイ取り付け表面銅層 |
Country Status (4)
| Country | Link |
|---|---|
| US (3) | US10566267B2 (enExample) |
| JP (1) | JP7240008B2 (enExample) |
| CN (1) | CN111344860A (enExample) |
| WO (1) | WO2019071006A1 (enExample) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US10566267B2 (en) * | 2017-10-05 | 2020-02-18 | Texas Instruments Incorporated | Die attach surface copper layer with protective layer for microelectronic devices |
| US11322464B2 (en) | 2019-10-01 | 2022-05-03 | Taiwan Semiconductor Manufacturing Company, Ltd. | Film structure for bond pad |
Family Cites Families (38)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0644579B2 (ja) * | 1988-06-17 | 1994-06-08 | 三洋電機株式会社 | 半導体装置 |
| US6376910B1 (en) * | 1999-06-23 | 2002-04-23 | International Rectifier Corporation | Solder-on back metal for semiconductor die |
| US6519154B1 (en) | 2001-08-17 | 2003-02-11 | Intel Corporation | Thermal bus design to cool a microelectronic die |
| JP4173751B2 (ja) * | 2003-02-28 | 2008-10-29 | 株式会社ルネサステクノロジ | 半導体装置 |
| US9166130B2 (en) * | 2012-10-24 | 2015-10-20 | Spectrasensors, Inc. | Solderless mounting for semiconductor lasers |
| JP2006339354A (ja) | 2005-06-01 | 2006-12-14 | Tdk Corp | 半導体ic及びその製造方法、並びに、半導体ic内蔵モジュール及びその製造方法 |
| US7439618B2 (en) * | 2005-03-25 | 2008-10-21 | Intel Corporation | Integrated circuit thermal management method and apparatus |
| US8039956B2 (en) * | 2005-08-22 | 2011-10-18 | Texas Instruments Incorporated | High current semiconductor device system having low resistance and inductance |
| JP4379413B2 (ja) * | 2005-12-06 | 2009-12-09 | セイコーエプソン株式会社 | 電子部品、電子部品の製造方法、回路基板及び電子機器 |
| US20080277779A1 (en) | 2007-05-07 | 2008-11-13 | Abhishek Gupta | Microelectronic package and method of manufacturing same |
| US8030757B2 (en) | 2007-06-29 | 2011-10-04 | Intel Corporation | Forming a semiconductor package including a thermal interface material |
| JP5123633B2 (ja) | 2007-10-10 | 2013-01-23 | ルネサスエレクトロニクス株式会社 | 半導体装置および接続材料 |
| US8294280B2 (en) | 2009-05-07 | 2012-10-23 | Qualcomm Incorporated | Panelized backside processing for thin semiconductors |
| EP2298960A1 (en) | 2009-08-24 | 2011-03-23 | ATOTECH Deutschland GmbH | Method for electroless plating of tin and tin alloys |
| TWI421942B (zh) | 2010-02-12 | 2014-01-01 | 穩懋半導體股份有限公司 | 半導體晶片之背面銅金屬製程方法 |
| EP2476779B1 (en) | 2011-01-13 | 2013-03-20 | Atotech Deutschland GmbH | Immersion tin or tin alloy plating bath with improved removal of cupurous ions |
| US8435881B2 (en) | 2011-06-23 | 2013-05-07 | STAT ChipPAC, Ltd. | Semiconductor device and method of forming protective coating over interconnect structure to inhibit surface oxidation |
| US9390968B2 (en) | 2011-09-29 | 2016-07-12 | Intel Corporation | Low temperature thin wafer backside vacuum process with backgrinding tape |
| US20130144805A1 (en) | 2011-12-02 | 2013-06-06 | Procongps, Inc. | Geospatial data based measurement of risk associated with a vehicular security interest in a vehicular loan portfolio |
| US9119320B2 (en) * | 2012-04-13 | 2015-08-25 | Quanta Computer Inc. | System in package assembly |
| US9330943B2 (en) | 2012-12-12 | 2016-05-03 | Apple Inc. | Low cost repackaging of thinned integrated devices |
| JP5986499B2 (ja) * | 2012-12-21 | 2016-09-06 | ルネサスエレクトロニクス株式会社 | 半導体装置の製造方法 |
| WO2014141028A1 (en) * | 2013-03-13 | 2014-09-18 | Koninklijke Philips N.V. | Method and apparatus for creating a porous reflective contact |
| US9252054B2 (en) | 2013-09-13 | 2016-02-02 | Industrial Technology Research Institute | Thinned integrated circuit device and manufacturing process for the same |
| JP6269458B2 (ja) * | 2014-01-20 | 2018-01-31 | 株式会社デンソー | 半導体装置及びその製造方法 |
| US9735131B2 (en) * | 2015-11-10 | 2017-08-15 | Taiwan Semiconductor Manufacturing Company, Ltd. | Multi-stack package-on-package structures |
| US20170179058A1 (en) * | 2015-12-16 | 2017-06-22 | Lite-On Semiconductor Corporation | Bump structure having first portion of copper and second portion of pure tin covering the first portion, and interconnect structure using the same |
| DE102016109349A1 (de) * | 2016-05-20 | 2017-11-23 | Infineon Technologies Ag | Chipgehäuse, verfahren zum bilden eines chipgehäuses und verfahren zum bilden eines elektrischen kontakts |
| US10283466B2 (en) * | 2016-05-31 | 2019-05-07 | Semiconductor Components Industries, Llc | Polymer resin and compression mold chip scale package |
| CN105870098B (zh) * | 2016-06-07 | 2019-03-26 | 华天科技(昆山)电子有限公司 | Mosfet封装结构及其制作方法 |
| US10141245B2 (en) * | 2016-08-24 | 2018-11-27 | Qorvo Us, Inc. | High-power acoustic device with improved performance |
| US9947635B1 (en) * | 2016-10-14 | 2018-04-17 | Advanced Semiconductor Engineering, Inc. | Semiconductor package, interposer and semiconductor process for manufacturing the same |
| JP6698499B2 (ja) * | 2016-11-15 | 2020-05-27 | ルネサスエレクトロニクス株式会社 | 半導体装置およびその製造方法 |
| US10269587B2 (en) * | 2017-06-30 | 2019-04-23 | Taiwan Semiconductor Manufacturing Company, Ltd. | Integrated circuit packages and methods of forming same |
| US10854570B2 (en) * | 2017-07-27 | 2020-12-01 | Taiwan Semiconductor Manufacturing Company, Ltd. | Integrated fan-out package and method of fabricating the same |
| US10381295B2 (en) * | 2017-09-12 | 2019-08-13 | Nxp Usa, Inc. | Lead frame having redistribution layer |
| JP2019057576A (ja) * | 2017-09-20 | 2019-04-11 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
| US10566267B2 (en) * | 2017-10-05 | 2020-02-18 | Texas Instruments Incorporated | Die attach surface copper layer with protective layer for microelectronic devices |
-
2018
- 2018-05-19 US US15/984,343 patent/US10566267B2/en active Active
- 2018-10-04 CN CN201880074040.7A patent/CN111344860A/zh active Pending
- 2018-10-04 WO PCT/US2018/054415 patent/WO2019071006A1/en not_active Ceased
- 2018-10-04 JP JP2020519728A patent/JP7240008B2/ja active Active
-
2020
- 2020-02-18 US US16/793,887 patent/US12074096B2/en active Active
-
2024
- 2024-08-27 US US18/816,698 patent/US20240421045A1/en active Pending
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