TWI421942B - 半導體晶片之背面銅金屬製程方法 - Google Patents

半導體晶片之背面銅金屬製程方法 Download PDF

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TWI421942B
TWI421942B TW099104593A TW99104593A TWI421942B TW I421942 B TWI421942 B TW I421942B TW 099104593 A TW099104593 A TW 099104593A TW 99104593 A TW99104593 A TW 99104593A TW I421942 B TWI421942 B TW I421942B
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metal
metal layer
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wafer
copper metal
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Chang Hwang Hua
Wen Chu
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Win Semiconductors Corp
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Description

半導體晶片之背面銅金屬製程方法
本發明揭露一種半導體晶片之背面金屬製程方法,尤指一種以銅金屬層做為背面金屬層,並鍍上抗氧化金屬層以防止銅金屬層氧化之半導體晶片之背面銅金屬製程方法。
半導體電子元件,如異質接面雙極電晶體(HBT)以及高電子遷移率電晶體(HEMT)等,可應用於功率放大器、微波及毫米波等電子元件,對於通訊電子元件市場扮演重要角色。目前最新的半導體積體元件製程技術,已朝向多功能電子元件的整合,尤其是將一種或多種元件整合製作於同一晶片上,一方面可增加該元件的效能,另一方面也可降低製造成本,節省元件設計的空間。
半導體積體元件有一道重要的製程,就是背面金屬製程。由於表面各種電晶體元件常需要接地,因此會在元件的遠端配置一接地區。同時,為了節省晶片表面空間,通常讓許多個電晶體共用一個接地區。就一般的設計而言,通常會讓數個電晶體接地端以金屬相連接,最後連接至共用接地區的正面金屬層。如第1圖所示,即為一般接地區之剖面結構圖(其中標號100為半導體元件)。該接地區是由一正面金屬層101,一背面導孔(backside via hole)102以及透過該導孔與正面金屬接觸之背面金屬層103所構成。其製作方式通常是在表面金屬層結構製作完成後先將晶片磨到 指定的厚度,而後在晶片背面以光阻及曝光顯影技術定義出導孔102的大小及位置,接著再以溼蝕刻或乾蝕刻的技術讓導孔穿透至表面,最後再鍍上背面金屬層103,並使其透過導孔102與表面金屬層101接觸。值得一提的是,由於接地區的正面金屬層是透過導孔與整個背面金屬層接觸,因此共同接地區也具備散熱功能,可以當成是一個很好的散熱器(heat sink)。
目前在砷化鎵的背面金屬製程,一般都是用濺鍍(Sputter)方式把金屬種子層鍍在砷化鎵的背面導孔。但導孔可能因不同的應用而其形狀有所不同,導致金屬種子層鍍在導孔內產生鍍膜非常不均勻的現象,造成後續因鍍金或鍍銅不良或因金屬種子層附著性不良,而產生有問題的元件。
另外以砷化鎵基板之晶片而言,背面金屬層的材質通常是以金為主。近年來為了降低元件製作成本,銅製程逐漸取代了金製程,成為晶片背面金屬製程的發展趨勢。然而,由於銅原子很容易藉由擴散進入砷化鎵基板,進而進入表面電晶體元件區域,造成元件損壞。此外,許多背面導孔常具有極大深寬比,使得背面金屬層不易與表面金屬附著,因此常在背面金屬製程完成後與表面金屬層剝離,造成不良的元件接地,進而影響個別電晶體元件特性的可靠度及整體積體元件的良率。
有鑑於此,發展一種適當的製程方法來使背面金屬層與表面金屬層在背面導孔達到很好的接觸,並防止背面金屬原子擴散進到晶片表面的元件區域,是當前半導體元件背面金屬製程重要的課題。此外,以銅取代金做為背面金屬層之另一問題在於銅金屬極易氧化,因此必需使用一些抗氧化金屬層來保護同金屬層。即使在銅金屬上鍍上一層抗氧化金屬層,當晶片切割後,其剖面銅金屬層仍會因曝露於空氣中而氧化。因此,開發適當製程步驟來防止晶片切割後銅金屬層的氧化亦是一重要的課題。
本發明之一目的係在提供一種製程方法,用於半導體積體電子元件晶片的背面銅金屬製程,使背面銅金屬層透過背面導孔與表面金屬層達到很好的電性接觸,降低因背面銅金屬層剝離而造成的元件損壞,因此晶片表面電子元件在經過後續製程及檢測程序後,仍可維持元件特性之可靠度,大幅提昇元件良率。
本發明之另一目的係在提供一種製程方法,藉以防止背面銅金屬擴散進入半導體晶片,並防止背面銅金屬在晶片切割後之氧化問題。
為達上述之目的,本發明揭露一種半導體晶片之背面銅金屬製程方法,包含以下步驟:以蝕刻技術將背面導孔蝕刻穿透至表面金屬層;將一金屬層或合金層鍍於晶片背面做為背面金屬種子層;在該背面金屬種子層上鍍上一層銅金屬層做為背面金屬層,並使其透過背面導孔與表面金屬層達到良好的電接觸;以曝光顯影技術定義出背面溝槽位置,並利用蝕刻技術將溝槽處之銅金屬層去除;以及在晶片背面鍍上一抗氧化金屬層,防止銅金屬層氧化。
於實施時,前述一金屬層或合金層較佳以無電解電鍍法鍍於晶片背面。
本發明之半導體晶片之背面銅金屬製程方法,係包括以下特點:
1.可以有效降低成本;
2.適合大量生產;
3.可以使背面金屬層厚度均勻
4.與砷化鎵基板之間具有很好的附著
5.防止背面金屬擴散進入半導體晶片
6.防止背面金屬氧化
7.維持表面電子元件特性的可靠度
可以達到上述優點之金屬種子層材料包含:鈀、金、鎳、銀、鈷、鉻、鉑及其金屬合金如鎳磷(NiP)、鎳硼(NiB)、金錫(AuSn)、鉑銠(PtRh)等或其他類似之導電金屬或合金。
為進一步了解本發明,以下舉較佳之實施例,配合圖示、圖號,將本發明 之具體構成內容及其所達成的功效詳細說明如后:
100‧‧‧半導體元件
101‧‧‧正面金屬層
102‧‧‧背面導孔
103‧‧‧背面金屬層
201‧‧‧半導體元件晶片
202‧‧‧表面金屬層
203‧‧‧背面導孔
204‧‧‧鈀金屬層
205‧‧‧背面銅金屬層
206‧‧‧背面銅金屬溝槽
207‧‧‧抗氧化金屬層
第1圖係為半導體元件背面導孔附近之剖面圖。該圖說明正面金屬層如何透過背面導孔與背面金屬層形成電性接觸。
第2a至2f圖係為本發明半導體晶片之背面銅金屬製程方法之流程示意圖。
第3a至3d圖係為實際半導體元件背面導孔附近剖面之掃瞄是電子顯微鏡影像。
第4a至4b圖係以X-ray分析實際半導體元件晶片背面導孔附近三維影像之俯視圖傾角圖,並比較有無電解電鍍法金屬種子層對於晶片在高溫烘烤後的金屬剝離現象。
第5a至5d圖係以穿透式電子顯微鏡分析砷化鎵半導體晶片背面覆蓋鈀金屬種子層及銅金屬層之各層成分分析結果。
第6圖係經本發明之背面銅金屬製程方法所製作之半導體電晶體元件之電流增益Beta值之高溫測試結果(HTOL)。測試條件為:125℃環境下測試1000小時,測試之電壓及電流分別為VCE=3V,IC=20mA。
第7a至7b圖係經本發明之背面銅金屬製程方法所製作之半導體電晶體元件電阻值之熱循環(TC)測試結果。(a)HBT元件測試結果;(b)pHEMT測試結果。
第2a至2f圖係為本發明針對半導體晶片背面銅金屬製程所提出的方法之流程示意圖。本發明所應用之半導體晶片主要係指化合物半導體晶片(Compound Semiconductor),而以砷化鎵為基板之半導體元件晶片為最佳實施例。如第2a圖所示,在半導體元件晶片201完成表面金屬層202之製程及薄化後,即可進行本發明之背面金屬製程步驟。第2b圖為本發明之第一步驟,該步驟係先利用光阻塗佈及曝光顯影技術於晶片背面定義出表面金屬層的位置,接著再以蝕刻技術將半導體晶片201蝕刻出背面導孔203,使其穿透至表面金屬層202。本步驟所使用的蝕刻技術可以是利用活性離子所進行之乾式蝕刻或是利用化學溶液所進行之濕式化學蝕刻。第2c圖為本發明之第二步驟,該步驟係將一金屬層鍍於晶片背面,做為晶片背面的金屬種子層204。適合的金屬種子層材料包含:鈀、金、鎳、銀、鈷、鉻、鉑及其金屬合金如鎳磷(NiP)、鎳硼(NiB)、金錫(AuSn)、鉑銠(PtRh)等或其他類似之導電金屬或合金。在本步驟中,金屬種子層可利用傳統的金屬濺鍍法,或利用無電解電鍍法,將該金屬種子層鍍於半導體晶片背面。無電解電鍍法的原理,係先讓金屬化合物(如氯化鈀)在溶液中解離為金屬離子(如鈀離子),再透過添加劑化學反應釋放電子,將金屬離子(如鈀離子)金屬化後附著於半導體晶片背面。透過控制電鍍時間、溶液溫度及酸鹼值,將可以精確的控制金屬層(如鈀金屬層)的厚度。本發明透過實驗得知,較佳的金屬層厚度約介於20奈米至500奈米之間。第三步驟如第2d圖所示,係於金屬種子層204鍍於晶片背面以後,鍍上銅金屬層做為背面金屬層205。第四步驟如第2e圖所示,係先以曝光顯影技術定義出背面溝槽206的位置,再利用蝕刻將溝槽位置上的銅金屬層移除。由於晶片背面銅金屬層205的適當厚度介於一微米到數微米之間,在後續晶片切割時常因銅金屬不易斷裂而無法順利切割。因此,製作背面溝槽206並移除溝槽處的 銅金屬層將有助於後續晶片切割順利。第五步驟如第2f圖所示,係在背面溝槽206製作並移除溝槽處的銅金屬層後,鍍上一抗氧化金屬層207,防止銅金屬層因接觸空氣而氧化。抗氧化金屬層的材質以金為主,或其他可防止氧化的金屬或合金,例如金,鈀,鎳金,鎳鈀,鈀金,或鎳鈀金合金。值得指出的優點是,先製作背面溝槽205再覆蓋抗氧化金屬層207,在後續晶片切割後,銅金屬層205將仍然被抗氧化金屬層完整覆蓋。然而,若沒有製作背面溝槽206而直接在銅金屬層205上覆蓋抗氧化金屬層207,在後續晶片切割後,橫截面的銅金屬層將因曝露於空氣中而氧化,對於元件的可靠度產生嚴重的影響。
本發明之半導體晶片之背面銅金屬製程方法,已經透過實驗證實可以有效防止背面銅金屬剝離,使背面銅金屬層與表面金屬層達到良好的電性接觸。第3a至3d圖及第4a與4b圖即是以鈀金屬層作為種子層為例之實際測試結果。如第3a至3d圖所示為利用本發明之背面銅金屬製程之半導體元件晶片在導孔附近橫截面之掃瞄電子顯微鏡(SEM)影像。由該圖可以發現,即使整個晶片經過30分鐘350℃的烘烤,背面金屬層與表面金屬層仍然沒有剝離的現象。第4a與4b圖是以X-ray三維影像分析,比較有無鈀金屬種子層對於晶片在高溫烘烤後金屬剝離現象。由第4a與4b圖也可以清楚看出,鍍上銅金屬種子層以後,背面導孔附近的沒有金屬剝離的現象。
經實驗證實,鈀金屬種子層也可以有效防止銅金屬層之銅原子擴散進入半導體晶片。第5a至5d圖即為利用穿透式電子顯微鏡分析砷化鎵半導體晶片背面覆蓋鈀金屬種子層及銅金屬層之各層成分分析結果。由該實驗結果可以看出,在砷化鎵半導體中,並沒有發現銅原子成分,顯示鈀金屬層也可以做銅金屬的擴散屏障。
此外,本發明之半導體晶片之背面銅金屬製程方法,也透過完整的元件測 試,證實本製程方法的確可以維持表面電晶體元件特性之可靠度。第6圖係為經本發明之背面銅金屬製程方法所製作之半導體電晶體元件特性之高溫測試結果(HTOL)。由該測試結果可以發現,元件的電流增益(beta值)在125℃的環境下,測試之電壓及電流分別為VCE=3V,IC=20mA,經過1000小時測試,仍舊維持很好的元件特性可靠度。此外,表面金屬層與背面金屬層(Cu)之間的電阻值,也同樣通過完整的熱循環(TC)測試。第7a及7b圖係利用本發明之製程方法所製作之半導體電晶體元件HBT及pHEMT之電阻值的TC結果。由該圖可以看出,同樣經過1000次-40℃至125℃的升降溫過程,其電阻值仍舊維持在相近的數值,顯示鍍上金屬種子層後的確可以防止背面金屬在熱循環的過程中剝離。
因此,本發明之半導體晶片之背面銅金屬製程方法具有以下之優點:
1.可以有效降低成本;
2.適合大量生產;
3.可以使背面金屬層厚度均勻
4.與砷化鎵基板之間具有很好的附著
5.防止背面金屬擴散進入半導體晶片
6.防止背面金屬氧化
7.維持表面電子元件特性的可靠度
以上所述乃是本發明之具體實施例及所運用之技術手段,根據本文的揭露或教導可衍生推導出許多的變更與修正,若依本發明之構想所作之等效改變,其所產生之作用仍未超出說明書及圖式所涵蓋之實質精神時,均應視為在本發明之技術範疇內。
201‧‧‧半導體元件晶片
202‧‧‧表面金屬層
203‧‧‧背面導孔
204‧‧‧鈀金屬層
205‧‧‧背面銅金屬層
206‧‧‧背面銅金屬溝槽
207‧‧‧抗氧化金屬層

Claims (6)

  1. 一種半導體晶片之背面銅金屬製程方法,供應用於在半導體元件晶片完成表面金屬層之製程及薄化後,其步驟包含:以蝕刻技術將背面導孔蝕刻穿透至表面金屬層;將一金屬層或合金層鍍於晶片背面做為背面金屬種子層;在該背面金屬種子層上鍍上一層銅金屬層做為背面金屬層,並使其透過背面導孔與表面金屬層達到良好的電接觸;以曝光顯影技術定義出背面溝槽位置,並利用蝕刻技術將溝槽處之銅金屬層去除;以及在晶片背面鍍上一抗氧化金屬層,防止銅金屬層氧化,其中背面金屬種子層係以無電解電鍍法鍍於晶片背面,利用金屬化合物在溶液中解離為金屬離子,再透過添加劑化學反應釋放電子,將金屬離子金屬化後形成金屬附著於半導體晶片背面。
  2. 如申請專利範圍第1項所述之背面銅金屬製程方法,其中金屬種子層之材料為鈀、金、鎳、銀、鈷、鉻、鉑或其金屬合金如鎳磷(NiP)、鎳硼(NiB)、金錫(AuSn)或鉑銠(PtRh)。
  3. 如申請專利範圍第1項所述之背面銅金屬製程方法,其中之半導體晶片,係指化合物半導體晶片。
  4. 如申請專利範圍第3項所述之背面銅金屬製程方法,其中之化合物半導體晶片,係指以砷化鎵為基板之半導體元件晶片。
  5. 如申請專利範圍第1項所述之背面銅金屬製程方法,其中蝕刻技術係指利用活性離子所進行之乾式蝕刻或利用化學溶液所進行之濕式蝕刻。
  6. 如申請專利範圍第1項所述之背面銅金屬製程方法,其中抗氧化金屬層之 材料為金,鈀,鎳金,鎳鈀,鈀金,或鎳鈀金合金。
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