JP2020510253A5 - - Google Patents

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Publication number
JP2020510253A5
JP2020510253A5 JP2019546135A JP2019546135A JP2020510253A5 JP 2020510253 A5 JP2020510253 A5 JP 2020510253A5 JP 2019546135 A JP2019546135 A JP 2019546135A JP 2019546135 A JP2019546135 A JP 2019546135A JP 2020510253 A5 JP2020510253 A5 JP 2020510253A5
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JP
Japan
Prior art keywords
frequency
clock
signal
core
stretch
Prior art date
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JP2019546135A
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English (en)
Japanese (ja)
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JP2020510253A (ja
JP6905596B2 (ja
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Priority claimed from US15/441,613 external-priority patent/US10303200B2/en
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Publication of JP2020510253A publication Critical patent/JP2020510253A/ja
Publication of JP2020510253A5 publication Critical patent/JP2020510253A5/ja
Application granted granted Critical
Publication of JP6905596B2 publication Critical patent/JP6905596B2/ja
Active legal-status Critical Current
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JP2019546135A 2017-02-24 2018-02-20 クロック分周デバイス及びその方法 Active JP6905596B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US15/441,613 US10303200B2 (en) 2017-02-24 2017-02-24 Clock divider device and methods thereof
US15/441,613 2017-02-24
PCT/US2018/018718 WO2018156485A1 (en) 2017-02-24 2018-02-20 Clock divider device and methods thereof

Publications (3)

Publication Number Publication Date
JP2020510253A JP2020510253A (ja) 2020-04-02
JP2020510253A5 true JP2020510253A5 (enExample) 2021-03-25
JP6905596B2 JP6905596B2 (ja) 2021-07-21

Family

ID=63246265

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2019546135A Active JP6905596B2 (ja) 2017-02-24 2018-02-20 クロック分周デバイス及びその方法

Country Status (6)

Country Link
US (1) US10303200B2 (enExample)
EP (1) EP3586214B1 (enExample)
JP (1) JP6905596B2 (enExample)
KR (1) KR102306084B1 (enExample)
CN (1) CN110226148B (enExample)
WO (1) WO2018156485A1 (enExample)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2590660B (en) * 2019-12-23 2022-01-05 Graphcore Ltd Reactive droop limiter
US11895588B2 (en) * 2020-08-05 2024-02-06 Analog Devices, Inc. Timing precision maintenance with reduced power during system sleep
US12019499B2 (en) 2021-12-16 2024-06-25 Advanced Micro Devices, Inc. System and method to reduce power down entry and exit latency
CN117409828A (zh) * 2022-07-08 2024-01-16 长鑫存储技术有限公司 一种存储器、控制装置、时钟处理方法和电子设备
EP4325503B1 (en) 2022-07-08 2025-05-21 Changxin Memory Technologies, Inc. Memory, control apparatus, clock processing method, and electronic device
US12061509B2 (en) * 2022-12-15 2024-08-13 International Business Machines Corporation Voltage droop and overshoot management using non-linear slope detection

Family Cites Families (28)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2959657B2 (ja) 1993-05-13 1999-10-06 キヤノン株式会社 電子機器
JP2000207381A (ja) 1999-01-20 2000-07-28 Mitsubishi Electric Corp マイクロコンピュ―タのリセット装置
US7114038B2 (en) 2001-12-28 2006-09-26 Intel Corporation Method and apparatus for communicating between integrated circuits in a low power mode
US6922111B2 (en) * 2002-12-20 2005-07-26 Intel Corporation Adaptive frequency clock signal
US6882238B2 (en) * 2003-03-21 2005-04-19 Intel Corporation Method and apparatus for detecting on-die voltage variations
US7007188B1 (en) 2003-04-29 2006-02-28 Advanced Micro Devices, Inc. Precision bypass clock for high speed testing of a data processor
US7225349B2 (en) 2003-07-25 2007-05-29 Intel Corporation Power supply voltage droop compensated clock modulation for microprocessors
US7076679B2 (en) 2003-10-06 2006-07-11 Hewlett-Packard Development Company, L.P. System and method for synchronizing multiple variable-frequency clock generators
DE10354215B4 (de) 2003-11-20 2010-02-25 Infineon Technologies Ag Taktregulierungsvorrichtung sowie Schaltungsanordnung
WO2006091826A2 (en) * 2005-02-23 2006-08-31 Multigig, Inc. Low noise divider
JP4492394B2 (ja) 2005-03-08 2010-06-30 株式会社デンソー マイクロコンピュータ
US8037340B2 (en) 2007-11-28 2011-10-11 International Business Machines Corporation Apparatus and method for micro performance tuning of a clocked digital system
US7570122B2 (en) * 2007-12-22 2009-08-04 Broadcom Corporation Low voltage LOGEN
DE102008061034B3 (de) 2008-12-08 2010-04-08 Fujitsu Siemens Computers Gmbh Anordnung umfassend wenigstens zwei Stromversorgungseinheiten und wenigstens eine Strom verbrauchende Komponente, Computersystem sowie Verfahren zur Steuerung einer Anordnung
US8433944B2 (en) * 2010-04-12 2013-04-30 Qualcomm Incorporated Clock divider system and method with incremental adjustment steps while controlling tolerance in clock duty cycle
US8384435B2 (en) * 2011-01-05 2013-02-26 Texas Instruments Incorporated Clock switching circuit with priority multiplexer
US20120187991A1 (en) * 2011-01-25 2012-07-26 Advanced Micro Devices, Inc. Clock stretcher for voltage droop mitigation
US8937511B2 (en) 2011-11-22 2015-01-20 Marvell World Trade Ltd. Frequency scaling of variable speed systems for fast response and power reduction
US9317342B2 (en) 2011-12-23 2016-04-19 Intel Corporation Characterization of within-die variations of many-core processors
US9065440B2 (en) * 2013-01-30 2015-06-23 Altera Corporation Bypassable clocked storage circuitry for dynamic voltage-frequency scaling
US10020931B2 (en) * 2013-03-07 2018-07-10 Intel Corporation Apparatus for dynamically adapting a clock generator with respect to changes in power supply
US8933737B1 (en) * 2013-06-28 2015-01-13 Stmicroelectronics International N.V. System and method for variable frequency clock generation
CN105375917B (zh) * 2013-12-13 2019-01-29 马维尔国际有限公司 分频器
US9753525B2 (en) 2014-12-23 2017-09-05 Intel Corporation Systems and methods for core droop mitigation based on license state
US9798376B2 (en) * 2015-08-03 2017-10-24 Qualcomm Incorporated Power distribution network (PDN) droop/overshoot mitigation
US9778676B2 (en) 2015-08-03 2017-10-03 Qualcomm Incorporated Power distribution network (PDN) droop/overshoot mitigation in dynamic frequency scaling
US9915968B2 (en) * 2016-04-19 2018-03-13 Qualcomm Incorporated Systems and methods for adaptive clock design
US10148258B2 (en) * 2016-09-28 2018-12-04 Mellanox Technologies, Ltd. Power supply voltage monitoring and high-resolution adaptive clock stretching circuit

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