JP2019139309A - 基準電圧発生装置 - Google Patents
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- 239000012535 impurity Substances 0.000 claims abstract description 93
- 108091006146 Channels Proteins 0.000 description 80
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- 108090000699 N-Type Calcium Channels Proteins 0.000 description 7
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- 230000007423 decrease Effects 0.000 description 5
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- 108010075750 P-Type Calcium Channels Proteins 0.000 description 1
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- 230000002596 correlated effect Effects 0.000 description 1
- 239000002019 doping agent Substances 0.000 description 1
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Abstract
Description
すなわち、入力電圧に対し定電流を出力する定電流回路と、前記定電流に基づいた電圧を生成する電圧生成回路とを有する基準電圧発生装置であって、前記定電流回路は、第1導電型の第1のゲート電極、第1導電型の第1のソース領域、第1導電型の第1のドレイン領域および第1導電型の第1のチャネル不純物領域を備え、第1のチャネルサイズを有する第1のMOSトランジスタを含み、前記電圧生成回路は、第2導電型の第2のゲート電極、第1導電型の第2のソース領域、第1導電型の第2のドレイン領域および第1導電型の第2のチャネル不純物領域を備え、第2のチャネルサイズを有する第2のMOSトランジスタを含み、前記第1のチャネルサイズと前記第2のチャネルサイズが異なり、前記第1のチャネル不純物領域の不純物濃度と前記第2のチャネル不純物領域の不純物濃度が異なることを特徴とする基準電圧発生装置とする。
本実施形態の基準電圧発生装置100は、定電流回路101と、電圧生成回路102を備える。電源端子1に接続され、電源電圧VDDを供給された定電流回路101は、電圧生成回路102に対し電源電圧VDDに依存しない定電流を出力する。定電流回路101から出力された定電流を入力された電圧生成回路102は、その定電流の値に基づいた基準電圧Vrefを、基準電圧端子3から出力する。
=1/2・gmD・(|VTD|)2 ・・・(1)
電圧生成回路102を構成するエンハンス型NMOSトランジスタ20は、第2の閾値電圧VTEと第2の相互コンダクタンスgmE(非飽和動作時)を有する。このエンハンス型NMOSトランジスタ20のドレイン電流IEは、下式(2)の電圧・電流特性を示す。図1に示すように、エンハンス型NMOSトランジスタ20のゲートとドレインが結線され、基準電圧端子3に接続されているので、式(2)において、ゲート・ソース間電圧VGは、基準電圧Vrefとなる。そのため、エンハンス型NMOSトランジスタ20のドレイン電流IEは、第2の閾値電圧VTEと、基準電圧Vrefに依存し、基準電圧Vrefに対してダイオードの順方向特性と類似した電流となる。このドレイン電流IEは、式(2)のgmEに含まれるチャネルサイズSE(WE/LE)で調整できる。
=1/2・gmE・(Vref−VTE)2 ・・・(2)
以上より、基準電圧Vrefは、式(1)のIDが式(2)のIEに等しくなるとして導かれ、下式(3)のようになる。
この式(3)から分るように、基準電圧Vrefの温度変動は、VTEとVTDのそれぞれの温度変動に依存する。ここで、式(3)中のgmD/gmEには、デプレッション型NMOSトランジスタ10のチャネルサイズSDに対するエンハンス型NMOSトランジスタ20のチャネルサイズSEの比であるSD/SEが含まれる。これは、具体的には(WD/LD)/(WE/LE)であり、これらの温度に依存しないサイズを調整することで、基準電圧Vrefの温度変動を制御することができる。
2 接地端子
3 基準電圧端子
4 半導体基板
10 デプレッション型NMOSトランジスタ
11、21 P型ウェル領域
12、22 ゲート絶縁膜
13、23 ドレイン領域
14、24 ソース領域
15、25 ゲート電極
16、26 チャネル不純物領域
20 エンハンス型NMOSトランジスタ
30、40 PMOSトランジスタ
101、201 定電流回路
102、202 電圧生成回路
203 カレントミラー回路
Claims (4)
- 入力電圧に対し定電流を出力する定電流回路と、前記定電流に基づいた電圧を生成する電圧生成回路とを有する基準電圧発生装置であって、
前記定電流回路は、第1導電型の第1のゲート電極、第1導電型の第1のソース領域、第1導電型の第1のドレイン領域および第1導電型の第1のチャネル不純物領域を備え、第1のチャネルサイズを有する第1のMOSトランジスタを含み、
前記電圧生成回路は、第2導電型の第2のゲート電極、第1導電型の第2のソース領域、第1導電型の第2のドレイン領域および第1導電型の第2のチャネル不純物領域を備え、第2のチャネルサイズを有する第2のMOSトランジスタを含み、
前記第1のチャネルサイズと前記第2のチャネルサイズが異なり、前記第1のチャネル不純物領域の不純物濃度と前記第2のチャネル不純物領域の不純物濃度が異なることを特徴とする基準電圧発生装置。 - 前記第1のMOSトランジスタがデプレッション型MOSトランジスタであり、前記第2のMOSトランジスタがエンハンスメント型MOSトランジスタであることを特徴とする請求項1に記載の基準電圧発生装置。
- 前記第1のチャネル不純物領域の不純物濃度NDに対する前記第2のチャネル不純物領域の不純物濃度NEの第1の比NE/NDが、前記第2のチャネルサイズSEに対する前記第1のチャネルサイズSDの第2の比SD/SEと実質的に同じ値であることを特徴とする請求項1または2に記載の基準電圧発生装置。
- 前記第1のチャネル不純物領域の不純物濃度NDに対する前記第2のチャネル不純物領域の不純物濃度NEの第1の比NE/NDおよび前記第2のチャネルサイズSEに対する前記第1のチャネルサイズSDの第2の比SD/SEがともに1より大きく、3以下であることを特徴とする請求項1乃至3のいずれか一項に記載の基準電圧発生装置。
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JP2018019334A JP7009033B2 (ja) | 2018-02-06 | 2018-02-06 | 基準電圧発生装置 |
TW107144855A TWI791707B (zh) | 2018-02-06 | 2018-12-12 | 基準電壓產生裝置 |
KR1020190000297A KR102658160B1 (ko) | 2018-02-06 | 2019-01-02 | 기준 전압 발생 장치 |
CN201910003748.XA CN110119178B (zh) | 2018-02-06 | 2019-01-03 | 基准电压产生装置 |
US16/240,428 US10886267B2 (en) | 2018-02-06 | 2019-01-04 | Reference voltage generation device |
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CN114756080A (zh) * | 2022-04-21 | 2022-07-15 | 上海华虹宏力半导体制造有限公司 | 偏置电流产生电路和电流提供电路 |
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Citations (8)
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KR102658160B1 (ko) | 2024-04-17 |
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US10886267B2 (en) | 2021-01-05 |
US20190244956A1 (en) | 2019-08-08 |
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