JP2019071345A - 電子制御装置 - Google Patents
電子制御装置 Download PDFInfo
- Publication number
- JP2019071345A JP2019071345A JP2017196587A JP2017196587A JP2019071345A JP 2019071345 A JP2019071345 A JP 2019071345A JP 2017196587 A JP2017196587 A JP 2017196587A JP 2017196587 A JP2017196587 A JP 2017196587A JP 2019071345 A JP2019071345 A JP 2019071345A
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- Prior art keywords
- outermost
- corner
- wiring substrate
- semiconductor package
- solder joint
- Prior art date
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02K—DYNAMO-ELECTRIC MACHINES
- H02K11/00—Structural association of dynamo-electric machines with electric components or with devices for shielding, monitoring or protection
- H02K11/30—Structural association with control circuits or drive circuits
- H02K11/33—Drive circuits, e.g. power electronics
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B60—VEHICLES IN GENERAL
- B60K—ARRANGEMENT OR MOUNTING OF PROPULSION UNITS OR OF TRANSMISSIONS IN VEHICLES; ARRANGEMENT OR MOUNTING OF PLURAL DIVERSE PRIME-MOVERS IN VEHICLES; AUXILIARY DRIVES FOR VEHICLES; INSTRUMENTATION OR DASHBOARDS FOR VEHICLES; ARRANGEMENTS IN CONNECTION WITH COOLING, AIR INTAKE, GAS EXHAUST OR FUEL SUPPLY OF PROPULSION UNITS IN VEHICLES
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- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
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- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
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- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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Abstract
Description
特に、BGAパッケージの最外周角部のはんだバンプへの負荷が大きく、これらのはんだバンプにおいて、亀裂伸展がとりわけはんだバンプ上側の電極との界面で顕著に起こり熱疲労寿命が低下する。
以下、図面を参照して実施例について説明する。
図1に示すように、半導体装置は、配線基板1と半導体パッケージ(エリアアレイ型パッケージ)2を有する。配線基板1は、上面に複数の電極4を有する。半導体パッケージ2は、下面に複数の電極3を有する。半導体パッケージ2は、複数の電極4との複数の電極3とを接続するはんだ接合部(バンプ)5を介して配線基板1に対向して実装される。
図2に示すように、最外周角部の配線基板1上の電極4aの形状を、半導体パッケージ2の内側に入る端部を円形とし、半導体パッケージ2の外側に出る端部の形状に角を持たせている。しかし、この形状に限定されるものではなく、最外周角部の配線基板1上の電極4aの先端部が半導体パッケージ2の外周に出ていればよく、半導体パッケージ2の外側に出る端部も円形とし、電極4aの形状を楕円とすることも可能である。
また、図2に示すように、配線基板1の最外周角部に配置された電極4aは、最外周角部の対角線上に配置されている。
まず、配線基板1の上に複数の電極4を形成する(図3(1)参照)。ここで、配線基板1は、その上面に電極4を有する。電極4は、最外周角部の電極4aとそれ以外の電極4bとは異なる面積を有し、電極4aの面積は電極4bの面積より大きい。
図2に示す実施例1の半導体装置では、半導体パッケージ2の最外周角部に対応する配線電極1の電極4aは、角の対角線上に配置されている。これに対して、図4に示す実施例2の半導体装置では、半導体パッケージ2の最外周角部に対応する配線電極1の電極4aは、半導体パッケージ2の対向する辺の垂直方向の延長線上に引き出されている。この場合、最外周角部のはんだ接合部5aは、半導体パッケージ2の対向する辺の垂直方向に長辺があるフィレット形状となる。
図6に示すように、実施例3の半導体装置は、半導体パッケージ2の最外周角部に対応する配線電極1の電極4aは、その外側端部を角の対角線上に出し、半導体パッケージ2の対向するそれぞれの辺の最外周の電極4cを、半導体パッケージ2の対向する辺のそれぞれの垂直方向の延長線上に引き出す。
車載向けの電子機器においては、車室内空間確保の観点からも、その設置環境が車室内からエンジンルーム内へと変遷しており、より高温環境下での耐性が求められている。また、車両寿命の延伸から、電子機器においても長寿命化が求められている。
図7に示すように、電子制御装置(ECU)70は、変換部71、制御部72、出力部73を備えており、センサ部74からの信号をモータ部75に伝達する機能を備えている。電子制御装置70の制御部72に実施例1の半導体装置が搭載されている。
主に有機基板が用いられる配線基板1と、配線基板1に搭載される半導体パッケージ2は、それぞれの線膨張係数が異なる。このため、高温と低温が繰り返される環境においてそれぞれの反り量が異なり、半導体パッケージ2の最外周角部のはんだ接合部5aに大きな負荷がかかる。このため、最外周角部のはんだ接合部5aの接続長が長いことは、はんだ接合部5aのクラック進展及び破断までの熱疲労寿命に効果的である。
2 半導体パッケージ
3 電極
4a 最外周角部電極
4b 最外周角部以外の電極
5a 最外周角部のはんだ接合部
5b 最外周角部以外のはんだ接合部
70 電子制御装置
71 変換部
72 制御部
73 出力部
74 センサ部
75 モータ部
Claims (12)
- モータを制御する制御部を備えた電子制御装置であって、
前記制御部は、半導体装置を有し、
前記半導体装置は、
複数の第1の電極を有する半導体パッケージと、
前記複数の第1の電極のそれぞれに対応するように配置された複数の第2の電極を有する配線基板と、
前記第1の電極と前記第2の電極とを接続するはんだ接合部と、を有し、
前記配線基板の最外周角部に配置された前記第2の電極の先端部は、前記半導体パッケージの外周端部よりも外側に位置することを特徴とする電子制御装置。 - 前記配線基板の前記最外周角部に配置された前記はんだ接合部の先端部は、前記半導体パッケージの外周端部よりも外側に位置することを特徴とする請求項1に記載の電子制御装置。
- 前記配線基板の最外周角部に配置された前記第2の電極の面積は、前記半導体パッケージの最外周角部に配置された前記第1の電極の面積よりも大きいことを特徴とする請求項2に記載の電子制御装置。
- 前記配線基板の最外周角部に配置された前記第2の電極の面積は、前記配線基板の最外周角部以外に配置された前記第2の電極の面積よりも大きいことを特徴とする請求項3に記載の電子制御装置。
- 前記配線基板の最外周角部に配置された前記第2の電極の中心は、前記半導体パッケージの最外周角部に配置された前記第1の電極の中心よりも、前記半導体パッケージの中心から外側に向かう方向にずれていることを特徴とする請求項4に記載の電子制御装置。
- 前記配線基板の最外周角部に配置された前記はんだ接合部の形状は、前記配線基板の最外周角部以外に配置された前記はんだ接合部の形状とは異なることを特徴とする請求項1に記載の電子制御装置。
- 前記配線基板の最外周角部に配置された前記はんだ接合部は、前記半導体パッケージの外周端部よりも外側に延伸したフィレット形状を有することを特徴とする請求項6に記載の電子制御装置。
- 前記配線基板の最外周角部に配置された前記第2の電極は、前記最外周角部の対角線上に配置されていることを特徴とする請求項1に記載の電子制御装置。
- 前記配線基板の最外周角部に配置された前記第2の電極は、前記半導体パッケージの対向する辺の垂直方向の延長線上に引き出されていることを特徴とする請求項1に記載の電子制御装置。
- 前記配線基板の最外周角部に配置された前記はんだ接合部の組成は、前記配線基板の最外周角部以外に配置された前記はんだ接合部の組成とは異なり、
前記配線基板の最外周角部に配置された前記はんだ接合部は、Bi、In及びSbの内の少なくとも一つの元素を含み、
前記最外周角部に配置された前記はんだ接合部の前記元素の濃度は、前記配線基板の最外周角部以外に配置された前記はんだ接合部に含まれるBi、In、Sbの内の少なくとも一つの元素の濃度よりも高いことを特徴とする請求項1に記載の電子制御装置。 - 前記制御部の前記半導体装置は、車載向けの電子機器に搭載されていることを特徴とする請求項1に記載の電子制御装置。
- 前記配線基板と前記半導体パッケージは、線膨張係数がそれぞれ異なり、
前記車載向けの電子機器においては、高温と低温が繰り返される環境下で前記配線基板と前記半導体パッケージの反り量がそれぞれ異なり、
前記配線基板の最外周角部に配置された前記はんだ接合部にかかる負荷は、前記配線基板の最外周角部以外に配置された前記はんだ接合部にかかる負荷よりも大きいことを特徴とする請求項11に記載の電子制御装置。
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JP2017196587A JP6955954B2 (ja) | 2017-10-10 | 2017-10-10 | 電子制御装置 |
CN201880065755.6A CN111194478A (zh) | 2017-10-10 | 2018-09-11 | 电子控制装置 |
PCT/JP2018/033563 WO2019073734A1 (ja) | 2017-10-10 | 2018-09-11 | 電子制御装置 |
US16/754,326 US20200243470A1 (en) | 2017-10-10 | 2018-09-11 | Electronic control device |
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Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH11121525A (ja) * | 1997-10-20 | 1999-04-30 | Sony Corp | 半導体装置 |
JP2000114315A (ja) * | 1998-09-29 | 2000-04-21 | Denso Corp | 電子部品の実装構造 |
JP2000195982A (ja) * | 1998-12-28 | 2000-07-14 | Pfu Ltd | 小型半導体装置および小型半導体装置の実装構造ならびにセラミック基板の製造方法 |
JP2003197813A (ja) * | 2001-12-28 | 2003-07-11 | Mitsubishi Electric Corp | 電子装置 |
JP2007251053A (ja) * | 2006-03-17 | 2007-09-27 | Fujitsu Ltd | 半導体装置の実装構造及びその実装構造の製造方法 |
JP2015176940A (ja) * | 2014-03-14 | 2015-10-05 | 日立オートモティブシステムズ株式会社 | 半導体装置の実装構造 |
Family Cites Families (1)
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---|---|---|---|---|
WO2015072294A1 (ja) * | 2013-11-12 | 2015-05-21 | 日立オートモティブシステムズ株式会社 | 車載電子制御装置の放熱構造 |
-
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- 2018-09-11 CN CN201880065755.6A patent/CN111194478A/zh active Pending
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Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH11121525A (ja) * | 1997-10-20 | 1999-04-30 | Sony Corp | 半導体装置 |
JP2000114315A (ja) * | 1998-09-29 | 2000-04-21 | Denso Corp | 電子部品の実装構造 |
JP2000195982A (ja) * | 1998-12-28 | 2000-07-14 | Pfu Ltd | 小型半導体装置および小型半導体装置の実装構造ならびにセラミック基板の製造方法 |
JP2003197813A (ja) * | 2001-12-28 | 2003-07-11 | Mitsubishi Electric Corp | 電子装置 |
JP2007251053A (ja) * | 2006-03-17 | 2007-09-27 | Fujitsu Ltd | 半導体装置の実装構造及びその実装構造の製造方法 |
JP2015176940A (ja) * | 2014-03-14 | 2015-10-05 | 日立オートモティブシステムズ株式会社 | 半導体装置の実装構造 |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2021158354A (ja) * | 2020-03-26 | 2021-10-07 | 北京小米移動軟件有限公司Beijing Xiaomi Mobile Software Co., Ltd. | チップ、回路基板、回路基板アセンブリ及び電子機器 |
US11600584B2 (en) | 2020-03-26 | 2023-03-07 | Beijing Xiaomi Mobile Software Co., Ltd. | Chip, circuit board and electronic device |
JP7282821B2 (ja) | 2020-03-26 | 2023-05-29 | 北京小米移動軟件有限公司 | チップ、回路基板、回路基板アセンブリ及び電子機器 |
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US20200243470A1 (en) | 2020-07-30 |
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