JP2019041020A5 - - Google Patents

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Publication number
JP2019041020A5
JP2019041020A5 JP2017162600A JP2017162600A JP2019041020A5 JP 2019041020 A5 JP2019041020 A5 JP 2019041020A5 JP 2017162600 A JP2017162600 A JP 2017162600A JP 2017162600 A JP2017162600 A JP 2017162600A JP 2019041020 A5 JP2019041020 A5 JP 2019041020A5
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JP
Japan
Prior art keywords
film
gas
hole
forming
etching
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JP2017162600A
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English (en)
Japanese (ja)
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JP6913569B2 (ja
JP2019041020A (ja
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Priority claimed from JP2017162600A external-priority patent/JP6913569B2/ja
Priority to JP2017162600A priority Critical patent/JP6913569B2/ja
Priority to TW111137161A priority patent/TWI858400B/zh
Priority to TW107128535A priority patent/TWI785095B/zh
Priority to KR1020180098612A priority patent/KR102735966B1/ko
Priority to CN201810971378.4A priority patent/CN109427561B/zh
Priority to US16/111,622 priority patent/US10559472B2/en
Publication of JP2019041020A publication Critical patent/JP2019041020A/ja
Priority to US16/731,456 priority patent/US11133192B2/en
Publication of JP2019041020A5 publication Critical patent/JP2019041020A5/ja
Publication of JP6913569B2 publication Critical patent/JP6913569B2/ja
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JP2017162600A 2017-08-25 2017-08-25 被処理体を処理する方法 Active JP6913569B2 (ja)

Priority Applications (7)

Application Number Priority Date Filing Date Title
JP2017162600A JP6913569B2 (ja) 2017-08-25 2017-08-25 被処理体を処理する方法
TW111137161A TWI858400B (zh) 2017-08-25 2018-08-16 電漿處理裝置
TW107128535A TWI785095B (zh) 2017-08-25 2018-08-16 被處理體之處理方法
KR1020180098612A KR102735966B1 (ko) 2017-08-25 2018-08-23 피처리체를 처리하는 방법
CN201810971378.4A CN109427561B (zh) 2017-08-25 2018-08-24 处理被处理体的方法
US16/111,622 US10559472B2 (en) 2017-08-25 2018-08-24 Workpiece processing method
US16/731,456 US11133192B2 (en) 2017-08-25 2019-12-31 Workpiece processing method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2017162600A JP6913569B2 (ja) 2017-08-25 2017-08-25 被処理体を処理する方法

Publications (3)

Publication Number Publication Date
JP2019041020A JP2019041020A (ja) 2019-03-14
JP2019041020A5 true JP2019041020A5 (enExample) 2020-06-18
JP6913569B2 JP6913569B2 (ja) 2021-08-04

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ID=65437681

Family Applications (1)

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JP2017162600A Active JP6913569B2 (ja) 2017-08-25 2017-08-25 被処理体を処理する方法

Country Status (5)

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US (2) US10559472B2 (enExample)
JP (1) JP6913569B2 (enExample)
KR (1) KR102735966B1 (enExample)
CN (1) CN109427561B (enExample)
TW (2) TWI785095B (enExample)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7071175B2 (ja) * 2017-04-18 2022-05-18 東京エレクトロン株式会社 被処理体を処理する方法
JP7066565B2 (ja) * 2018-07-27 2022-05-13 東京エレクトロン株式会社 プラズマ処理方法およびプラズマ処理装置
US10950428B1 (en) * 2019-08-30 2021-03-16 Mattson Technology, Inc. Method for processing a workpiece
CN114467164A (zh) * 2019-09-12 2022-05-10 应用材料公司 排斥网和沉积方法
US11443923B2 (en) * 2019-09-25 2022-09-13 Taiwan Semiconductor Manufacturing Company Ltd. Apparatus for fabricating a semiconductor structure and method of fabricating a semiconductor structure
JP7500332B2 (ja) * 2020-08-05 2024-06-17 キオクシア株式会社 半導体記憶装置及びその製造方法
JP2022096079A (ja) * 2020-12-17 2022-06-29 パナソニックＩｐマネジメント株式会社 素子チップの製造方法

Family Cites Families (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6635335B1 (en) * 1999-06-29 2003-10-21 Micron Technology, Inc. Etching methods and apparatus and substrate assemblies produced therewith
JP4727171B2 (ja) * 2003-09-29 2011-07-20 東京エレクトロン株式会社 エッチング方法
US7780865B2 (en) * 2006-03-31 2010-08-24 Applied Materials, Inc. Method to improve the step coverage and pattern loading for dielectric films
TW201415551A (zh) * 2006-03-31 2014-04-16 Applied Materials Inc 用以改良介電薄膜之階梯覆蓋與圖案負載的方法
US7524750B2 (en) * 2006-04-17 2009-04-28 Applied Materials, Inc. Integrated process modulation (IPM) a novel solution for gapfill with HDP-CVD
JP5082338B2 (ja) * 2006-08-25 2012-11-28 東京エレクトロン株式会社 エッチング方法及びエッチング装置
CN102969240B (zh) * 2007-11-21 2016-11-09 朗姆研究公司 控制对含钨层的蚀刻微负载的方法
US8133797B2 (en) * 2008-05-16 2012-03-13 Novellus Systems, Inc. Protective layer to enable damage free gap fill
KR101468028B1 (ko) * 2008-06-17 2014-12-02 삼성전자주식회사 반도체 소자의 미세 패턴 형성 방법
JP2010283213A (ja) * 2009-06-05 2010-12-16 Tokyo Electron Ltd 基板処理方法
US8728956B2 (en) * 2010-04-15 2014-05-20 Novellus Systems, Inc. Plasma activated conformal film deposition
JP2014003085A (ja) * 2012-06-15 2014-01-09 Tokyo Electron Ltd プラズマエッチング方法及びプラズマ処理装置
US20150357232A1 (en) * 2013-01-22 2015-12-10 Ps4 Luxco S.A.R.L. Method for manufacturing semiconductor device
US9378971B1 (en) * 2014-12-04 2016-06-28 Lam Research Corporation Technique to deposit sidewall passivation for high aspect ratio cylinder etch
JP6207947B2 (ja) * 2013-09-24 2017-10-04 東京エレクトロン株式会社 被処理体をプラズマ処理する方法
US9190478B2 (en) * 2013-12-22 2015-11-17 Alpha And Omega Semiconductor Incorporated Method for forming dual oxide trench gate power MOSFET using oxide filled trench
JP6151215B2 (ja) * 2014-05-15 2017-06-21 東京エレクトロン株式会社 プラズマエッチング方法
US9406522B2 (en) * 2014-07-24 2016-08-02 Applied Materials, Inc. Single platform, multiple cycle spacer deposition and etch
JP2016058590A (ja) * 2014-09-11 2016-04-21 株式会社日立ハイテクノロジーズ プラズマ処理方法
US9564342B2 (en) * 2014-09-26 2017-02-07 Tokyo Electron Limited Method for controlling etching in pitch doubling
US9425041B2 (en) * 2015-01-06 2016-08-23 Lam Research Corporation Isotropic atomic layer etch for silicon oxides using no activation
JP6559430B2 (ja) * 2015-01-30 2019-08-14 東京エレクトロン株式会社 被処理体を処理する方法
US9922839B2 (en) 2015-06-23 2018-03-20 Lam Research Corporation Low roughness EUV lithography

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