JP2018511168A - 縦型電力装置内の表面装置 - Google Patents

縦型電力装置内の表面装置 Download PDF

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JP2018511168A
JP2018511168A JP2017545244A JP2017545244A JP2018511168A JP 2018511168 A JP2018511168 A JP 2018511168A JP 2017545244 A JP2017545244 A JP 2017545244A JP 2017545244 A JP2017545244 A JP 2017545244A JP 2018511168 A JP2018511168 A JP 2018511168A
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Prior art keywords
semiconductor device
region
vertical power
transistors
transistor
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JP2017545244A
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Japanese (ja)
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JP2018511168A5 (enExample
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サード、トーマス、イー． ハリントン
サード、トーマス、イー． ハリントン
チュー、ジジュン
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ディー スリー セミコンダクター エルエルシー
ディー スリー セミコンダクター エルエルシー
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Publication of JP2018511168A publication Critical patent/JP2018511168A/ja
Publication of JP2018511168A5 publication Critical patent/JP2018511168A5/ja
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/102—Constructional design considerations for preventing surface leakage or controlling electric field concentration
    • H10D62/103—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices
    • H10D62/105—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE] 
    • H10D62/109—Reduced surface field [RESURF] PN junction structures
    • H10D62/111—Multiple RESURF structures, e.g. double RESURF or 3D-RESURF structures
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D12/00—Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
    • H10D12/411—Insulated-gate bipolar transistors [IGBT]
    • H10D12/441—Vertical IGBTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D12/00—Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
    • H10D12/411—Insulated-gate bipolar transistors [IGBT]
    • H10D12/441—Vertical IGBTs
    • H10D12/461—Vertical IGBTs having non-planar surfaces, e.g. having trenches, recesses or pillars in the surfaces of the emitter, base or collector regions
    • H10D12/481—Vertical IGBTs having non-planar surfaces, e.g. having trenches, recesses or pillars in the surfaces of the emitter, base or collector regions having gate structures on slanted surfaces, on vertical surfaces, or in grooves, e.g. trench gate IGBTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/102—Constructional design considerations for preventing surface leakage or controlling electric field concentration
    • H10D62/103—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices
    • H10D62/105—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE] 
    • H10D62/106—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE]  having supplementary regions doped oppositely to or in rectifying contact with regions of the semiconductor bodies, e.g. guard rings with PN or Schottky junctions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D8/00—Diodes
    • H10D8/411—PN diodes having planar bodies
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D8/00—Diodes
    • H10D8/60—Schottky-barrier diodes 
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/40—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00 with at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of IGFETs with BJTs
    • H10D84/401—Combinations of FETs or IGBTs with BJTs
    • H10D84/403—Combinations of FETs or IGBTs with BJTs and with one or more of diodes, resistors or capacitors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/60—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
    • H10D84/611—Combinations of BJTs and one or more of diodes, resistors or capacitors
    • H10D84/613—Combinations of vertical BJTs and one or more of diodes, resistors or capacitors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/811—Combinations of field-effect devices and one or more diodes, capacitors or resistors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H10D84/85—Complementary IGFETs, e.g. CMOS
    • H10D84/856—Complementary IGFETs, e.g. CMOS the complementary IGFETs having different architectures than each other, e.g. high-voltage and low-voltage CMOS
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/201—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates the substrates comprising an insulating layer on a semiconductor body, e.g. SOI
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/601—Insulated-gate field-effect transistors [IGFET] having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs 

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  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Chemical & Material Sciences (AREA)
  • Composite Materials (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Thin Film Transistor (AREA)
JP2017545244A 2015-02-27 2016-02-26 縦型電力装置内の表面装置 Pending JP2018511168A (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US201562126240P 2015-02-27 2015-02-27
US62/126,240 2015-02-27
PCT/US2016/019917 WO2016138468A1 (en) 2015-02-27 2016-02-26 Surface devices within a vertical power device

Publications (2)

Publication Number Publication Date
JP2018511168A true JP2018511168A (ja) 2018-04-19
JP2018511168A5 JP2018511168A5 (enExample) 2019-04-25

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JP2017545244A Pending JP2018511168A (ja) 2015-02-27 2016-02-26 縦型電力装置内の表面装置

Country Status (6)

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US (2) US9755058B2 (enExample)
EP (1) EP3262678A4 (enExample)
JP (1) JP2018511168A (enExample)
KR (1) KR20170121224A (enExample)
CN (1) CN107851614A (enExample)
WO (1) WO2016138468A1 (enExample)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10580884B2 (en) * 2017-03-08 2020-03-03 D3 Semiconductor LLC Super junction MOS bipolar transistor having drain gaps
CN111989778B (zh) * 2018-04-20 2024-02-13 艾鲍尔半导体 小间距超结mosfet结构和方法
US11764209B2 (en) * 2020-10-19 2023-09-19 MW RF Semiconductors, LLC Power semiconductor device with forced carrier extraction and method of manufacture
CN112560328B (zh) * 2020-11-18 2022-04-19 电子科技大学 基于表面微应变信号的igbt键合引线故障诊断方法
TWI826190B (zh) * 2022-12-16 2023-12-11 力晶積成電子製造股份有限公司 高頻電晶體
CN115939215B (zh) * 2022-12-16 2026-01-30 广微集成技术（深圳）有限公司 一种vdmos器件

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JPH02252262A (ja) * 1989-03-27 1990-10-11 Nippon Telegr & Teleph Corp <Ntt> 半導体装置
JP2006049668A (ja) * 2004-08-06 2006-02-16 Matsushita Electric Ind Co Ltd 半導体装置及びその製造方法
JP2007288774A (ja) * 2006-03-22 2007-11-01 Toyota Central Res & Dev Lab Inc 低スイッチング損失、低ノイズを両立するパワーｍｏｓ回路
JP2008166705A (ja) * 2006-12-06 2008-07-17 Denso Corp 半導体装置およびその製造方法
US20080266922A1 (en) * 2004-11-08 2008-10-30 Asim Mumtaz Integrated Circuits and Power Supplies
JP2009147297A (ja) * 2007-11-20 2009-07-02 Denso Corp Ｓｏｉ基板を用いた半導体装置およびその製造方法
JP2010141244A (ja) * 2008-12-15 2010-06-24 Mitsumi Electric Co Ltd 半導体装置
JP2010251793A (ja) * 2007-11-06 2010-11-04 Denso Corp 半導体装置及びその製造方法
JP2012256718A (ja) * 2011-06-09 2012-12-27 Renesas Electronics Corp 半導体装置及び半導体装置の製造方法

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Publication number Priority date Publication date Assignee Title
JPH02252262A (ja) * 1989-03-27 1990-10-11 Nippon Telegr & Teleph Corp <Ntt> 半導体装置
JP2006049668A (ja) * 2004-08-06 2006-02-16 Matsushita Electric Ind Co Ltd 半導体装置及びその製造方法
US20080266922A1 (en) * 2004-11-08 2008-10-30 Asim Mumtaz Integrated Circuits and Power Supplies
JP2007288774A (ja) * 2006-03-22 2007-11-01 Toyota Central Res & Dev Lab Inc 低スイッチング損失、低ノイズを両立するパワーｍｏｓ回路
JP2008166705A (ja) * 2006-12-06 2008-07-17 Denso Corp 半導体装置およびその製造方法
JP2010251793A (ja) * 2007-11-06 2010-11-04 Denso Corp 半導体装置及びその製造方法
JP2009147297A (ja) * 2007-11-20 2009-07-02 Denso Corp Ｓｏｉ基板を用いた半導体装置およびその製造方法
JP2010141244A (ja) * 2008-12-15 2010-06-24 Mitsumi Electric Co Ltd 半導体装置
JP2012256718A (ja) * 2011-06-09 2012-12-27 Renesas Electronics Corp 半導体装置及び半導体装置の製造方法

Also Published As

Publication number Publication date
CN107851614A (zh) 2018-03-27
US20180012981A1 (en) 2018-01-11
US20160254373A1 (en) 2016-09-01
EP3262678A1 (en) 2018-01-03
WO2016138468A1 (en) 2016-09-01
US10074735B2 (en) 2018-09-11
US9755058B2 (en) 2017-09-05
EP3262678A4 (en) 2019-01-09
KR20170121224A (ko) 2017-11-01

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