JP2018098790A5 - - Google Patents
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- JP2018098790A5 JP2018098790A5 JP2017234289A JP2017234289A JP2018098790A5 JP 2018098790 A5 JP2018098790 A5 JP 2018098790A5 JP 2017234289 A JP2017234289 A JP 2017234289A JP 2017234289 A JP2017234289 A JP 2017234289A JP 2018098790 A5 JP2018098790 A5 JP 2018098790A5
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- JP
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- Prior art keywords
- calibration
- dac
- lsb
- signal
- binary
- Prior art date
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- 239000003990 capacitor Substances 0.000 claims 14
- 238000000034 method Methods 0.000 claims 7
- YTAHJIFKAKIKAV-XNMGPUDCSA-N [(1R)-3-morpholin-4-yl-1-phenylpropyl] N-[(3S)-2-oxo-5-phenyl-1,3-dihydro-1,4-benzodiazepin-3-yl]carbamate Chemical compound O=C1[C@H](N=C(C2=C(N1)C=CC=C2)C1=CC=CC=C1)NC(O[C@H](CCN1CCOCC1)C1=CC=CC=C1)=O YTAHJIFKAKIKAV-XNMGPUDCSA-N 0.000 claims 2
- 230000001960 triggered effect Effects 0.000 claims 2
- GNFTZDOKVXKIBK-UHFFFAOYSA-N 3-(2-methoxyethoxy)benzohydrazide Chemical compound COCCOC1=CC=CC(C(=O)NN)=C1 GNFTZDOKVXKIBK-UHFFFAOYSA-N 0.000 claims 1
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| EP16202932.6A EP3334049B1 (en) | 2016-12-08 | 2016-12-08 | A method of digital-to-analog converter mismatch calibration in a successive approximation register analog-to-digital converter and a successive approximation register analog-to-digital converter |
| EP16202932.6 | 2016-12-08 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2018098790A JP2018098790A (ja) | 2018-06-21 |
| JP2018098790A5 true JP2018098790A5 (enExample) | 2021-02-18 |
| JP6886394B2 JP6886394B2 (ja) | 2021-06-16 |
Family
ID=57530577
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2017234289A Active JP6886394B2 (ja) | 2016-12-08 | 2017-12-06 | 逐次比較レジスタ型アナログデジタル変換器におけるデジタルアナログ変換器のミスマッチ較正方法、及び逐次比較レジスタ型アナログデジタル変換器 |
Country Status (3)
| Country | Link |
|---|---|
| US (1) | US10027339B2 (enExample) |
| EP (1) | EP3334049B1 (enExample) |
| JP (1) | JP6886394B2 (enExample) |
Families Citing this family (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US10009036B2 (en) * | 2016-09-09 | 2018-06-26 | Samsung Electronics Co., Ltd | System and method of calibrating input signal to successive approximation register (SAR) analog-to-digital converter (ADC) in ADC-assisted time-to-digital converter (TDC) |
| US10425094B2 (en) * | 2017-12-01 | 2019-09-24 | Intel Corporation | Method and apparatus for preventing inherent error propagation of successive approximation register analog-to-digital converter through digital correction |
| CN108462492B (zh) * | 2018-07-04 | 2024-07-05 | 珠海一微半导体股份有限公司 | 一种sar_adc系统失调电压的校正电路及校正方法 |
| TWI722321B (zh) * | 2018-09-21 | 2021-03-21 | 瑞昱半導體股份有限公司 | 數位類比轉換器裝置與電流控制方法 |
| US10523228B1 (en) * | 2018-12-18 | 2019-12-31 | Ipgreat Incorporated | Method of capacitive DAC calibration for SAR ADC |
| US12478264B2 (en) * | 2019-06-27 | 2025-11-25 | Rensselaer Polytechnic Institute | System for sensing arterial pulse waveform |
| CN110504967B (zh) * | 2019-08-30 | 2022-04-22 | 电子科技大学 | 一种流水线adc的级间增益失配校正方法 |
| WO2021239242A1 (en) * | 2020-05-29 | 2021-12-02 | Telefonaktiebolaget Lm Ericsson (Publ) | Pipelined successive approximation register analog-to-digital converter gain error estimation |
| KR20220050663A (ko) * | 2020-10-16 | 2022-04-25 | 삼성전자주식회사 | 펄스 진폭 변조에 기반된 데이터 신호를 수신하는 수신기 및 이를 포함하는 전자 장치 |
| CN119892079B (zh) * | 2025-03-26 | 2025-06-20 | 华中科技大学 | 一种基于rram对逐次逼近型模数转换器的数字前台校准系统及方法 |
Family Cites Families (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8269657B2 (en) | 2009-06-26 | 2012-09-18 | Intersil Americas Inc. | Background calibration of offsets in interleaved analog to digital converters |
| US8040264B2 (en) | 2010-03-04 | 2011-10-18 | Analog Devices, Inc. | Pipeline analog to digital converter and a residue amplifier for a pipeline analog to digital converter |
| TWI545903B (zh) * | 2011-03-17 | 2016-08-11 | 安娜卡敦設計公司 | 類比轉數位轉換器（ａｄｃ）之校正 |
| JP6111662B2 (ja) * | 2012-12-28 | 2017-04-12 | 富士通株式会社 | アナログ／デジタル変換器 |
| US9059730B2 (en) * | 2013-09-19 | 2015-06-16 | Qualcomm Incorporated | Pipelined successive approximation analog-to-digital converter |
| EP2953265B1 (en) * | 2014-06-06 | 2016-12-14 | IMEC vzw | Method and circuit for bandwidth mismatch estimation in an a/d converter |
| US9219492B1 (en) * | 2014-09-19 | 2015-12-22 | Hong Kong Applied Science & Technology Research Institute Company, Limited | Loading-free multi-stage SAR-assisted pipeline ADC that eliminates amplifier load by re-using second-stage switched capacitors as amplifier feedback capacitor |
| EP3059867B1 (en) * | 2015-02-19 | 2020-07-08 | Stichting IMEC Nederland | Circuit and method for dac mismatch error detection and correction in an adc |
-
2016
- 2016-12-08 EP EP16202932.6A patent/EP3334049B1/en active Active
-
2017
- 2017-12-06 US US15/833,796 patent/US10027339B2/en active Active
- 2017-12-06 JP JP2017234289A patent/JP6886394B2/ja active Active
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